KR940012484A - 플립 칩 디바이스의 볼 접촉부 - Google Patents

플립 칩 디바이스의 볼 접촉부 Download PDF

Info

Publication number
KR940012484A
KR940012484A KR1019930024606A KR930024606A KR940012484A KR 940012484 A KR940012484 A KR 940012484A KR 1019930024606 A KR1019930024606 A KR 1019930024606A KR 930024606 A KR930024606 A KR 930024606A KR 940012484 A KR940012484 A KR 940012484A
Authority
KR
South Korea
Prior art keywords
contact
array
ball
semiconductor device
elements
Prior art date
Application number
KR1019930024606A
Other languages
English (en)
Other versions
KR100317756B1 (ko
Inventor
엠.치우 앤소니
Original Assignee
윌리엄 이.힐러
텍사스 인스트루먼츠 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 윌리엄 이.힐러, 텍사스 인스트루먼츠 인코포레이티드 filed Critical 윌리엄 이.힐러
Publication of KR940012484A publication Critical patent/KR940012484A/ko
Application granted granted Critical
Publication of KR100317756B1 publication Critical patent/KR100317756B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/742—Apparatus for manufacturing bump connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0615—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11332—Manufacturing methods by local deposition of the material of the bump connector in solid form using a powder
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/118—Post-treatment of the bump connector
    • H01L2224/1183—Reworking, e.g. shaping
    • H01L2224/1184—Reworking, e.g. shaping involving a mechanical process, e.g. planarising the bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/13078—Plural core members being disposed next to each other, e.g. side-to-side arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/1319—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H01L2224/13191—The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/1357—Single coating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/1354—Coating
    • H01L2224/13599—Material
    • H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13644—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0212—Resin particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0195—Tool for a process not provided for in H05K3/00, e.g. tool for handling objects using suction, for deforming objects, for applying local pressure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/08—Treatments involving gases
    • H05K2203/082—Suction, e.g. for holding solder balls or components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10—Methods of surface bonding and/or assembly therefor
    • Y10T156/1089—Methods of surface bonding and/or assembly therefor of discrete laminae to single face of additional lamina
    • Y10T156/109—Embedding of laminae within face of additional laminae
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49204—Contact or terminal manufacturing
    • Y10T29/49224—Contact or terminal manufacturing with coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

반도체 디바이스(10) 또는 패시브 기판의 접촉부(11)은 접촉부(11)의 개별적인 볼(12)가 금속 도체 물질로 코팅된 압축가능한 물질인 도체 볼(12)의 어레이를 구성한다. 어레이 내의 볼(12)은 볼(12)와 이것이 결합된 접촉면적 사이의 대규모 결합 면적을 제공하기 위하여 접촉면적에 결합되어 압축된다.

Description

플립 칩 디바이스의 볼 접촉부
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1a도는 볼 어레이 접촉부를 갖는 반도체 디바이스의 평면도.

Claims (21)

  1. 반도체 디바이스의 접촉부에 있어서, 각 접촉부를 형성하는 n×n 어레이 내의 다수의 도체 볼, 및 상기 도체 볼이 반도체 디바이스/패시브 기판의 접촉 면적 상에 고정되는 각 도체 볼의 평평한 면적을 포함하는 것을 특징으로 하는 반도체 디바이스의 접촉부.
  2. 제1항에 있어서, 상기 접촉부의 상기 도체 볼이 높은 도체 물질로 코팅된 가요성 물질인 것을 특징으로 하는 반도체 디바이스의 접촉부.
  3. 제2항에 있어서, 가요성 물질이 탄성 중합체인 것을 특징으로 하는 반도체 디바이스의 접촉부.
  4. 제2항에 있어서, 상기 도체 물질이 금인 것을 특징으로 하는 반도체 디바이스의 접촉부.
  5. 반도체 디바이스의 접촉부에 있어서, 도체 볼 소자를 압축할 수 있는 하나 이상의 n×n 어레이, 및 상기 도체 볼을 반도체 디바이스/패시브 기판 접촉 면적에 고정시키는 어레이 내의 각 도체 볼의 평평한 면적을 포함하는 것을 특징으로 하는 반도체 디바이스의 접촉부.
  6. 제5항에 있어서, 상기 도체 볼 소자가 금속 물질로 코팅된 가요성 물질의 볼인 것을 특징으로 하는 반도체 디바이스의 접촉부.
  7. 제6항에 있어서, 가요성 물질이 탄성 중합체인 것을 특징으로 하는 반도체 디바이스의 접촉부.
  8. 제6항에 있어서, 상기 금속 물질이 금인 것을 특징으로 하는 반도체 디바이스의 접촉부.
  9. 반도체 디바이스의 접촉부를 구성하는 방법에 있어서, n×n 어레이 내에 다수의 볼 접촉 소자를 정렬하는 단계, 반도체 디바이스의 접촉 면적 상에 접촉 소자의 n×n 어레이를 일시적으로 장착하는 단계, 및 반도체 디바이스의 접촉 면적 상에 접촉 소자의 n×n어레이를 결합하는 단계를 포함하는 것을 특징으로 하는 방법.
  10. 제9항에 있어서, 접촉 소자의 어레이를 일시적으로 장착하는 단계가 페스트 물질로 접촉 소자의 어레이를 고정시키는 단계를 포함하는 것을 특징으로 하는 방법.
  11. 제9항에 있어서, 상기 볼 접촉 소자가 금속 코팅된 가요성 물질인 것을 특징으로 하는 방법.
  12. 제11항에 있어서, 가요성 물질이 탄성 중합체인 것을 특징으로 하는 방법.
  13. 제11항에 있어서, 상기 금속 물질이 금인 것을 특징으로 하는 방법.
  14. 제9항에 있어서, 압력을 가하고, 반도체 디바이스의 접촉부에 볼 소자의 어레이를 결합하기에 앞서 볼 소자 어레이를 압축시키는 단계를 포함하는 것을 특징으로 하는 방법.
  15. 반도체 디바이스의 접촉 면적 상에 접촉부를 구성하는 방법에 있어서, n×n 어레이 내의 다수의 볼 접촉소자를 정렬하는 단계, 반도체 디바이스의 접촉 면적 상에 접촉제를 사용하는 단계, 반도체 디바이스의 접촉 면적 상에 상기 접착제를 갖는 접촉 소자의 n×n 어레이를 일시적으로 장착하는 단계, 및 반도체 디바이스의 접촉 면적상에 접촉 소자의 n×n 어레이를 결합하는 단계를 포함하는 것을 특징으로 하는 방법.
  16. 제15항에 있어서, 상기 볼 접촉 소자가 금속 코팅된 가요성 물질인 것을 특징으로 하는 방법.
  17. 제16항에 있어서, 가요성 물질이 탄성 중합체인 것을 특징으로 하는 방법.
  18. 제16항에 있어서, 상기 금속 물질이 금인 것을 특징으로 하는 방법.
  19. 반도체 기판 디바이스의 접촉 면적 상에 접촉부를 구성하기 위한 방법에 있어서, n×n 어레이 내의 다수의 볼 접촉 소자를 정렬하는 단계, 반도체 디바이스의 접촉 면적 상에 접착제를 사용하는 단계, 상기 볼 소자가 반도체 디바이스의 접촉 면적 상에 접촉되기 위하여 반도체 디바이스의 접촉 표면 상에 상기 접착제를 갖는 접촉 소자의 n×n 어레이를 일시적으로 장착하는 단계, 반도체 디바이스 접촉 면적에 대한 볼 소자의 접촉 면적을 증가시키도록 볼 소자를 압축하기 위하여 상기 볼 접촉 소자에 압력을 사용하는 단계, 및 반도체 기판 상의 접촉 면적에 n×n 어레이의 접촉 소자를 결합하는 단계를 포함하는 것을 특징으로 하는 방법.
  20. 볼 접촉 소자의 n×n 어레이를 픽업 및 이동시키는 디바이스에 있어서, 진공 픽업 팁, 및 이동될 볼 접촉소자의 어레이에 대응하는 상기 진공 픽업 팁 내에 있고 진공 픽업 팁 내로 볼 접촉 소자를 당기지 않고 개구내에 볼 접촉 소자를 끼워넣기 위한 크기인 개구의 n×n 어레이를 포함하는 것을 특징으로 하는 디바이스.
  21. 제20항에 있어서, n 및 m 이 1 이상의 정수인 반도체 디바이스의 다수의 접촉부의 간격에 대응하도록 떨어져 배치된 다수의 n×m 어레이 개구를 포함하는 것을 특징으로 하는 디바이스.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930024606A 1992-09-15 1993-11-18 플립칩디바이스의볼접촉부 KR100317756B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US94518592A 1992-09-15 1992-09-15
US07/945,185 1992-11-19

Publications (2)

Publication Number Publication Date
KR940012484A true KR940012484A (ko) 1994-06-23
KR100317756B1 KR100317756B1 (ko) 2002-03-20

Family

ID=25482756

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930024606A KR100317756B1 (ko) 1992-09-15 1993-11-18 플립칩디바이스의볼접촉부

Country Status (7)

Country Link
US (2) US5955784A (ko)
EP (1) EP0588609B1 (ko)
JP (1) JPH06224198A (ko)
KR (1) KR100317756B1 (ko)
DE (1) DE69312411T2 (ko)
SG (1) SG54297A1 (ko)
TW (1) TW239899B (ko)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19533171A1 (de) * 1994-09-13 1996-03-14 Fraunhofer Ges Forschung Verfahren und Vorrichtung zur Applikation von Verbindungsmaterial auf einer Substratanschlußfläche
US5786635A (en) * 1996-12-16 1998-07-28 International Business Machines Corporation Electronic package with compressible heatsink structure
US6131795A (en) * 1997-11-10 2000-10-17 Matsushita Electric Industrial Co., Ltd. Thermal compression bonding method of electronic part with solder bump
FR2785140B1 (fr) 1998-10-27 2007-04-20 Novatec Sa Soc Dispositif de mise a disposition de billes ou de preformes pour la fabrication de connexions a billes
FR2791046B1 (fr) * 1999-03-17 2001-05-11 Novatec Sa Soc Procede et dispositif de distribution unitaire de billes solides et identiques sur un substrat par serigraphie
ATE295244T1 (de) * 1999-03-17 2005-05-15 Novatec Sa Verfahren und vorrichtung zum auftragen von kugeln in die öffnungen eines kugelbehälters
JP4341187B2 (ja) * 2001-02-13 2009-10-07 日本電気株式会社 半導体装置
US6802918B1 (en) * 2001-05-09 2004-10-12 Raytheon Company Fabrication method for adhesive pressure bonding two components together with closed-loop control
US6830463B2 (en) * 2002-01-29 2004-12-14 Fci Americas Technology, Inc. Ball grid array connection device
NL1024688C2 (nl) * 2003-11-03 2005-05-04 Meco Equip Eng Werkwijze en inrichting voor het met een elektronische component verbinden van tot elektrische contactorganen te vormen objecten.
JP4427411B2 (ja) * 2004-07-28 2010-03-10 日立ソフトウエアエンジニアリング株式会社 ビーズ配列装置及びビーズ配列方法
US7550846B2 (en) * 2005-12-21 2009-06-23 Palo Alto Research Center Conductive bump with a plurality of contact elements
CN101125406B (zh) * 2006-08-16 2010-09-29 比亚迪股份有限公司 球体固定块及其制造装置
US7910838B2 (en) * 2008-04-03 2011-03-22 Advanced Interconnections Corp. Solder ball interface
KR20150139190A (ko) * 2014-06-03 2015-12-11 삼성전기주식회사 소자 및 소자 패키지

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2842831A (en) * 1956-08-30 1958-07-15 Bell Telephone Labor Inc Manufacture of semiconductor devices
US2934685A (en) * 1957-01-09 1960-04-26 Texas Instruments Inc Transistors and method of fabricating same
NL255865A (ko) * 1960-09-13 1900-01-01
US3871014A (en) * 1969-08-14 1975-03-11 Ibm Flip chip module with non-uniform solder wettable areas on the substrate
US3719981A (en) * 1971-11-24 1973-03-13 Rca Corp Method of joining solder balls to solder bumps
US3809625A (en) * 1972-08-15 1974-05-07 Gen Motors Corp Method of making contact bumps on flip-chips
US4369458A (en) * 1980-07-01 1983-01-18 Westinghouse Electric Corp. Self-aligned, flip-chip focal plane array configuration
DE3343362A1 (de) * 1983-11-30 1985-06-05 Siemens AG, 1000 Berlin und 8000 München Verfahren zur galvanischen herstellung metallischer, hoeckerartiger anschlusskontakte
US4838347A (en) * 1987-07-02 1989-06-13 American Telephone And Telegraph Company At&T Bell Laboratories Thermal conductor assembly
JP2528910B2 (ja) * 1987-11-16 1996-08-28 富士通株式会社 ハンダバンプの形成方法
US5001542A (en) * 1988-12-05 1991-03-19 Hitachi Chemical Company Composition for circuit connection, method for connection using the same, and connected structure of semiconductor chips
JPH0740496B2 (ja) * 1989-03-01 1995-05-01 シャープ株式会社 電極上への導電性粒子の配置方法
JPH02246235A (ja) * 1989-03-20 1990-10-02 Fujitsu Ltd 集積回路装置
US5135890A (en) * 1989-06-16 1992-08-04 General Electric Company Method of forming a hermetic package having a lead extending through an aperture in the package lid and packaged semiconductor chip
US5010038A (en) * 1989-06-29 1991-04-23 Digital Equipment Corp. Method of cooling and powering an integrated circuit chip using a compliant interposing pad
EP0447170B1 (en) * 1990-03-14 2002-01-09 Nippon Steel Corporation Method of bonding bumps to leads of tab tape and an apparatus for arranging bumps used for the same
JP2843658B2 (ja) * 1990-08-02 1999-01-06 東レ・ダウコーニング・シリコーン株式会社 フリップチップ型半導体装置
US5207585A (en) * 1990-10-31 1993-05-04 International Business Machines Corporation Thin interface pellicle for dense arrays of electrical interconnects
JPH0563029A (ja) * 1991-09-02 1993-03-12 Fujitsu Ltd 半導体素子

Also Published As

Publication number Publication date
KR100317756B1 (ko) 2002-03-20
SG54297A1 (en) 1998-11-16
EP0588609A1 (en) 1994-03-23
DE69312411T2 (de) 1997-11-27
US5955784A (en) 1999-09-21
JPH06224198A (ja) 1994-08-12
TW239899B (ko) 1995-02-01
DE69312411D1 (de) 1997-09-04
US5849132A (en) 1998-12-15
EP0588609B1 (en) 1997-07-23

Similar Documents

Publication Publication Date Title
KR940012484A (ko) 플립 칩 디바이스의 볼 접촉부
KR100188624B1 (ko) 칩 패키지용의 제거가능한 히트 씽크 어셈블리
EP1160856A3 (en) Flip chip type semiconductor device and method of manufacturing the same
EP0680663A4 (en) METHOD FOR MOUNTING A PIEZOELECTRIC ELEMENT ON A SUBSTRATE.
EP1005086A3 (en) Metal foil having bumps, circuit substrate having the metal foil, and semiconductor device having the circuit substrate
ATE342582T1 (de) Mikroelektronische montage mit mehrfachen leiterverformungen
EP0838855A3 (en) Semiconductor module
EP0820099A3 (en) Packaged semiconductor device and method of manufacturing the same
US6135522A (en) Sucker for transferring packaged semiconductor device
EP1039551A3 (en) Photovoltaic module
EP1770779A3 (en) Electro-optical device and electronic device
EP0780893A3 (en) Semiconductor device and method of manufacturing the same
EP1659625A3 (en) Semiconductor device and method for manufacturing the same, circuit board, and electronic instrument
JPH0610998B2 (ja) 電気コネクタ・アセンブリ
EP0360485A3 (en) Pin grid array (pga) integrated circuit packages
KR920017524A (ko) 전단 응력 상호연결 장치 및 방법
EP1653503A3 (en) Semiconductor device, circuit board, electro-optic device, electronic device
EP2261970A3 (en) Semiconductor device manufacturing method having a step of applying a copper foil on a substrate as a part of a wiring connecting an electrode pad to a mounting terminal
WO2005112113A3 (en) Mounting with auxiliary bumps
CA2266158A1 (en) Connecting devices and method for interconnecting circuit components
KR970072556A (ko) 개선된 접속 단자를 갖는 테이프 캐리어 패키지 및 이를 외부 회로 기판에 전기적으로 상호 접속하는 방법
KR950035551A (ko) 전자 디바이스 접속 방법
US6169521B1 (en) Built-in antenna
EP0913892A3 (en) Laminated spring structure and flexible circuitry connector incorporating same
EP1143515A3 (en) Wiring substrate, method of manufacturing the same and semiconductor device

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20101129

Year of fee payment: 10

LAPS Lapse due to unpaid annual fee