KR940008137A - 반도체 장치의 제조 방법 - Google Patents

반도체 장치의 제조 방법 Download PDF

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KR940008137A
KR940008137A KR1019930020541A KR930020541A KR940008137A KR 940008137 A KR940008137 A KR 940008137A KR 1019930020541 A KR1019930020541 A KR 1019930020541A KR 930020541 A KR930020541 A KR 930020541A KR 940008137 A KR940008137 A KR 940008137A
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South Korea
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diffusion layer
type diffusion
type
contact hole
layer
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KR1019930020541A
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다께시 와따나베
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세끼모또 타다히로
닛본덴기 가부시끼가이샤
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Publication of KR940008137A publication Critical patent/KR940008137A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
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    • H01—ELECTRIC ELEMENTS
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    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Ceramic Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

본 발명은 적은 공정수와 적은 이온 주입 도스량으로 Ti-N을 갖는 배선과 N+,P+형 확산층과의 접촉을 형성하는 것을 목적으로 한다.
본 발명의 구성은 N+형 확산층(5)와 접촉 구멍 사이의 마진을 작게해도 누설 전류가 흐르지 않도록 인을 전면에 이온 주입해서 단1회의 리소그래피 공정을 이용해서 P+확산층(6)에의 인의 도스량 보다도 많은 도스량으로 붕소를 주입해서 P+확산층과 접촉 구멍 사이의 마진을 작게해도 누설 전류가 흐르지 않아서 낮은 접촉 저항을 실현한다.

Description

반도체 장치의 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 한 실시예를 설명하기 위해 (A)~(C)로 구분하여 도시하는 공정순 단면도.
제4도는 본 발명의 한 실시예에 있어서의 Al-Si-Cu막/Ti막-N막/Ti막-P+형 접촉층의 접촉 저항과 인 이온 도스량과의 관계를 도시하는 그래프.

Claims (4)

  1. 반도체 장치의 제조방법에 있어서, 반도체 기판의 표면에 P+형 확산층 및 N+형 확산층을 선택적으로 형성하는 공정, 상기 반도체 기판의 상기표면 상에 층 절연막을 퇴적하는 공정, 상기 P+형 확산층이 제1접촉 구멍을 통해 노출되고, N+형 확산층이 제2접촉 구멍을 통해 노출되도록 상기 층간 절연막을 통과하는 접촉 구멍을 형성하는 공정, 상기 제1 및 제2 접촉 구멍을 통해 상기 P+형 확산층 및 상기 N+형 확산층으로 N형 불순물을 주입하는 공정, 상기 제1접촉 구멍을 통해 상기 P+형 확산층에만 P형 불순물을 주입하는 공정, 및 상기 제1 및 제2접촉 구멍을 통해 각각의 상기 P+확산층 및 상기 N+형 확산층에 접촉하여 배리어 메탈막을 갖는 배선층을 형성하는 공정을 포함하는 것을 특징으로 하는 제조방법.
  2. 제1항에 있어서, 상기 반도체 기판이 실리콘 기판이고, P+형 확산층이 상기 실리콘 기판의 표면에 형성된 P형 웰의 표면에 형성되며, N+형 확산층이 상기 실리콘 기판의 표면에 형성된 N형 웰의 표면에 형성되고, 상기 N형 불순물이 인이고, 상기 P형 불순물이 붕소이며, 상기 배리어 메탈막이 티탄막 및 질화 티탄막으로 이루어진 2중층으로 형성되는 것을 특징으로 하는 제조방법.
  3. 제2항에 있어서, 상기 인이 상기 제1 및 제2접촉 구멍을 통해 상기 P+형 확산층 및 상기 N+형 확산층으로 이온 주입되고, 상기 붕소가 상기 제1접촉 구멍을 통해 상기 P+형 확산층에만 이온 주입되는 것을 특징으로 하는 제조방법.
  4. 제3항에 있어서, 상기 인이 2.0×1014㎝-2의 도스량으로 이온 주입되고, 상기 붕소가 2.0×1015㎝-2내지2.0×1014㎝-2범위의 도스량으로 이온 주입되는 것을 특징으로 하는 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019930020541A 1992-09-29 1993-09-28 반도체 장치의 제조 방법 KR940008137A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP92-259196 1992-09-29
JP4259196A JPH06112149A (ja) 1992-09-29 1992-09-29 半導体装置の製造方法

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KR940008137A true KR940008137A (ko) 1994-04-29

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW478011B (en) * 1999-03-19 2002-03-01 Toshiba Corp Manufacture of semiconductor device
US8633521B2 (en) 2007-09-26 2014-01-21 Stmicroelectronics N.V. Self-bootstrapping field effect diode structures and methods
US8148748B2 (en) 2007-09-26 2012-04-03 Stmicroelectronics N.V. Adjustable field effect rectifier
EP3447803A3 (en) 2007-09-26 2019-06-19 STMicroelectronics N.V. Adjustable field effect rectifier
DE102010004230A1 (de) 2009-01-23 2010-10-14 Qimonda Ag Integrierter Schaltkreis mit Kontaktstrukturen für P- und N-Dotierte Gebiete und Verfahren zu dessen Herstellung

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6211259A (ja) * 1985-07-09 1987-01-20 Sony Corp 半導体装置の製造方法
EP0216053A3 (en) * 1985-09-26 1988-01-20 Motorola, Inc. Removable sidewall spaces for lightly doped drain formation using one mask level
JPH069203B2 (ja) * 1987-03-31 1994-02-02 株式会社東芝 半導体装置とその製造方法
IT1223571B (it) * 1987-12-21 1990-09-19 Sgs Thomson Microelectronics Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte
IT1225614B (it) * 1988-08-04 1990-11-22 Sgs Thomson Microelectronics Processo per la fabbricazione di dispositivi integrati cmos con lunghezze di gate ridotte e drain leggermente drogato
US4956311A (en) * 1989-06-27 1990-09-11 National Semiconductor Corporation Double-diffused drain CMOS process using a counterdoping technique

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EP0590652A2 (en) 1994-04-06
JPH06112149A (ja) 1994-04-22
EP0590652A3 (en) 1994-12-07

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