KR940004786A - 집적회로의 기밀 밀봉방법 - Google Patents

집적회로의 기밀 밀봉방법 Download PDF

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Publication number
KR940004786A
KR940004786A KR1019930017109A KR930017109A KR940004786A KR 940004786 A KR940004786 A KR 940004786A KR 1019930017109 A KR1019930017109 A KR 1019930017109A KR 930017109 A KR930017109 A KR 930017109A KR 940004786 A KR940004786 A KR 940004786A
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KR
South Korea
Prior art keywords
silicon
integrated circuit
containing material
ceramic
preceramic
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KR1019930017109A
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English (en)
Inventor
찬드라 그리쉬
윈톤 마이클 키쓰
Original Assignee
노만 에드워드 루이스
다우 코닝 코포레이션
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Application filed by 노만 에드워드 루이스, 다우 코닝 코포레이션 filed Critical 노만 에드워드 루이스
Publication of KR940004786A publication Critical patent/KR940004786A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/564—Details not otherwise provided for, e.g. protection against moisture
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

본 발명은 환경으로부터 보호된 집적회로에 관한 것이다. 이러한 회로는 추가의 세라믹 층을 제1패시베이션층에 적용시킴으로써 기밀 밀봉시킨다.

Description

집적회로의 기밀 밀봉방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음

Claims (8)

  1. 세라믹 층이 제1패시베이션 층을 피복하고 (A) 집적 회로를 예비세라믹 규소 함유 물질을 포함하는 조성물을 사용하여 피복시킨 다음, (B) 당해 예비세라믹 규소 함유 물질을 세라믹으로 전환시킴을 포함하는 방법에 의해 부착된 극소 함유 세라믹 물질을 포함함을 특징으로 하는, 제1패시베이션 층과 하나 이상의 개로 본드 패드(open bond pad)를 지니는 집적회로.
  2. 제1항에 있어서, 세라믹 층이 산화규소, 질화규소, 옥시질화규소, 옥시탄화규소, 카보질화규소, 옥시카보질화규소 및 탄화규소로 이루어진 그룹으로부터 선택된 집적회로.
  3. 제1항에 있어서, 예비세라믹 질소 함유 물질이 하이드로겐 실세스퀴옥산 수지인 집적회로.
  4. 제1항에 있어서, 예비세라믹 규소 함유 물질이 일반식 RnSi(OR)4-n의 가수분해물, 부분 가수분해물 또는 이들의 혼합물[여기서, R은 탄소원자수가 1 내지 20인 지방족, 지환족 또는 방향족 치환체이고, n은 0내지 3이다]인 집적회로.
  5. 제1항에 있어서, 유기 봉입제(organic encnapsulant) 및 규소 봉입제로부터 선택된 물질내에 상호접속되고 매봉된 집적회로.
  6. 제1항에 있어서, 세라믹 층이 자외선 및 가시광선에 대하여 불투명한 집적회로.
  7. (A) (ⅰ) 집적회로를 예비세라믹 규소 함유 물질을 포함하는 조성물을 사용하여 피복시킨 다음, (ⅱ) 당해 예비세라믹 규소 함유 물질을 규소 함유 세라믹으로 전환시킴을 포함하는 방법에 의해 규소 함유 세라믹 층을 집적회로에 적용시킨 다음, (B) 본드 패드를 피복하는 규소 함유 세라믹층의 적어도 일부를 제거함을 포함하는, 제1패시베이션 층과 하나 이상의 개로 본드 패드를 지니는 집적회로를 기밀 밀봉하는 방법.
  8. 하나 이상의 세라믹 층이 적어도 제1패시베이션 층을 예비세라믹 규소 함유 물질을 포함하는 조성물을 사용하여 피복시킨 다음, 당해 예비세라믹 규소 함유 물질을 세라믹 층으로 전환시킴을 포함하는 방법에 의해 부착된 규소 함유 세라믹 물질을 함유함을 특징으로 하는, (A) 본드 패드를 갖는 회로 어셈블리, (B) 본드 패드 주변의 어셈블리 표면위의 제1패시베이션층 및 (c) 제1패시베이션 층을 피복하는 하나 이상의 세라믹 층을 포함하는 집적회로.
KR1019930017109A 1992-08-31 1993-08-31 집적회로의 기밀 밀봉방법 KR940004786A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US93700792A 1992-08-31 1992-08-31
US7/937,007 1992-08-31

Publications (1)

Publication Number Publication Date
KR940004786A true KR940004786A (ko) 1994-03-16

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Application Number Title Priority Date Filing Date
KR1019930017109A KR940004786A (ko) 1992-08-31 1993-08-31 집적회로의 기밀 밀봉방법

Country Status (4)

Country Link
EP (1) EP0586149A1 (ko)
JP (1) JPH06177186A (ko)
KR (1) KR940004786A (ko)
CA (1) CA2104484A1 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5438023A (en) * 1994-03-11 1995-08-01 Ramtron International Corporation Passivation method and structure for a ferroelectric integrated circuit using hard ceramic materials or the like
US5753374A (en) * 1995-11-27 1998-05-19 Dow Corning Corporation Protective electronic coating
US5780163A (en) * 1996-06-05 1998-07-14 Dow Corning Corporation Multilayer coating for microelectronic devices
US5711987A (en) * 1996-10-04 1998-01-27 Dow Corning Corporation Electronic coatings
JP3913638B2 (ja) * 2001-09-03 2007-05-09 東京エレクトロン株式会社 熱処理方法及び熱処理装置
WO2008122292A1 (en) * 2007-04-04 2008-10-16 Ecole Polytechnique Federale De Lausanne (Epfl) Diffusion-barrier coating for protection of moisture and oxygen sensitive devices
DE102009000888B4 (de) * 2009-02-16 2011-03-24 Semikron Elektronik Gmbh & Co. Kg Halbleiteranordnung

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63213347A (ja) * 1987-02-27 1988-09-06 Mitsubishi Electric Corp 半導体装置
US4849296A (en) * 1987-12-28 1989-07-18 Dow Corning Corporation Multilayer ceramic coatings from metal oxides and hydrogen silsesquioxane resin ceramified in ammonia
US4888226A (en) * 1988-08-08 1989-12-19 American Telephone And Telegraph Company Silicone gel electronic device encapsulant
CA2027031A1 (en) * 1989-10-18 1991-04-19 Loren A. Haluska Hermetic substrate coatings in an inert gas atmosphere
US5136364A (en) * 1991-06-12 1992-08-04 National Semiconductor Corporation Semiconductor die sealing

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Publication number Publication date
JPH06177186A (ja) 1994-06-24
CA2104484A1 (en) 1994-03-01
EP0586149A1 (en) 1994-03-09

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