KR930022317U - Dram 어드레스 버퍼의 더블래치 센싱회로 - Google Patents
Dram 어드레스 버퍼의 더블래치 센싱회로Info
- Publication number
- KR930022317U KR930022317U KR2019920004114U KR920004114U KR930022317U KR 930022317 U KR930022317 U KR 930022317U KR 2019920004114 U KR2019920004114 U KR 2019920004114U KR 920004114 U KR920004114 U KR 920004114U KR 930022317 U KR930022317 U KR 930022317U
- Authority
- KR
- South Korea
- Prior art keywords
- address
- sensing circuit
- double
- dram
- buffer
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/408—Address circuits
- G11C11/4082—Address Buffers; level conversion circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR92004114U KR950002099Y1 (ko) | 1992-03-14 | 1992-03-14 | Dram 어드레스 버퍼의 더블래치 센싱회로 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR92004114U KR950002099Y1 (ko) | 1992-03-14 | 1992-03-14 | Dram 어드레스 버퍼의 더블래치 센싱회로 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR930022317U true KR930022317U (ko) | 1993-10-16 |
KR950002099Y1 KR950002099Y1 (ko) | 1995-03-24 |
Family
ID=19330330
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR92004114U KR950002099Y1 (ko) | 1992-03-14 | 1992-03-14 | Dram 어드레스 버퍼의 더블래치 센싱회로 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR950002099Y1 (ko) |
-
1992
- 1992-03-14 KR KR92004114U patent/KR950002099Y1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR950002099Y1 (ko) | 1995-03-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69329080D1 (de) | Cache-Speicher | |
DE69027348T2 (de) | Speicherblockadressenermittlungsschaltkreis | |
DE69331672D1 (de) | Adressenerkennungsvorrichtung | |
MX9205671A (es) | Generacion de direccion de lectura en rafaga | |
ITMI920604A0 (it) | Buffer di ingresso indirizzi | |
DE69420771D1 (de) | Adressenpuffer | |
FI98326B (fi) | Osoiteprosessori signaaliprosessoria varten | |
DE69422453D1 (de) | Doppelzugriffspeicher | |
DE68925616D1 (de) | Adressenübergangsabfühlschaltung | |
DE69231030T2 (de) | Entwurf statischer Speicherzellen | |
KR930022317U (ko) | Dram 어드레스 버퍼의 더블래치 센싱회로 | |
FI942939A (fi) | Jyvästärkkelyksen ohentaminen | |
DE69409146T2 (de) | Dynamischer Direktzugriffhalbleiterspeicher | |
KR920003316A (ko) | 반도체 기억소자의 어드레스 입력 버퍼회로 | |
DE69418401D1 (de) | Speicherleseverstärker | |
DE69334046D1 (de) | Cache-Speichervorrichtung | |
NO920272D0 (no) | Hydrofile-hydrofobe derivater av polygalaktomannaner inneholdende tertiaer aminfunksjonalitet | |
KR930016772U (ko) | 어드레스 버퍼 | |
KR930020387U (ko) | 디램의 어드레스 멀티 플렉싱 회로 | |
KR930018611U (ko) | 메인 메모리 및 캐시 메모리 회로 | |
KR930011762U (ko) | 디램 리프레쉬 회로 | |
KR930012314U (ko) | 어드레스 버퍼 | |
KR940023434U (ko) | 디램 리프레쉬 회로 | |
KR910012470U (ko) | Dram 리프레시 회로 | |
KR930024507U (ko) | 어드레스 천이 검출회로 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20030218 Year of fee payment: 9 |
|
LAPS | Lapse due to unpaid annual fee |