KR930018347A - External PWM Port Expansion Circuit - Google Patents

External PWM Port Expansion Circuit Download PDF

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Publication number
KR930018347A
KR930018347A KR1019920002420A KR920002420A KR930018347A KR 930018347 A KR930018347 A KR 930018347A KR 1019920002420 A KR1019920002420 A KR 1019920002420A KR 920002420 A KR920002420 A KR 920002420A KR 930018347 A KR930018347 A KR 930018347A
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KR
South Korea
Prior art keywords
data
pwm
enable signal
bit
bit data
Prior art date
Application number
KR1019920002420A
Other languages
Korean (ko)
Other versions
KR950007106B1 (en
Inventor
서문환
Original Assignee
강진구
삼성전자 주식회사
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Publication date
Application filed by 강진구, 삼성전자 주식회사 filed Critical 강진구
Priority to KR1019920002420A priority Critical patent/KR950007106B1/en
Publication of KR930018347A publication Critical patent/KR930018347A/en
Application granted granted Critical
Publication of KR950007106B1 publication Critical patent/KR950007106B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/4045—Coupling between buses using bus bridges where the bus bridge performs an extender function

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

칼라텔레비젼의 마이컴에서 발생되는 직렬데이터 신호를 입력받아 PWM 출력을 확장할 수 있는 회로가 기술되는바, 이는 마이컴으로 부터 직렬데이터와 클럭 인에이블 신호를 받아 직렬데이터를 병렬로 변환시킨뒤 n비트 데이터중 T비트의 데이터만을 T비트 데이터 래치에 라이트하고, n비트 데이터는 n비트 데이터 래치부에 라이트하는 데이터변환부 n비트 PWM데이터 래치부, T-비트 데이터 래치부 및 디코딩블럭으로 구성시켜서 된 것이다.A circuit is described that can receive a serial data signal from a color television microcomputer and expand the PWM output, which receives serial data and a clock enable signal from the microcomputer, converts the serial data in parallel, and then n-bit data. Among these, only the T-bit data is written to the T-bit data latch, and the n-bit data is composed of a data converter n-bit PWM data latch unit, a T-bit data latch unit, and a decoding block to write to the n-bit data latch unit. .

Description

외부 PWM 포트 확장 회로External PWM Port Expansion Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 외부 PWM 포트 확장회로의 블럭도, 제2도는 제1도의 상세 블럭도, 제3도는 제2도 각부의 신호 파형도이다.1 is a block diagram of an external PWM port expansion circuit according to the present invention, FIG. 2 is a detailed block diagram of FIG. 1, and FIG. 3 is a signal waveform diagram of each part of FIG.

Claims (1)

직렬데이터, 클럭신호 PWM데이터 인에이블신호 및 디코딩 데이터 인에이블 신호를 출력하는 마이컴을 구비한 칼라텔레비젼 또는 비디오 카세트 레코더의 외부 PWM 포트 확장회로에 있어서, 상기 마이컴으로 부터 출력되는 직렬 데이터와 클럭신호 및 인에이블 신호를 입력받아 직렬 데이터를 병렬로 변환하기 위한 데이터 변환수단, 상기의 병렬 변환된 데이터중 n비트 데이터를 PWM 데이터 인에이블 신호의 폴링엣지에서 래치시켜 p개의 PWM블럭에 제공하기 위한 n 비트 PWM 데이터 래치수단, 상기의 병렬 변환된 데이터중 상기의 디코딩 데이터 인에이블 신호의 폴링엣지에서 T비트의 데이터를 래치시키기 위한 T비트 데이터 래치수단, PWM포트 출력이 p개인 경우 이중한 블럭을 어드레싱하기 위한 디코딩 출력을 발생하여 p개의 PWM 블럭에 제공하는 디코딩 수단으로 구성시켜서 됨을 특징으로 하는 외부 PWM 포트 확장회로.An external PWM port expansion circuit of a color television or video cassette recorder having a microcomputer for outputting serial data, a clock signal, a PWM data enable signal, and a decoded data enable signal, the serial data and a clock signal output from the microcomputer; Data conversion means for receiving an enable signal and converting serial data in parallel; n bits for latching n-bit data among the parallel-converted data at a polling edge of the PWM data enable signal and providing it to p PWM blocks PWM data latching means, T-bit data latching means for latching T-bit data at the falling edge of the decoded data enable signal of the parallel-converted data, and addressing a double block when the PWM port output is p Decoding output to generate p PWM blocks External PWM port expansion circuit, characterized in that by configuring the stage. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920002420A 1992-02-18 1992-02-18 Pwm external port extension circuit KR950007106B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920002420A KR950007106B1 (en) 1992-02-18 1992-02-18 Pwm external port extension circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920002420A KR950007106B1 (en) 1992-02-18 1992-02-18 Pwm external port extension circuit

Publications (2)

Publication Number Publication Date
KR930018347A true KR930018347A (en) 1993-09-21
KR950007106B1 KR950007106B1 (en) 1995-06-30

Family

ID=19329149

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920002420A KR950007106B1 (en) 1992-02-18 1992-02-18 Pwm external port extension circuit

Country Status (1)

Country Link
KR (1) KR950007106B1 (en)

Also Published As

Publication number Publication date
KR950007106B1 (en) 1995-06-30

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