KR930017191A - Manufacturing Method of Semiconductor Memory Device - Google Patents

Manufacturing Method of Semiconductor Memory Device Download PDF

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Publication number
KR930017191A
KR930017191A KR1019920000394A KR920000394A KR930017191A KR 930017191 A KR930017191 A KR 930017191A KR 1019920000394 A KR1019920000394 A KR 1019920000394A KR 920000394 A KR920000394 A KR 920000394A KR 930017191 A KR930017191 A KR 930017191A
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KR
South Korea
Prior art keywords
polysilicon
oxide film
memory device
manufacturing
semiconductor memory
Prior art date
Application number
KR1019920000394A
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Korean (ko)
Inventor
편홍범
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019920000394A priority Critical patent/KR930017191A/en
Publication of KR930017191A publication Critical patent/KR930017191A/en

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Abstract

본 발명은 SOI구조를 갖는 DRAM의 고집적화 및 누설 전류방직에 적당하도록 한 반도체 메모리 소자의 제조방법에 관한 것으로, 종래에는 기판을 플레이트를 사오하므로 누설 전류를 막을 수 없으며 노드를 만드는데 두꺼운 에피층을 사용하므로 공정이 어렵고 트렌치를 깊이 형성하면 상기 문제가 더욱 악화되는 결점이 있었으나 본 발명에서는 트레치 표면에 산화막을 형성하고 두꺼운 에피층 대신 폴리실리콘을 사용하여 메모리 소자의 성능을 향상시켜 상기 결점을 개선시킬 수 있는 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor memory device suitable for high integration and leakage current weaving of DRAMs having an SOI structure. In the related art, a thick epitaxial layer is used to form a node because a plate is used as a substrate. Therefore, the process is difficult and the drawback of the problem is exacerbated when the trench is deeply formed, but in the present invention, an oxide film is formed on the surface of the trench and polysilicon is used instead of a thick epitaxial layer to improve the performance of the memory device. It can be.

Description

반도체 메모리 소자의 제조방법Manufacturing Method of Semiconductor Memory Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 SOI구조를 갖는 메모리 소자를 나타낸 단면도, 제3도는 제2도에 따른 공정단면도.2 is a cross-sectional view showing a memory device having an SOI structure of the present invention, and FIG. 3 is a process cross-sectional view according to FIG.

Claims (1)

기판 상부에 트렌치를 형성하여 셀영역을 설정하고 전표면에 제1산화막(10)을 형성시킨 후 결정립이 큰 제1폴리실리콘(11)을 증착하는 단계와, 상기 제1폴리실리콘(11)중 셀영역을 제외한 부분을 제거하고 셀영역 표면에 제1절연체(12)를 증착한 후 전표면에 제2폴리실리콘(13)을 증착하는 단계와, 상기 제1산화막(10)높이이후의 제2폴리실리콘(13)을 제거하여 평탄화시키고 전표면에 제2산화막(14) 형성 후 노드콘택홀 영역의 제2산화막(14)을 제거하고 콘텍부분을 열처리해서 콘택부분을 단결정화 하는 단계와, 전표면에 에피텍셜 성장으로 제1 에피층(15)을 형성하고 액세스 트랜지스터를 형성하기 위해 소오스, 드레인, 제1워드라인(16), 제1비트라인(17)을 형성하는 단계를 차례로 실시하여서 이루어지는 반도체 메모리 소자의 제조방법.Forming a trench on the substrate to form a cell region, forming a first oxide film 10 on the entire surface, and depositing first polysilicon 11 having large crystal grains, and among the first polysilicon 11 Depositing the first insulator 12 on the surface of the cell region, except for the cell region, and depositing the second polysilicon 13 on the entire surface; and after the height of the first oxide film 10, Removing and planarizing the polysilicon 13, forming a second oxide film 14 on the entire surface, removing the second oxide film 14 in the node contact hole region, and heat treating the contact portion to single crystallize the contact portion; Epitaxial growth on the surface to form the first epitaxial layer 15 and to form the source transistor, the first word line 16 and the first bit line 17 in order to form an access transistor. Method of manufacturing a semiconductor memory device. ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.
KR1019920000394A 1992-01-14 1992-01-14 Manufacturing Method of Semiconductor Memory Device KR930017191A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920000394A KR930017191A (en) 1992-01-14 1992-01-14 Manufacturing Method of Semiconductor Memory Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920000394A KR930017191A (en) 1992-01-14 1992-01-14 Manufacturing Method of Semiconductor Memory Device

Publications (1)

Publication Number Publication Date
KR930017191A true KR930017191A (en) 1993-08-30

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920000394A KR930017191A (en) 1992-01-14 1992-01-14 Manufacturing Method of Semiconductor Memory Device

Country Status (1)

Country Link
KR (1) KR930017191A (en)

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