KR930017136A - Manufacturing Method of Semiconductor Device - Google Patents

Manufacturing Method of Semiconductor Device Download PDF

Info

Publication number
KR930017136A
KR930017136A KR1019920000057A KR920000057A KR930017136A KR 930017136 A KR930017136 A KR 930017136A KR 1019920000057 A KR1019920000057 A KR 1019920000057A KR 920000057 A KR920000057 A KR 920000057A KR 930017136 A KR930017136 A KR 930017136A
Authority
KR
South Korea
Prior art keywords
silicon
silicon substrate
ion
field region
oxide film
Prior art date
Application number
KR1019920000057A
Other languages
Korean (ko)
Other versions
KR940008322B1 (en
Inventor
한기만
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019920000057A priority Critical patent/KR940008322B1/en
Publication of KR930017136A publication Critical patent/KR930017136A/en
Application granted granted Critical
Publication of KR940008322B1 publication Critical patent/KR940008322B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

본 발명은 반도체장치의 제조방법에 관한 것으로 반도체장치의 실리콘기판에 있어서 일정부분의 산화막을 다른 부위에 비해 더 두껍게 성장시키기 위하여 상기 실리콘기판의 일정부분에 실리콘이온(Si+)을 주입하여 산화시키는 것을 특징으로하는 실리콘 산화 방법을 이용한 본 발명의 소자 분리방법에 의하면 실리콘이온(Si+)주입에 의해 고농고화된 필드영역의 실리콘기판이 산화공정시 공급되는 산소와의 반응을 촉진하여 동일두께의 필드산화막 성장조건에서 버즈비크가 크게 개선되는 효과가 있으며, 또한 필드 산화막 형태의 윤곽을 좋게 개선하여 표면평탄도를 향상시켜 반도체장치의 제조공정을 간단히 하면서 고집적화하는데 크게 기열할 수 있다.The present invention relates to a method of manufacturing a semiconductor device, in which silicon ions (Si + ) are injected into a portion of a silicon substrate to oxidize a portion of an oxide film thicker than other portions of the silicon substrate of the semiconductor device. According to the device isolation method of the present invention using the silicon oxidation method characterized in that the silicon substrate in the highly concentrated field region by silicon ion (Si + ) implantation promotes the reaction with oxygen supplied during the oxidation process, Buzz be greatly improved under the growth conditions of the field oxide, and the surface flatness can be improved by improving the outline of the shape of the field oxide film, thereby simplifying the manufacturing process of the semiconductor device.

Description

반도체장치의 제조방법Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3A도 내지 제3D도는 본 발명에 의한 바람직한 실시예에 반도체장치의 LOCOS소자분리방법을 제조공정 순서별로 도시한단면도들이다.3A to 3D are cross-sectional views showing the LOCOS device isolation method of the semiconductor device according to the manufacturing process in the preferred embodiment of the present invention.

Claims (8)

반도체장치의 인접한 소자를 상호분리하는데 있어서, 실리콘기판위에 완충산화막 및 질화막을 순차로 적층형성하여 필드영역을 개구하는 공정 ; 채널저지이온 및 실리콘이온(Si+)을 필드영역에 이온 주입시키는 공정 ; 이어서 상기 필드영역을산화하여 필드산화막을 형성시킨다음, 상기 적층막을 제거하는 공정을 구비하여 이루어진 것을 특징으로 하는 반도체장치의 소자분리방법.A step of forming a buffer oxide film and a nitride film sequentially on a silicon substrate to mutually separate adjacent elements of the semiconductor device to open the field region; Ion implanting channel blocking ions and silicon ions (Si + ) into the field region; And forming a field oxide film by oxidizing the field region, and then removing the laminated film. 제1항에 있어서, 채널저지이온 및 실리콘이온을 필드영역에 이온주입시키는데 있어서 채널저지이온 주입공정후, 실리콘이온 주입공정이 수행되는 것을 특징으로 하는 반도체 장치의 소자분리방법.2. The method of claim 1, wherein the silicon ion implantation process is performed after the channel blocking ion implantation step in implanting the channel blocking ion and the silicon ion into the field region. 제2항에 있어서, 실리콘이온 주입공정후에 채널저지이온을 필드영역에 주입시키는 것을 특징으로 하는 반도체장치의 소자분리방법.3. The method of claim 2, wherein the channel blocking ion is implanted into the field region after the silicon ion implantation process. 제2항 및 제3항의 어느 한항에 있어서 실리콘이온 주입된 필드 영역은 액티브 영역에 비해 실리콘기판이 고농도 인것을 특징으로 하는 반도체장치의 소자분리방법.The method of claim 2 or 3, wherein the silicon ion implanted field region has a higher concentration of silicon substrate than the active region. 제2항 및 제3항의 어느한항에 있어서 상기 실리콘이온(Si+)의 주입농도는 1.0E16Cm-2∼1.0E20Cm-2이상인 것을 특징으로 하는 반도체장치의 소자분리방법.The device isolation method according to any one of claims 2 and 3, wherein the implantation concentration of silicon ions (Si + ) is 1.0E16Cm -2 to 1.0E20Cm -2 or more. 반도체장치의 실리콘기판에 있어서 일정부분의 산화막을 다른 부위에 비해 더 두껍게 성장시키기는 위하여 상기 실리콘기판의 일정 부분에 실리콘이온(Si+)을 주입하여 산화시키는 것을 특징으로 하는 실리콘 산화방법.In the silicon substrate of the semiconductor device, in order to grow a certain portion of the oxide film thicker than other parts, silicon ions (Si + ) is injected into a predetermined portion of the silicon substrate, characterized in that the silicon oxidation method. 제6항에 있어서, 상기 실리콘기판 대신에 폴리실리콘층을 이용하여 일정부분의 산화막 두께를 두껍게 형성시키는 것을 특징으로 하는 폴리실리콘 산화 방법.7. The polysilicon oxidation method according to claim 6, wherein a thickness of a portion of the oxide film is thickened using a polysilicon layer instead of the silicon substrate. 제6항 및 제7항에 있어서 상기 실리콘기판 및 폴리실리콘층 대신 비정질 실리콘층을 이용하여 일정부분의 막을 두껍게 산화시키는 것을 특징으로 하는 비정질 실리콘 산화방법.The amorphous silicon oxidation method according to claim 6 or 7, wherein a portion of the film is oxidized thick by using an amorphous silicon layer instead of the silicon substrate and the polysilicon layer. ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.
KR1019920000057A 1992-01-06 1992-01-06 Manufacturing method of semiconductor device KR940008322B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920000057A KR940008322B1 (en) 1992-01-06 1992-01-06 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920000057A KR940008322B1 (en) 1992-01-06 1992-01-06 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
KR930017136A true KR930017136A (en) 1993-08-30
KR940008322B1 KR940008322B1 (en) 1994-09-12

Family

ID=19327565

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920000057A KR940008322B1 (en) 1992-01-06 1992-01-06 Manufacturing method of semiconductor device

Country Status (1)

Country Link
KR (1) KR940008322B1 (en)

Also Published As

Publication number Publication date
KR940008322B1 (en) 1994-09-12

Similar Documents

Publication Publication Date Title
US5712186A (en) Method for growing field oxide to minimize birds' beak length
JP2008028403A (en) Method for forming first oxide layer, and second oxide layer
KR960019649A (en) Manufacturing Method of Semiconductor Device
US5439842A (en) Low temperature oxide layer over field implant mask
KR930017136A (en) Manufacturing Method of Semiconductor Device
JPH03142856A (en) Manufacture of semiconductor device
KR940012575A (en) Trench isolation manufacturing method of semiconductor device
TW356559B (en) Method for fabricating semiconductor devices having triple well
KR960026413A (en) Method for forming gettering layer on silicon substrate
KR0167231B1 (en) Isolation method for semiconductor device
JP3344162B2 (en) Method for manufacturing field effect semiconductor device
JPH01297837A (en) Manufacture of semiconductor device
KR940003221B1 (en) Making method for field oxide of mos
JPH021940A (en) Mos field-effect transistor having ldd structure
KR100223908B1 (en) Method of forming an element isolation region in a semiconductor device
JPS61184833A (en) Manufacture of semiconductor device
JPS63280437A (en) Formation of isolation region of semiconductor device
JPH03222480A (en) Semiconductor device and manufacture thereof
JPS6451647A (en) Manufacture of trench type capacitor
JPH04297055A (en) Manufacture of semiconductor device
KR920007181A (en) Manufacturing Method of N-MOS LDD Transistor
JPH0198246A (en) Manufacture of semiconductor device
JPH01181557A (en) Manufacture of semiconductor device
JPS645069A (en) Manufacture of semiconductor device
KR910019115A (en) LOCOS Isolation Cell Manufacturing Method

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20020807

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee