KR930014075A - Modular system for controlling burst transfer of data between bus and memory - Google Patents
Modular system for controlling burst transfer of data between bus and memory Download PDFInfo
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- KR930014075A KR930014075A KR1019910024512A KR910024512A KR930014075A KR 930014075 A KR930014075 A KR 930014075A KR 1019910024512 A KR1019910024512 A KR 1019910024512A KR 910024512 A KR910024512 A KR 910024512A KR 930014075 A KR930014075 A KR 930014075A
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- data
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- bit
- module
- controlling
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Abstract
본 발명은 병렬처리 시스템을 구성하는 노드의 내부구조에서 64비트의 버스(MBUS)와 32비트의 노드 메모리사이의 데이타의 입출력시 버스의 클럭에 동기화 되면서 64비트 데이타 폭을 최대한 이용하기 위해 버스트모드(burst mode)전송을 효율적으로 지원하기 위한 버스와 메모리사이에서 데이타의 버스트 전송을 제어하기 위한 모듈 시스템을 제공하는 것이다.The present invention is a burst mode for maximizing the 64-bit data width while being synchronized to the clock of the bus during input and output of data between the 64-bit bus (MBUS) and 32-bit node memory in the internal structure of the node constituting the parallel processing system (burst mode) Provides a modular system for controlling the burst transfer of data between the bus and the memory to support transfer efficiently.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 노드 메모리 인터페이스를 위한 본 발명의 도면.1 is a diagram of the present invention for a node memory interface.
제2도는 Burst모듈의 동작을 위한 블럭구성도를 나타낸 도면.2 is a block diagram for the operation of the burst module.
제5도는 버스트와 관련한 모듈간의 동작 흐름도.5 is a flowchart of operation between modules in relation to a burst.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910024512A KR930014075A (en) | 1991-12-26 | 1991-12-26 | Modular system for controlling burst transfer of data between bus and memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910024512A KR930014075A (en) | 1991-12-26 | 1991-12-26 | Modular system for controlling burst transfer of data between bus and memory |
Publications (1)
Publication Number | Publication Date |
---|---|
KR930014075A true KR930014075A (en) | 1993-07-22 |
Family
ID=67345853
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910024512A KR930014075A (en) | 1991-12-26 | 1991-12-26 | Modular system for controlling burst transfer of data between bus and memory |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930014075A (en) |
-
1991
- 1991-12-26 KR KR1019910024512A patent/KR930014075A/en not_active Application Discontinuation
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E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |