KR920700474A - Sos 및 soi 장치의 메사 구조를 위한 연부 도핑 프로세스 - Google Patents
Sos 및 soi 장치의 메사 구조를 위한 연부 도핑 프로세스Info
- Publication number
- KR920700474A KR920700474A KR1019900702650A KR900702650A KR920700474A KR 920700474 A KR920700474 A KR 920700474A KR 1019900702650 A KR1019900702650 A KR 1019900702650A KR 900702650 A KR900702650 A KR 900702650A KR 920700474 A KR920700474 A KR 920700474A
- Authority
- KR
- South Korea
- Prior art keywords
- sos
- doping process
- mesa structures
- soi devices
- soft doping
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
- H01L21/86—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/031—Diffusion at an edge
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/044—Edge diffusion under mask
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US352.583 | 1989-04-27 | ||
US07/352,583 US5028564A (en) | 1989-04-27 | 1989-04-27 | Edge doping processes for mesa structures in SOS and SOI devices |
USPUS90/01553 | 1990-03-23 | ||
PCT/US1990/001553 WO1990013141A1 (en) | 1989-04-27 | 1990-03-23 | Edge doping processes for mesa structures in sos and soi devices |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920700474A true KR920700474A (ko) | 1992-02-19 |
KR940005721B1 KR940005721B1 (ko) | 1994-06-23 |
Family
ID=23385716
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900702650A KR940005721B1 (ko) | 1989-04-27 | 1990-03-23 | Sos 및 soi 장치의 메사 구조를 위한 연부 도핑 프로세스 |
Country Status (6)
Country | Link |
---|---|
US (1) | US5028564A (ko) |
EP (1) | EP0422152B1 (ko) |
JP (1) | JPH03505654A (ko) |
KR (1) | KR940005721B1 (ko) |
DE (1) | DE69015547D1 (ko) |
WO (1) | WO1990013141A1 (ko) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR970003848B1 (ko) * | 1991-10-17 | 1997-03-22 | 미쓰비시덴키 가부시키가이샤 | 반도체 장치 및 그 제조방법 |
DE4233777C2 (de) * | 1991-10-17 | 1997-06-26 | Mitsubishi Electric Corp | Herstellungsverfahren für eine Halbleitereinrichtung |
US5308790A (en) * | 1992-10-16 | 1994-05-03 | Ncr Corporation | Selective sidewall diffusion process using doped SOG |
JP3001362B2 (ja) * | 1993-12-17 | 2000-01-24 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3504025B2 (ja) * | 1995-06-06 | 2004-03-08 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
KR0164079B1 (ko) * | 1995-06-30 | 1998-12-01 | 김주용 | 반도체 소자 및 그 제조방법 |
US5882961A (en) * | 1995-09-11 | 1999-03-16 | Motorola, Inc. | Method of manufacturing semiconductor device with reduced charge trapping |
US5882981A (en) * | 1996-07-30 | 1999-03-16 | Texas Instruments Incorporated | Mesa isolation Refill Process for Silicon on Insulator Technology Using Flowage Oxides as the Refill Material |
US5910339A (en) * | 1996-08-22 | 1999-06-08 | Cornell Research Foundation, Inc. | Fabrication of atomic step-free surfaces |
TW451284B (en) * | 1996-10-15 | 2001-08-21 | Semiconductor Energy Lab | Semiconductor device and method of manufacturing the same |
US6140160A (en) | 1997-07-28 | 2000-10-31 | Micron Technology, Inc. | Method for fabricating a simplified CMOS polysilicon thin film transistor and resulting structure |
US5937289A (en) * | 1998-01-06 | 1999-08-10 | International Business Machines Corporation | Providing dual work function doping |
US6274887B1 (en) | 1998-11-02 | 2001-08-14 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method therefor |
US7141821B1 (en) * | 1998-11-10 | 2006-11-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having an impurity gradient in the impurity regions and method of manufacture |
US6277679B1 (en) | 1998-11-25 | 2001-08-21 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing thin film transistor |
US6646287B1 (en) | 1999-11-19 | 2003-11-11 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device with tapered gate and insulating film |
US6503841B1 (en) * | 2000-07-07 | 2003-01-07 | Agere Systems Inc. | Oxide etch |
US6645795B2 (en) * | 2001-05-03 | 2003-11-11 | International Business Machines Corporation | Polysilicon doped transistor using silicon-on-insulator and double silicon-on-insulator |
US7202123B1 (en) | 2004-07-02 | 2007-04-10 | Advanced Micro Devices, Inc. | Mesa isolation technology for extremely thin silicon-on-insulator semiconductor devices |
US20080048799A1 (en) * | 2006-07-12 | 2008-02-28 | Chao-Wei Wang | Discontinuous Transmission Line Structure |
JP2014116342A (ja) * | 2012-12-06 | 2014-06-26 | Toshiba Corp | 半導体装置の製造方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3890632A (en) * | 1973-12-03 | 1975-06-17 | Rca Corp | Stabilized semiconductor devices and method of making same |
CA1040321A (en) * | 1974-07-23 | 1978-10-10 | Alfred C. Ipri | Polycrystalline silicon resistive device for integrated circuits and method for making same |
US4054895A (en) * | 1976-12-27 | 1977-10-18 | Rca Corporation | Silicon-on-sapphire mesa transistor having doped edges |
DE2733778A1 (de) * | 1977-07-27 | 1979-02-08 | Krauss Maffei Ag | Verfahren und einrichtung zum regeln der umfangsgeschwindigkeit einer mehrzahl von fahrzeugraedern |
US4199860A (en) * | 1977-11-11 | 1980-04-29 | Rca Corporation | Method of integrating semiconductor components |
US4178605A (en) * | 1978-01-30 | 1979-12-11 | Rca Corp. | Complementary MOS inverter structure |
US4178191A (en) * | 1978-08-10 | 1979-12-11 | Rca Corp. | Process of making a planar MOS silicon-on-insulating substrate device |
US4252574A (en) * | 1979-11-09 | 1981-02-24 | Rca Corporation | Low leakage N-channel SOS transistors and method of making them |
US4649626A (en) * | 1985-07-24 | 1987-03-17 | Hughes Aircraft Company | Semiconductor on insulator edge doping process using an expanded mask |
JPS62239579A (ja) * | 1986-04-10 | 1987-10-20 | Alps Electric Co Ltd | 薄膜トランジスタの製造方法 |
US4753896A (en) * | 1986-11-21 | 1988-06-28 | Texas Instruments Incorporated | Sidewall channel stop process |
-
1989
- 1989-04-27 US US07/352,583 patent/US5028564A/en not_active Expired - Fee Related
-
1990
- 1990-03-23 EP EP90905325A patent/EP0422152B1/en not_active Expired - Lifetime
- 1990-03-23 KR KR1019900702650A patent/KR940005721B1/ko active IP Right Grant
- 1990-03-23 JP JP2505281A patent/JPH03505654A/ja active Pending
- 1990-03-23 DE DE69015547T patent/DE69015547D1/de not_active Expired - Lifetime
- 1990-03-23 WO PCT/US1990/001553 patent/WO1990013141A1/en active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
JPH03505654A (ja) | 1991-12-05 |
EP0422152A1 (en) | 1991-04-17 |
EP0422152B1 (en) | 1994-12-28 |
KR940005721B1 (ko) | 1994-06-23 |
US5028564A (en) | 1991-07-02 |
WO1990013141A1 (en) | 1990-11-01 |
DE69015547D1 (de) | 1995-02-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
NORF | Unpaid initial registration fee |