KR920010866A - Metal Wire Rework Process of Semiconductor Device - Google Patents

Metal Wire Rework Process of Semiconductor Device Download PDF

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Publication number
KR920010866A
KR920010866A KR1019900018269A KR900018269A KR920010866A KR 920010866 A KR920010866 A KR 920010866A KR 1019900018269 A KR1019900018269 A KR 1019900018269A KR 900018269 A KR900018269 A KR 900018269A KR 920010866 A KR920010866 A KR 920010866A
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KR
South Korea
Prior art keywords
metal layer
semiconductor device
metal wire
rework process
predetermined thickness
Prior art date
Application number
KR1019900018269A
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Korean (ko)
Inventor
구길서
Original Assignee
문정환
금성일렉트론 주식회사
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019900018269A priority Critical patent/KR920010866A/en
Publication of KR920010866A publication Critical patent/KR920010866A/en

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Abstract

내용 없음No content

Description

반도체 장치의 금속배선 재작업공정Metal Wire Rework Process of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제4도는 본 발명에 따른 제2금속층의 재작업을 설명하기 위한 제조공정도이다.4 is a manufacturing process diagram for explaining the rework of the second metal layer according to the present invention.

Claims (3)

제1금속층, 중간층, 제2금속층이 차례로 도포된 상태에 상기 제2금속층에 결함이 있는 반도체 장치에 있어서, (a) 상기 결함이 있는 제2금속층을 소정의 두께만 남기고 제거하는 공정과, (b) 상기 소정이 두께의 제2금속층을 콘택부분만 남기고 나머지는 제거하는 공정과, (c) 전면에 정상적인 제2금속층을 도포하는 공정으로 이루어진 반도체 장치의 금속배선 재작업공정.A semiconductor device having a defect in a second metal layer in a state in which a first metal layer, an intermediate layer, and a second metal layer are sequentially applied, the method comprising: (a) removing the defective second metal layer with only a predetermined thickness; b) removing the remaining portion of the second metal layer having a predetermined thickness, leaving only the contact portion; and (c) applying a normal second metal layer to the entire surface. 제1항에 있어서, 상기 공정(a)에 의하여 남게되는 상기 제2금속층의 두께는, 상기 제2금속의 두께가 30퍼센트인 것을 특징으로하는 반도체 장치의 금속배선 재작업공정.The process of claim 1, wherein the thickness of the second metal layer left by the step (a) is 30 percent. 제1항에 있어서, 상기 공정(b)는 포토에칭공정에 의하여 실행되는 것을 특징으로 하는 반도체 장치의 금속배선 재작업공정.The reworking process for metallization of a semiconductor device according to claim 1, wherein said step (b) is performed by a photoetching process. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900018269A 1990-11-12 1990-11-12 Metal Wire Rework Process of Semiconductor Device KR920010866A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900018269A KR920010866A (en) 1990-11-12 1990-11-12 Metal Wire Rework Process of Semiconductor Device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900018269A KR920010866A (en) 1990-11-12 1990-11-12 Metal Wire Rework Process of Semiconductor Device

Publications (1)

Publication Number Publication Date
KR920010866A true KR920010866A (en) 1992-06-27

Family

ID=67538047

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900018269A KR920010866A (en) 1990-11-12 1990-11-12 Metal Wire Rework Process of Semiconductor Device

Country Status (1)

Country Link
KR (1) KR920010866A (en)

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