KR930003384A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
KR930003384A
KR930003384A KR1019910011720A KR910011720A KR930003384A KR 930003384 A KR930003384 A KR 930003384A KR 1019910011720 A KR1019910011720 A KR 1019910011720A KR 910011720 A KR910011720 A KR 910011720A KR 930003384 A KR930003384 A KR 930003384A
Authority
KR
South Korea
Prior art keywords
insulator
manufacturing
semiconductor device
depositing
exposed
Prior art date
Application number
KR1019910011720A
Other languages
Korean (ko)
Inventor
권재길
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019910011720A priority Critical patent/KR930003384A/en
Publication of KR930003384A publication Critical patent/KR930003384A/en

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

내용 없음.No content.

Description

반도체 소자의 제조방법Manufacturing method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명 반도체 소자의 공정 단면도.2 is a process cross-sectional view of the semiconductor device of the present invention.

Claims (1)

게이트(3)가 형성된 기판(1)위에 콘택을 형성하여 메탈(6)을 증착하고 그위에 절연체(7)를 도포한 것에 있어서, 상기 절연체(7)위에 P/R(8)을 형성하고 플레인 마스크를 사용하여 P/R(8)을 노출 및 현상하므로 절연체(7)홈부위에 P/R(8)이 남도록 하는 공정과, 상기 P/R(8)사이로 노출된 절연체(7)부분을 식각한 후 P/R(8)을 제거하는 공정과, 상기 메탈(6)과 절연체(7)가 수평으로 평탄화된 상태에서 산화막(9)을 증착하는 공정을 차례로 실시하여서 이루어짐을 특징으로 하는 반도체 소자의 제조방법.In forming a contact on a substrate 1 on which a gate 3 is formed, depositing a metal 6 and applying an insulator 7 thereon, forming a P / R 8 on the insulator 7 and a plane. P / R (8) is exposed and developed using a mask so that the P / R (8) remains in the groove of the insulator (7), and the part of the insulator (7) exposed between the P / R (8) Removing the P / R (8) after etching, and depositing the oxide film (9) in a state where the metal (6) and the insulator (7) are horizontally planarized. Method of manufacturing the device. ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.※ Note: This is to be disclosed by the original application.
KR1019910011720A 1991-07-10 1991-07-10 Manufacturing method of semiconductor device KR930003384A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910011720A KR930003384A (en) 1991-07-10 1991-07-10 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910011720A KR930003384A (en) 1991-07-10 1991-07-10 Manufacturing method of semiconductor device

Publications (1)

Publication Number Publication Date
KR930003384A true KR930003384A (en) 1993-02-24

Family

ID=67440882

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910011720A KR930003384A (en) 1991-07-10 1991-07-10 Manufacturing method of semiconductor device

Country Status (1)

Country Link
KR (1) KR930003384A (en)

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