KR940016735A - Method for manufacturing metal wiring of semiconductor device - Google Patents

Method for manufacturing metal wiring of semiconductor device Download PDF

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Publication number
KR940016735A
KR940016735A KR1019920027327A KR920027327A KR940016735A KR 940016735 A KR940016735 A KR 940016735A KR 1019920027327 A KR1019920027327 A KR 1019920027327A KR 920027327 A KR920027327 A KR 920027327A KR 940016735 A KR940016735 A KR 940016735A
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KR
South Korea
Prior art keywords
metal wiring
forming
semiconductor device
manufacturing
cell
Prior art date
Application number
KR1019920027327A
Other languages
Korean (ko)
Inventor
최양규
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019920027327A priority Critical patent/KR940016735A/en
Publication of KR940016735A publication Critical patent/KR940016735A/en

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Abstract

본 발명은 셀(Cell)과 주변회로(Periphery)에 서로 다른 단차를 갖는 반도체 소자의 금속 배선 제조 방법에 있어서, 셀과 동일하게 주변회로에 단차유발층(9a, 9b, 10)을 형성하는 제 1 단계, 상기 제 1 단계후에 전체 구조 상부에 절연막(11)을 도포하고 콘택홀을 형성하여 플러그(13)를 형성한 다음에 금속배선층(14)을 형성하는 제 2 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 금속 배선 제조 방법에 관한 것이다.The present invention provides a method for manufacturing a metal wiring of a semiconductor device having different steps in a cell and a peripheral circuit, wherein the step-inducing layers 9a, 9b, and 10 are formed in the peripheral circuit in the same manner as the cell. And a second step of forming the plug 13 by applying the insulating film 11 over the entire structure after the first step, forming a contact hole, and then forming the metallization layer 14. It relates to a metal wiring manufacturing method of a semiconductor device.

Description

반도체 소자의 금속 배선 제조 방법Method for manufacturing metal wiring of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 4 도는 본 발명에 따를 워드라인 스트랩핑 평면도, 제 5 도는 제 4 도의 a-a'단면도, 제 6 도는 제 4 도 b-b' 단면도.4 is a plan view of a word line strapping according to the present invention, FIG. 5 is a cross-sectional view taken along line a-a 'of FIG. 4, and FIG.

Claims (2)

셀(Cell)과 주변회로(Periphery)에 서로 다른 단차를 갖는 반도체 소자의 금속 배선 제조 방법에 있어서, 셀과 동일하게 주변회로에 단차유발층(9a, 9b, 10)을 형성하는 제 1 단계, 상기 제 1 단계후에 전체 구조 상부에 절연막(11)을 도포하고 콘택홀을 형성하여 플러그(13)를 형성한 다음에 금속배선층(14)을 형성하는 제 2 단계를 포함하여 이루어지는 것을 특징으로 하는 반도체 소자의 금속 배선 제조 방법.In the method of manufacturing a metal wiring of a semiconductor device having a different step between the cell (Cell) and the peripheral circuit (Periphery), the first step of forming the step-induced layer (9a, 9b, 10) in the peripheral circuit like the cell, And a second step of forming the plug 13 by applying the insulating film 11 over the entire structure after the first step, forming the contact hole, and then forming the metallization layer 14. Method for manufacturing metal wiring of the device. 제 1 항에 있어서, 상기 제 1 단계의 단차유발층은 제 1 축전기(9a), 제 2 축전기(9b), 플레이트판(10)으로 이루어지되 축전기 역할을 하지 못하는 단차 개선을 위한 패드(pad)증인 것을 특징으로 하는 반도체 소자의 금속 배선 제조방법.The method of claim 1, wherein the step inducing layer of the first step is made of a first capacitor (9a), a second capacitor (9b), a plate plate 10, the pad for improving the step that does not act as a capacitor The metal wiring manufacturing method of a semiconductor element characterized by the above-mentioned. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920027327A 1992-12-31 1992-12-31 Method for manufacturing metal wiring of semiconductor device KR940016735A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920027327A KR940016735A (en) 1992-12-31 1992-12-31 Method for manufacturing metal wiring of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920027327A KR940016735A (en) 1992-12-31 1992-12-31 Method for manufacturing metal wiring of semiconductor device

Publications (1)

Publication Number Publication Date
KR940016735A true KR940016735A (en) 1994-07-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920027327A KR940016735A (en) 1992-12-31 1992-12-31 Method for manufacturing metal wiring of semiconductor device

Country Status (1)

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KR (1) KR940016735A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100748821B1 (en) * 1997-12-18 2007-10-16 엘피다 메모리, 아이엔씨. Semiconductor integrated circuit device and process for manufacturing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100748821B1 (en) * 1997-12-18 2007-10-16 엘피다 메모리, 아이엔씨. Semiconductor integrated circuit device and process for manufacturing the same

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