KR930002877A - Method for manufacturing conductive layer pattern without step - Google Patents

Method for manufacturing conductive layer pattern without step Download PDF

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Publication number
KR930002877A
KR930002877A KR1019910011474A KR910011474A KR930002877A KR 930002877 A KR930002877 A KR 930002877A KR 1019910011474 A KR1019910011474 A KR 1019910011474A KR 910011474 A KR910011474 A KR 910011474A KR 930002877 A KR930002877 A KR 930002877A
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KR
South Korea
Prior art keywords
conductive layer
layer pattern
mask
groove
forming
Prior art date
Application number
KR1019910011474A
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Korean (ko)
Other versions
KR940005609B1 (en
Inventor
손광식
양종열
성진모
Original Assignee
정몽헌
현대전자산업 주식회사
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Application filed by 정몽헌, 현대전자산업 주식회사 filed Critical 정몽헌
Priority to KR1019910011474A priority Critical patent/KR940005609B1/en
Publication of KR930002877A publication Critical patent/KR930002877A/en
Application granted granted Critical
Publication of KR940005609B1 publication Critical patent/KR940005609B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음.No content.

Description

단차가 없는 도전층 패턴 제조방법Method for manufacturing conductive layer pattern without step

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 단차가 발생된 다층구조의 도전층 패턴을 도시한 단면도.1 is a cross-sectional view showing a conductive layer pattern of a multilayer structure in which a step is generated.

제3도는 본 발명의 제1실시예의 도전층 패턴을 도시한 레이아웃트도.3 is a layout diagram showing a conductive layer pattern of the first embodiment of the present invention.

Claims (3)

반도체 소자 제조공정에 있어서, 기판 상부에 도전층 패턴을 형성하되 단차가 없는 도전층 패턴을 형성하기 위하여, 기판상부에 예정된 두께의 절연층을 형성하고 도전층 패턴 마스크와는 극성이 반대인 마스크를 이용하여 절연층의 소정두께를 제거한 도전층 패턴의 요홈을 형성하는 단계와, 절연층 상부에 도전층을 증착하고 도전층 패턴 마스크를 이용하여 상기 도전층 패턴의 요홈에 도전층 패턴을 형성하는 것을 특징으로 하는 단차가 없는 도전층 패턴 제조방법.In the semiconductor device manufacturing process, in order to form a conductive layer pattern on the substrate, but to form a conductive layer pattern without a step, an insulating layer having a predetermined thickness is formed on the substrate, and a mask having a polarity opposite to that of the conductive layer pattern mask is formed. Forming a groove of a conductive layer pattern having a predetermined thickness removed from the insulating layer, and depositing a conductive layer on the insulating layer and forming a conductive layer pattern in the groove of the conductive layer pattern using a conductive layer pattern mask. Method for producing a conductive layer pattern without a step characterized in that. 제1항에 있어서, 기판 상부에 또다른 하부 절연층을 형성하고 그 상부에 단차가 있는 도전층 패턴을 형성한 다음 그 상부에 예정된 두께의 절연층을 형성하고 도전층 패턴 마스크와는 극성이 반대인 마스크를 이용하여 도전층 패턴의 요홈을 형성한 다음, 그 상부에 도전층을 증착하고 도전층 패턴의 요홈에 도전층 패턴 마스크를 이용하여 도전층 패턴을 형성하는 것을 포함하는 것을 특징으로 하는 단차가 없는 도전층 패턴 제조방법.The method of claim 1, wherein another lower insulating layer is formed on the substrate, and a stepped conductive layer pattern is formed thereon, and an insulating layer having a predetermined thickness is formed thereon, and the polarity of the conductive layer pattern mask is reversed. Forming a groove of the conductive layer pattern by using an in-mask, and then depositing a conductive layer thereon, and forming a conductive layer pattern by using a conductive layer pattern mask in the groove of the conductive layer pattern. Conductive layer pattern manufacturing method. 제1 또는 2항에 있어서, 상기 도전층 패턴의 요홈에 도전층 패턴이 하부의 기판 또는 하부도전층 패턴에 콘택하기 위하여, 예정된 두께의 절연층을 형성한 다음 콘택 마스크를 사용하여 예정된 절연층 영역에 콘택홈을 형성한 후 도전층 패턴 마스크와는 극성이 반대인 마스크를 이용하여 도전층 패턴의 요홈을 형성하는 것을 특징으로 하는 단차가 없는 도전층 패턴 제조방법.The predetermined insulating layer region according to claim 1 or 2, wherein an insulating layer having a predetermined thickness is formed in order to contact the lower substrate or the lower conductive layer pattern with the conductive layer pattern in the groove of the conductive layer pattern. And forming a groove in the conductive layer pattern using a mask having a polarity opposite to that of the conductive layer pattern mask after forming the contact groove in the conductive layer pattern mask. ※ 참고사항: 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the original application.
KR1019910011474A 1991-07-08 1991-07-08 Method of making pattern KR940005609B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910011474A KR940005609B1 (en) 1991-07-08 1991-07-08 Method of making pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910011474A KR940005609B1 (en) 1991-07-08 1991-07-08 Method of making pattern

Publications (2)

Publication Number Publication Date
KR930002877A true KR930002877A (en) 1993-02-23
KR940005609B1 KR940005609B1 (en) 1994-06-21

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ID=19316866

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910011474A KR940005609B1 (en) 1991-07-08 1991-07-08 Method of making pattern

Country Status (1)

Country Link
KR (1) KR940005609B1 (en)

Also Published As

Publication number Publication date
KR940005609B1 (en) 1994-06-21

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