KR920013671A - Method for manufacturing gallium arsenide device formed of multi-layer heterostructure - Google Patents

Method for manufacturing gallium arsenide device formed of multi-layer heterostructure Download PDF

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Publication number
KR920013671A
KR920013671A KR1019900021806A KR900021806A KR920013671A KR 920013671 A KR920013671 A KR 920013671A KR 1019900021806 A KR1019900021806 A KR 1019900021806A KR 900021806 A KR900021806 A KR 900021806A KR 920013671 A KR920013671 A KR 920013671A
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South Korea
Prior art keywords
gallium arsenide
layer
device formed
epitaxial layer
manufacturing
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Application number
KR1019900021806A
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Korean (ko)
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KR940004274B1 (en
Inventor
이정희
박성호
이종람
김진섭
박형무
Original Assignee
경상현
재단법인 한국전자통신연구소
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Priority to KR1019900021806A priority Critical patent/KR940004274B1/en
Publication of KR920013671A publication Critical patent/KR920013671A/en
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Publication of KR940004274B1 publication Critical patent/KR940004274B1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Element Separation (AREA)

Abstract

내용 없음No content

Description

다층 이종구조로 형성된 갈륨비소 소자의 제조방법Method for manufacturing gallium arsenide device formed of multi-layer heterostructure

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도의 (가)~(나)는 본발명의 제조공정을 나타낸 단면도.(A)-(b) of FIG. 1 is sectional drawing which shows the manufacturing process of this invention.

Claims (1)

다층구조로 형성된 소자의 제조방법에 있어서, 갈륨비소기판(1)의 상면이 제1소자용 에피층(2), 알루미늄 갈륨비소층(3a), 절연성 갈륨비소층(3c), 알루미늄갈륨비소층(3b)을 차례로 증착하는 단계와 제2소자용 에피층(4)의 위에 감광막패(5)를 소정의 두께로 입히는 단계와, 제1소자용 에피층(2a)과 제2소자용에피층(4a)의 상면에 금속막(6)을 소정의 두께로 증착하는 단계와, 소자분리용 감광막패턴(5a)을 이용하여 소자분리영역(7)을 증착하는 단계들을 차례로 수행함으로서 하나의 기판상에서 다수 이종구조로 형성된 갈륨비소 소자의 제조방법.In the device manufacturing method of the multi-layered structure, the upper surface of the gallium arsenide substrate 1 has an epitaxial layer 2 for the first device, an aluminum gallium arsenide layer 3a, an insulating gallium arsenide layer 3c, and an aluminum gallium arsenide layer. (3b) sequentially depositing, coating the photosensitive film 5 on the second epitaxial layer 4 to a predetermined thickness, the first epitaxial layer 2a and the second epitaxial layer for the second element Depositing the metal film 6 to a predetermined thickness on the upper surface of the substrate 4a, and depositing the device isolation region 7 using the device isolation photoresist pattern 5a in this order. Method for manufacturing a gallium arsenide device formed of a plurality of heterostructures. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900021806A 1990-12-26 1990-12-26 MANUFACTURING METHOD OF MULTI-LAYERS GaAs DEVICE KR940004274B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900021806A KR940004274B1 (en) 1990-12-26 1990-12-26 MANUFACTURING METHOD OF MULTI-LAYERS GaAs DEVICE

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900021806A KR940004274B1 (en) 1990-12-26 1990-12-26 MANUFACTURING METHOD OF MULTI-LAYERS GaAs DEVICE

Publications (2)

Publication Number Publication Date
KR920013671A true KR920013671A (en) 1992-07-29
KR940004274B1 KR940004274B1 (en) 1994-05-19

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900021806A KR940004274B1 (en) 1990-12-26 1990-12-26 MANUFACTURING METHOD OF MULTI-LAYERS GaAs DEVICE

Country Status (1)

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KR (1) KR940004274B1 (en)

Also Published As

Publication number Publication date
KR940004274B1 (en) 1994-05-19

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