KR920007243A - Cylindrical Stack Capacitor Cell Manufacturing Method - Google Patents

Cylindrical Stack Capacitor Cell Manufacturing Method Download PDF

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Publication number
KR920007243A
KR920007243A KR1019900014390A KR900014390A KR920007243A KR 920007243 A KR920007243 A KR 920007243A KR 1019900014390 A KR1019900014390 A KR 1019900014390A KR 900014390 A KR900014390 A KR 900014390A KR 920007243 A KR920007243 A KR 920007243A
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KR
South Korea
Prior art keywords
polysilicon
forming
defining
capacitor cell
oxide film
Prior art date
Application number
KR1019900014390A
Other languages
Korean (ko)
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KR930008542B1 (en
Inventor
이세경
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019900014390A priority Critical patent/KR930008542B1/en
Publication of KR920007243A publication Critical patent/KR920007243A/en
Application granted granted Critical
Publication of KR930008542B1 publication Critical patent/KR930008542B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers

Abstract

내용 없음No content

Description

실린더형 스택 커패시터 셀 제조방법Cylindrical Stack Capacitor Cell Manufacturing Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 공정 단면도.2 is a cross-sectional view of the process of the present invention.

Claims (1)

기판위에 액티브영역과 격리 영역을 한정한후 실리콘 이산화막 습식 에치를 위한 얇은 실리콘 질화막 마스크층을 입히고 한정하는 공정; 후공정시 형성될 커패시턴스 영역아래에 폴리실리콘 버퍼층을 형성하고 한정하는 공정; 표면이 평탄하게 두꺼운 CVD산화막을 입히고 선택적 식각한후 스토리지 노드로 사용될 폴리실리콘을 형성하고 사진식각 기술로 상기 폴리실리콘의 중심부가 돌출되게 식각하는 공정; 상기 폴리실리콘의 상부와 하부를 RIE하고 CVD산화막을 제거하는 공정; 유전막을 입히고 그위에 셀 플레이트를 형성한후 CVD텅스텐 플러그를사용하여 비트라인 콘택트를 형성하는 공정을 차례로 실시함을 특징으로 하는 실린더형 스택 커패시터 셀 제조방법.Defining an active region and an isolation region on the substrate, and then applying and defining a thin silicon nitride mask layer for silicon dioxide wet etch; Forming and defining a polysilicon buffer layer under a capacitance region to be formed during a later process; Forming a polysilicon to be used as a storage node after coating and selectively etching a thick CVD oxide film having a flat surface, and etching the core of the polysilicon to protrude by photolithography; RIE the upper and lower portions of the polysilicon and remove the CVD oxide film; A method of manufacturing a cylindrical stacked capacitor cell, comprising sequentially applying a dielectric film, forming a cell plate thereon, and subsequently forming bit line contacts using a CVD tungsten plug. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900014390A 1990-09-12 1990-09-12 Manufacturing method of capacitor of semiconductor device KR930008542B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900014390A KR930008542B1 (en) 1990-09-12 1990-09-12 Manufacturing method of capacitor of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900014390A KR930008542B1 (en) 1990-09-12 1990-09-12 Manufacturing method of capacitor of semiconductor device

Publications (2)

Publication Number Publication Date
KR920007243A true KR920007243A (en) 1992-04-28
KR930008542B1 KR930008542B1 (en) 1993-09-09

Family

ID=19303507

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900014390A KR930008542B1 (en) 1990-09-12 1990-09-12 Manufacturing method of capacitor of semiconductor device

Country Status (1)

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KR (1) KR930008542B1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101682923B1 (en) 2016-06-15 2016-12-06 주식회사 노빌테크 Manufacturing method of channel type prestressed girder and the construction method using the girder manufactured thereby
KR101693256B1 (en) 2016-08-04 2017-01-05 주식회사 노빌테크 Construction method of prefabricated psc bridge

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101682923B1 (en) 2016-06-15 2016-12-06 주식회사 노빌테크 Manufacturing method of channel type prestressed girder and the construction method using the girder manufactured thereby
KR101693256B1 (en) 2016-08-04 2017-01-05 주식회사 노빌테크 Construction method of prefabricated psc bridge

Also Published As

Publication number Publication date
KR930008542B1 (en) 1993-09-09

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