KR910016069A - Lead frame and semiconductor device - Google Patents
Lead frame and semiconductor device Download PDFInfo
- Publication number
- KR910016069A KR910016069A KR1019900014537A KR900014537A KR910016069A KR 910016069 A KR910016069 A KR 910016069A KR 1019900014537 A KR1019900014537 A KR 1019900014537A KR 900014537 A KR900014537 A KR 900014537A KR 910016069 A KR910016069 A KR 910016069A
- Authority
- KR
- South Korea
- Prior art keywords
- plane
- lead frame
- semiconductor device
- metal plane
- inner lead
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
내용 없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명에 의한 반도체장치의 일실시예를 나타낸 단면도, 제2도는 반도체장치에 사용되는 리드프레임의 저면도, 제3도는 와이어 본딩 영역등을 확대시켜 나타낸 설명도.1 is a cross-sectional view showing an embodiment of a semiconductor device according to the present invention, FIG. 2 is a bottom view of a lead frame used in a semiconductor device, and FIG. 3 is an explanatory view showing an enlarged wire bonding area or the like.
Claims (3)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26786/2 | 1990-02-06 | ||
JP2026786A JP2784235B2 (en) | 1989-10-16 | 1990-02-06 | Lead frame and semiconductor device |
JP2-26786 | 1990-02-06 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910016069A true KR910016069A (en) | 1991-09-30 |
KR930004253B1 KR930004253B1 (en) | 1993-05-22 |
Family
ID=12203000
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900014537A KR930004253B1 (en) | 1990-02-06 | 1990-09-14 | Rid-frame and semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930004253B1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100342812B1 (en) * | 1996-11-28 | 2002-11-18 | 앰코 테크놀로지 코리아 주식회사 | Area array bumped semiconductor package having ground and power lines |
KR100533750B1 (en) * | 2000-07-13 | 2005-12-06 | 앰코 테크놀로지 코리아 주식회사 | Lead Frame Used for the Fabrication of Semiconductor Package and Semiconductor Package Fabricated Using the Same |
-
1990
- 1990-09-14 KR KR1019900014537A patent/KR930004253B1/en not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100342812B1 (en) * | 1996-11-28 | 2002-11-18 | 앰코 테크놀로지 코리아 주식회사 | Area array bumped semiconductor package having ground and power lines |
KR100533750B1 (en) * | 2000-07-13 | 2005-12-06 | 앰코 테크놀로지 코리아 주식회사 | Lead Frame Used for the Fabrication of Semiconductor Package and Semiconductor Package Fabricated Using the Same |
Also Published As
Publication number | Publication date |
---|---|
KR930004253B1 (en) | 1993-05-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20070511 Year of fee payment: 15 |
|
LAPS | Lapse due to unpaid annual fee |