JP2784235B2 - Lead frame and semiconductor device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a lead frame and a semiconductor device.

(Prior art) A multilayer lead frame is formed by bonding a metal plane formed separately to the lower surface of an inner lead via an insulating layer, and the heat dissipation of the metal plane enables mounting of a semiconductor chip with large power consumption. The structure is such that the electrical characteristics and the like of the semiconductor device can be improved by using the metal plane as a ground layer, a power supply layer and the like.

FIG. 4 shows an example of a semiconductor device using a multilayer lead frame. The example shown is an example where two layers of metal planes are provided.
The power supply plane 12 is bonded to the lower surface of the inner lead 10 and the ground plane 14 is bonded to the lower surface of the power supply plane 12 via an insulating layer 16 made of polyimide. Power plane 12
The ground plane 14 is connected to a power line and a ground line of the inner lead 10.

By the way, in the case of a resin-encapsulated semiconductor device, there has been a problem that when the semiconductor device is heated to a high temperature, the encapsulating resin is separated from the stage on which the semiconductor chip is mounted and cracks occur in the encapsulating resin. In order to prevent this, dimple processing is performed on the stage and holes are made in the stage to improve the adhesion between the sealing resin and the stage, and slits are formed in the stage to prevent moisture from entering near the semiconductor chip. For example, a hole having a shape of a circle is provided.

(Problems to be Solved by the Invention) In the above-mentioned multilayer lead frame, a metal plane much larger than the stage portion provided in a normal single-layer lead frame is joined, so that the solder reflow process and the semiconductor chip generate heat. At this time, there is a problem that moisture taken in the semiconductor device expands, and at this time, a large stress acts to easily cause cracks in the sealing resin.

In a multi-layer lead frame, the metal plane is joined by an insulating layer 16 to electrically insulate the metal plane from the inner lead. Tend to occur easily.

In addition, since the thermal expansion coefficient of the sealing resin is generally larger than that of the metal plane, the metal plane and the sealing resin are easily separated due to a difference in the amount of thermal expansion at a high temperature, particularly near the center of the metal plane. Tends to occur. Further, since the wire bonding performed on the metal plane is close to the semiconductor chip, it is more difficult than wire bonding with the upper surface of the tip of the inner lead, and the wire bonding strength tends to be weak.

When the peeling stress at high temperature described above repeatedly acts on such a wire bonding region, there is a problem that the sealing resin and the metal plane are separated, and the wire is peeled or cut from the metal plane.

Therefore, the present invention has been made to solve the above problems, and an object of the present invention is to provide a semiconductor device using a multilayer lead frame formed by joining metal planes, even with a sealing resin. An object of the present invention is to provide a lead frame and a semiconductor device capable of improving the sticking property to a lead frame and preventing peeling or cutting of a wire from a wire bonding region of a metal plane.

(Means for Solving the Problems) The present invention has the following configuration to achieve the above object.

That is, in a multilayer lead frame in which a metal plane separately formed as a power supply plane and / or a ground plane is bonded to an inner lead via an insulating layer, through holes are formed on both sides or one side of the metal plane where the wire bonding region is sandwiched. Is provided.

Further, a through hole is provided in the metal plane and the insulating layer facing the lower surface of the inner lead.

Also, a semiconductor chip is mounted on a multilayer lead frame in which a metal plane separately formed as a power supply plane and / or a ground plane is bonded to an inner lead via an insulating layer, and a semiconductor chip is mounted between the inner lead and the metal plane and the semiconductor chip. In a resin-sealed type semiconductor device in which wire bonding is performed and resin is sealed, a through hole is formed on both sides or one side of the metal plane sandwiching the wire bonding region, and the sealing resin is filled in the through hole. It is characterized by being.

Further, a through hole is provided in the metal plane and the insulating layer facing the lower surface of the inner lead, and the through hole is filled with a sealing resin.

(Operation) By forming through holes on both sides or one side of the wire bonding area provided on the metal plane, the bonding area and the sealing resin can be firmly bonded. This prevents the sealing resin from peeling off from the wire bonding area of the metal plane, and prevents the bonding wire from being peeled or cut due to the peeling. Also in the case where the through holes are provided in the metal plane and the insulating layer portion, the bond between the metal plane and the sealing resin and between the inner lead and the sealing resin are strengthened, and the sealing resin is prevented from peeling off from the metal plane.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is an explanatory view showing an embodiment of a lead frame and a semiconductor device according to the present invention. The lead frame to be used has a power supply plane 12 and a ground plane 14 joined to the lower surface of an inner lead 10 via an insulating layer 16, similarly to the above-described conventional example of the multilayer lead frame. The power plane 12 and the ground plane 14 are connected to the power line and the ground line of the inner lead 10 by resistance welding pieces 20. Thus, the power plane 12 and the ground plane 14
Act as a common power supply line and ground line for the semiconductor chip 18. Since the wire bonding areas of the power plane 12 and the ground plane 14 are arranged so as to surround the semiconductor chip 18, the connection can be easily established by wire bonding with the semiconductor chip 18.

Note that the multilayer lead frame used in this embodiment is provided around the stage section 22 of the ground plane 14 and the power plane 12.
A through hole 24 is provided on both sides of the wire bonding region provided on the power supply plane 12, the ground plane 14, and the insulating layer 16 which are joined to the inner lead 10.
Is provided.

FIG. 2 shows a state where the lead frame is viewed from below.
When viewed from the lower surface, the tip of the inner lead 10 is hidden by the ground plane 14 and the like as shown in the figure, except for the through hole 26 portion. Through hole 26 is ground plane 14, power plane
12, the inner lead 10 is exposed only in a portion provided through the insulating layer 16 and provided with the through hole 26. The through holes 26 are evenly arranged in the ground plane 12 at predetermined intervals as shown in the figure.

The stage unit 22 is provided at the center of the ground plane 14,
A through hole 24 is provided surrounding the stage section 22.

The resistance welding piece 20 extends from the outer edges of the ground plane 14 and the power plane 12 and is connected to a predetermined position of the inner lead 10. 28 is an outer lead.

FIG. 3 is an explanatory diagram showing an enlarged plan view of the semiconductor chip 8, the power plane 12, and the ground plane 14.

The through holes 24 are provided so as to surround the stage portion 22 as shown in the figure. The through holes 24 are provided on both sides of the bond region 14a formed to have a width substantially equal to the lead width of the inner lead 10. Wire bonding is performed from the semiconductor chip 18 into the bonding area 14a. Semiconductor chip 1
8 is usually connected to a ground line at multiple locations. The bonding area 14a of the ground plane 14 may be provided at an appropriate position on the stage 22 according to the design of the semiconductor chip 18.

The power supply plane 12 is also bonded at a plurality of positions from the semiconductor chip 18, but the wire bonding area 12 a of the power supply plane 12 is arranged around the stage 22 at a position one step higher than the stage 22. Then, the inner lead 10 is provided around the wire bonding region 12a.

The through holes 24 are also provided on both sides of the power supply plane 12 sandwiching the wire bonding region 12a as in the case of the ground plane 14 described above. In this case, the through holes 24 may be provided only in the power supply plane 12, and the recesses may be formed on both sides of the wire bonding region 12a so that the through holes do not penetrate through the lower ground plane 14 and the insulating layer 16. However, it is preferable that a through hole 24 is provided at the same position of the ground plane 14 and the insulating layer 16 so as to penetrate as shown in FIG.

Semiconductor chip 18 has inner leads 10 and power plane 1
2. The ground plane 14 is grounded by a bonding wire. The connection by the bonding wire 19 is illustrated in the drawing. Three types of bonding wires 19 are connected, one connected to the inner lead 10, one connected to the power plane 12, and one connected to the ground plane 14.

Further, the through hole 26 is formed so as to extend at least between the adjacent inner leads 10, and when the resin is sealed, the sealing resin enters the through hole 26 and the inner lead 10 is formed.
Connect the upper and lower surfaces at the 10 gaps.

In the semiconductor device, a semiconductor chip is bonded to the above-described stage section 22, and after performing necessary wire bonding with the inner leads 10, the power plane 12, and the ground plane 14, the semiconductor chip 18, the bonding wires 19, the power plane 12, and the ground plane 14 are formed. Are all obtained by resin sealing.

In the lead frame, by providing the through holes 24 and the through holes 26, the sticking property between the sealing resin 30 and the lead frame can be greatly improved.

That is, the wire bonding area 14 of the stage 22
Looking at the vicinity of a, since the through holes 24 are formed on both sides of the bonding region 14a, when sealing with resin, the through holes 24 are formed.
Is filled with the sealing resin, and the wire bonding region 14a and the sealing resin are firmly bonded. As a result, in the bonding region 14a, the sealing resin and the ground plane 14 can be effectively prevented from peeling, and the bonding wire can be prevented from peeling or cutting. In the above embodiment, the through holes 24 are provided on both sides of the wire bonding region 14a, but the through holes 24 provided on one side of the wire bonding region 14a also have an effect of preventing the sealing resin from peeling.

Also, since the through holes 24 are formed on both sides of the bonding wires connected to the power plane 12 and the wire bonding region 12a, the sealing resin and the wire bonding region 12a are formed.
And the bonding wires are firmly coupled to each other, thereby effectively preventing peeling or cutting of the bonding wire.

Looking at the inner lead 10 part,
With the provision of 26, the sealing resin is connected at the upper and lower surfaces at the inner lead 10 portion, so that the sealing resin and the inner lead 10 and the power plane 12 etc. are bonded together, and the sealing resin 30 Is combined with Thereby, even when the power plane 12 and the ground plane 14 occupy a large area in the sealing resin, the separation between the sealing resin 30 and the inner leads 10, the power plane 12, and the ground plane 14 is effectively prevented. be able to. In addition, since the adhesion to the sealing resin is improved, peeling of the sealing resin can be prevented even when the insulating layer 16 has a hygroscopic property.

In the above embodiment, the through holes 24 are provided in both the wire bonding area 14a of the ground plane 14 and the wire bonding area 12a of the power plane 12, but the through holes 24 are provided only in either the ground plane 14 or the power plane 12. May be provided. Wire bonding area of ground plane 14
Since the wire bonding region 12a of the power plane 12 is quite close to the wire bonding region 14a, either one of them works effectively. When the through hole 24 is provided only in the power plane 12, it is preferable that the through hole penetrates the power plane 12 and the ground plane 14.

Further, in the above embodiment, the through hole 24 provided in the power plane 12 or the ground plane 14 is formed in a rectangular shape. However, the shape of the through hole 24 is not limited to a rectangle, and can be various shapes. FIG. 5 shows another embodiment of the through hole 24.

5 (a), 5 (b), 5 (h) and 5 (i) show the case where a through hole is provided so as to surround the wire bonding region in a U-shape, and FIGS. 5 (c), (d), (j), (K) is an L-shaped hole, (e), (f) and (g) are V-shaped holes, and (m) and (n) are arc-shaped holes. A hole is formed. (P), (q), and (r) show a small slit-shaped through hole 24 provided in parallel with the outer edge of the semiconductor chip 18. In the embodiment (p), the position of the through hole is exceeded. q)
Is an example in which wire bonding is performed at a near position close to a through hole, and Example (r) is an example in which wire bonding is performed at an intermediate position between two through holes.

In the case of the embodiment shown in FIG. 5 as well, the sticking property of the sealing resin near the wire bonding area is improved, and even if the peeling is caused for some reason, the peeling near the wire bonding portion is performed. The peeling of the bonding wire can be prevented. In addition, as shown in FIG. 5 (a), when a through-hole is provided on the front side of the wire bonding portion, the effect of preventing the peeling when the peeling proceeds from the outside of the wire bonding portion is high. Become. When a through hole is provided so as to surround the wire bonding region as shown in FIGS. 5 (a) and 5 (b), the wire bonding region has a tongue shape, and this tongue portion is slightly elastic. It also has the effect that it can be deformed to prevent peeling.

In the above embodiment, the metal plane is described as an example in which the power supply plane and the ground plane have two layers. However, various uses are possible, such as forming only one ground plane or three or more layers. is there.

As described above, the present invention has been described variously with reference to the preferred embodiments. However, the present invention is not limited to these embodiments, and it goes without saying that many modifications can be made without departing from the spirit of the invention. That is.

(Effects of the Invention) According to the lead frame and the semiconductor device of the present invention, in the wire bonding region of the metal plane,
The sealing resin and the metal plane can be more firmly bonded to each other, and the stress applied to the metal plane at a high temperature of the semiconductor device can be reduced to effectively prevent the sealing resin from peeling off. it can. Thus, it is possible to prevent the occurrence of a defect such as peeling or cutting of the bonding wire from the metal plane. Further, when the above-mentioned through-holes are provided in the metal plane and the insulating layer portion, the metal plane and the sealing resin are more strongly bonded, so a large metal plane is used or a plurality of insulating layers are interposed. In such cases, the sealing resin can be prevented from peeling off, and the sealing resin can be effectively prevented from being cracked.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing one embodiment of a semiconductor device according to the present invention, FIG. 2 is a bottom view of a lead frame used in the semiconductor device, FIG. FIG. 4 is a sectional view showing a conventional example of a semiconductor device, and FIG. 5 is an explanatory view showing another example of forming a through hole. 10 ... Inner lead, 12 ... Power plane, 12a ...
Wire bonding area, 14 ... ground plane, 14a ...
... wire bonding area, 16 ... insulating layer, 18 ... semiconductor chip, 19 ... bonding wire, 20 ... resistance welding piece, 22 ... stage part, 24 ... through hole, 26 ... through hole, 30
.... Sealing resin.

──────────────────────────────────────────────────続 き Continuation of front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 23 / 50,23 / 28

Claims (4)

(57) [Claims] 1. A multilayer lead frame in which a metal plane separately formed as a power supply plane and / or a ground plane is bonded to an inner lead via an insulating layer, wherein both sides of a wire bonding area of the metal plane or one side thereof A lead frame, wherein a through hole is provided in the lead frame. 2. The lead frame according to claim 1, wherein a through hole is provided in the metal plane and the insulating layer facing the lower surface of the inner lead. 3. A semiconductor chip is mounted on a multilayer lead frame in which a metal plane formed separately as a power supply plane and / or a ground plane on an inner lead is joined via an insulating layer, and the inner lead and the metal plane and the semiconductor chip are mounted. In a resin-sealed semiconductor device in which wire bonding is performed between the metal plane and a resin, a through hole is formed on both sides or one side of the metal plane sandwiching the wire bonding region, and the sealing resin is formed in the through hole. A semiconductor device characterized by being satisfied. 4. The semiconductor device according to claim 3, wherein a through hole is provided in the metal plane and the insulating layer facing the lower surface of the inner lead, and the through hole is filled with a sealing resin.