KR910013263A - Word line driver arrangement in semiconductor memory device - Google Patents

Word line driver arrangement in semiconductor memory device Download PDF

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Publication number
KR910013263A
KR910013263A KR1019890020104A KR890020104A KR910013263A KR 910013263 A KR910013263 A KR 910013263A KR 1019890020104 A KR1019890020104 A KR 1019890020104A KR 890020104 A KR890020104 A KR 890020104A KR 910013263 A KR910013263 A KR 910013263A
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KR
South Korea
Prior art keywords
word line
semiconductor memory
cell array
memory cell
line drivers
Prior art date
Application number
KR1019890020104A
Other languages
Korean (ko)
Other versions
KR930001738B1 (en
Inventor
서동일
조수인
민동선
김영래
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019890020104A priority Critical patent/KR930001738B1/en
Priority to GB9004056A priority patent/GB2239540A/en
Priority to DE4005990A priority patent/DE4005990A1/en
Priority to FR9002487A priority patent/FR2656727A1/en
Priority to JP2096598A priority patent/JPH03203892A/en
Priority to IT48184A priority patent/IT1241519B/en
Priority to CN90106620A priority patent/CN1052965A/en
Publication of KR910013263A publication Critical patent/KR910013263A/en
Application granted granted Critical
Publication of KR930001738B1 publication Critical patent/KR930001738B1/en

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/14Word line organisation; Word line lay-out
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/025Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)

Abstract

내용 없음.No content.

Description

반도체 메모리장치의 워드라인 드라이버 배치방법Word line driver arrangement in semiconductor memory device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 구성도.2 is a block diagram of the present invention.

Claims (4)

다수의 워드라인들과, 상기 워드라인들과 연결된 동수의 워드라인 드라이버들과 상기 워드라이 드라이버를 구동시키기 위한 동수의 로우어드레스 디코더들을 구비하는 반도체 메모리셀어레이에 있어서, 상기 워드라인 드라이버들이 상기 반도체 메모리셀어레이의 양측에 같은 수 만큼 나뉘어서 배열됨을 특징으로 하는 반도체 메모리셀어레이.10. A semiconductor memory cell array comprising a plurality of word lines, an equal number of word line drivers connected to the word lines, and an equal number of low address decoders for driving the word life driver. A semiconductor memory cell array, characterized in that arranged on both sides of the memory cell array by the same number. 제1항에 있어서,상기 반도체 메모리셀어레이 전체의 워드라인 드라이버들의 갯수가 2n개인 경우 2K개(n〉k≥0,n,K정수)의 워드라인들을 구동시키는 동수의 워드라인 드라이버들을 한 단위로 메모리 셀 어레이 양측에 번갈아가며 배열함을 특징으로 하는 반도체 메모리셀어레이.The number of word line drivers for driving 2 K word lines (n> k ≧ 0, n, K integers) when the number of word line drivers of the semiconductor memory cell array is 2 n . A semiconductor memory cell array characterized by being arranged alternately on both sides of the memory cell array as a unit. 제1항에 있어서, 상기 워드라인 드라이버들을 상기 반도체 메모리 셀 어레이의 양측에 같은 수로 나누어 배열하고, 상기 워드라인 드라이버를 구동시키는 상기 로우어드레스 디코더들을 상기 워드라인 드라이버들과 같이 상기 반도체 메모리 셀 어레이의 양측에 같은 수로 배열함을 특징으로 하는 반도체 메모리셀어레이.The semiconductor memory cell array of claim 1, wherein the word line drivers are arranged on both sides of the semiconductor memory cell array by the same number, and the low address decoders driving the word line drivers are arranged together with the word line drivers. A semiconductor memory cell array characterized by being arranged in the same number on both sides. 제1항에 있어서, 상기 워드라인 드라이버들을 상기 반도체 메모리 셀 어레이의 양측에 같은 수로 나누어 배열하고 상기 워드라인 드라이버를 구동시키는 상기 로우어드레스 디코더들을 상기 워드라인 드라이버가 양면중 한쪽 측면에만 위치하게 하여 상기 로우어드레스 디코더가 위치한 반대편에 있는 워드라인 드라이버는 상기 로우어드레스 디코더의 출력선로를 워드라인과 평행한 방향으로 배치하여 상기로우 어드레스 디코더가 위치한 반대편에 있는 워드라인 드라이버를 구동시킴을 특징으로 하는 반도체 메모리셀어레이.2. The method of claim 1, wherein the word line drivers are arranged on both sides of the semiconductor memory cell array by the same number, and the low address decoders for driving the word line drivers are positioned on only one side of both sides. The word line driver on the opposite side where the low address decoder is located is arranged in the direction parallel to the word line of the low address decoder to drive the word line driver on the opposite side where the row address decoder is located. Cell array. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890020104A 1989-12-29 1989-12-29 Word-line driver array method of semiconductor memory device KR930001738B1 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
KR1019890020104A KR930001738B1 (en) 1989-12-29 1989-12-29 Word-line driver array method of semiconductor memory device
GB9004056A GB2239540A (en) 1989-12-29 1990-02-22 Semiconductor memory array with staggered word line drivers
DE4005990A DE4005990A1 (en) 1989-12-29 1990-02-26 SEMICONDUCTOR MEMORY ARRANGEMENT WITH AN INTERDIGITATED WORDLINE STRUCTURE
FR9002487A FR2656727A1 (en) 1989-12-29 1990-02-28 Semiconductor memory cell matrix having an interdigital structure of word lines
JP2096598A JPH03203892A (en) 1989-12-29 1990-04-13 Arrangement of word line driver of semiconductor memory device
IT48184A IT1241519B (en) 1989-12-29 1990-07-31 SEMICONDUCTOR MEMORY BOARD
CN90106620A CN1052965A (en) 1989-12-29 1990-07-31 Semicondctor storage array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890020104A KR930001738B1 (en) 1989-12-29 1989-12-29 Word-line driver array method of semiconductor memory device

Publications (2)

Publication Number Publication Date
KR910013263A true KR910013263A (en) 1991-08-08
KR930001738B1 KR930001738B1 (en) 1993-03-12

Family

ID=19294145

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890020104A KR930001738B1 (en) 1989-12-29 1989-12-29 Word-line driver array method of semiconductor memory device

Country Status (7)

Country Link
JP (1) JPH03203892A (en)
KR (1) KR930001738B1 (en)
CN (1) CN1052965A (en)
DE (1) DE4005990A1 (en)
FR (1) FR2656727A1 (en)
GB (1) GB2239540A (en)
IT (1) IT1241519B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102270490A (en) * 2011-03-29 2011-12-07 西安华芯半导体有限公司 Large-capacity DRAM chip memory array structure
WO2016018328A1 (en) 2014-07-31 2016-02-04 Hewlett-Packard Development Company, L.P. Crossbar arrays with shared drivers
CN112464502B (en) * 2020-12-28 2022-02-01 芯天下技术股份有限公司 Optimization and acceleration memory simulation verification method and device, storage medium and terminal

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059677B2 (en) * 1981-08-19 1985-12-26 富士通株式会社 semiconductor storage device
JPS59124092A (en) * 1982-12-29 1984-07-18 Fujitsu Ltd Memory device
JPS60167193A (en) * 1984-02-09 1985-08-30 Fujitsu Ltd Semiconductor storage device
US4700328A (en) * 1985-07-11 1987-10-13 Intel Corporation High speed and high efficiency layout for dram circuits
JPH01119987A (en) * 1987-11-04 1989-05-12 Hitachi Ltd Semiconductor memory
JP2547615B2 (en) * 1988-06-16 1996-10-23 三菱電機株式会社 Read-only semiconductor memory device and semiconductor memory device

Also Published As

Publication number Publication date
IT9048184A0 (en) 1990-07-31
DE4005990A1 (en) 1991-07-11
KR930001738B1 (en) 1993-03-12
GB9004056D0 (en) 1990-04-18
IT1241519B (en) 1994-01-17
GB2239540A (en) 1991-07-03
CN1052965A (en) 1991-07-10
IT9048184A1 (en) 1992-01-31
JPH03203892A (en) 1991-09-05
FR2656727A1 (en) 1991-07-05

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