KR920006983A - Semiconductor memory device with low noise sensing structure - Google Patents
Semiconductor memory device with low noise sensing structure Download PDFInfo
- Publication number
- KR920006983A KR920006983A KR1019910017156A KR910017156A KR920006983A KR 920006983 A KR920006983 A KR 920006983A KR 1019910017156 A KR1019910017156 A KR 1019910017156A KR 910017156 A KR910017156 A KR 910017156A KR 920006983 A KR920006983 A KR 920006983A
- Authority
- KR
- South Korea
- Prior art keywords
- bit line
- pair
- memory device
- semiconductor memory
- line pair
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Abstract
내용 없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 본 발명에 따른 반도체 메모리 장치의 제1실시예를 도시한 회로도,1 is a circuit diagram showing a first embodiment of a semiconductor memory device according to the present invention;
제2도는 제1도에 도시된 반도체 장치의 동작을 설명하기 위한 파형도,FIG. 2 is a waveform diagram illustrating the operation of the semiconductor device shown in FIG. 1;
제3도는 본 발명에 따른 반도체 메모리 장치의 제2실시예를 도시한 회로도.3 is a circuit diagram showing a second embodiment of the semiconductor memory device according to the present invention.
Claims (5)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP26149590 | 1990-09-29 | ||
JP90-261495 | 1990-09-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920006983A true KR920006983A (en) | 1992-04-28 |
KR950014243B1 KR950014243B1 (en) | 1995-11-23 |
Family
ID=17362705
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910017156A KR950014243B1 (en) | 1990-09-29 | 1991-09-28 | Semiconductor memory device with the low-noise sensing structure |
Country Status (4)
Country | Link |
---|---|
US (1) | US5377151A (en) |
EP (1) | EP0479170B1 (en) |
KR (1) | KR950014243B1 (en) |
DE (1) | DE69121503T2 (en) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3358030B2 (en) * | 1993-01-22 | 2002-12-16 | 日本テキサス・インスツルメンツ株式会社 | Semiconductor memory device and initialization method thereof |
JP3397404B2 (en) * | 1993-08-09 | 2003-04-14 | 株式会社日立製作所 | Semiconductor storage device |
US5499218A (en) * | 1995-01-31 | 1996-03-12 | Goldstar Electron Co., Ltd. | Method for driving bit line selecting signals |
JP3268158B2 (en) * | 1995-03-31 | 2002-03-25 | 株式会社東芝 | Semiconductor device and manufacturing method thereof |
KR100489355B1 (en) * | 1997-11-20 | 2005-08-17 | 주식회사 하이닉스반도체 | Memory element for noise reduction |
JP3415420B2 (en) * | 1997-12-01 | 2003-06-09 | 株式会社東芝 | Semiconductor integrated circuit device |
US5999477A (en) * | 1998-06-23 | 1999-12-07 | Vanguard International Semiconductor Corporation | Distributed array activation arrangement |
KR100335267B1 (en) * | 1998-06-29 | 2002-09-25 | 주식회사 하이닉스반도체 | Semiconductor memory device reduces the consumption of sensing current |
JP4050839B2 (en) | 1999-01-29 | 2008-02-20 | 松下電器産業株式会社 | Semiconductor memory device |
JP3348432B2 (en) * | 1999-09-14 | 2002-11-20 | 日本電気株式会社 | Semiconductor device and semiconductor storage device |
KR100516695B1 (en) * | 1999-12-30 | 2005-09-22 | 주식회사 하이닉스반도체 | Row active method of semiconductor memory device |
FR2881564B1 (en) * | 2005-02-02 | 2007-06-01 | St Microelectronics Sa | INTEGRATED MEMORY CIRCUIT, ESPECIALLY SRAM MEMORY AND CORRESPONDING MANUFACTURING METHOD |
CN102170292B (en) * | 2011-01-31 | 2014-05-07 | 华为技术有限公司 | Data processing method, data processing system and related equipment |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5942399B2 (en) * | 1979-12-21 | 1984-10-15 | 株式会社日立製作所 | memory device |
US4287576A (en) * | 1980-03-26 | 1981-09-01 | International Business Machines Corporation | Sense amplifying system for memories with small cells |
JPS57208691A (en) * | 1981-06-15 | 1982-12-21 | Mitsubishi Electric Corp | Semiconductor memory |
DE3267974D1 (en) * | 1982-03-17 | 1986-01-30 | Itt Ind Gmbh Deutsche | Electrically erasable memory matrix (eeprom) |
US4807194A (en) * | 1986-04-24 | 1989-02-21 | Matsushita Electric Industrial Co., Ltd. | Seimiconductor memory device having sub bit lines |
JPS6363196A (en) * | 1986-09-02 | 1988-03-19 | Fujitsu Ltd | Semiconductor storage device |
US4807195A (en) * | 1987-05-18 | 1989-02-21 | International Business Machines Corporation | Apparatus and method for providing a dual sense amplifier with divided bit line isolation |
JPS6413290A (en) * | 1987-07-07 | 1989-01-18 | Oki Electric Ind Co Ltd | Semiconductor memory |
JP2712128B2 (en) * | 1988-10-11 | 1998-02-10 | 株式会社日立製作所 | Semiconductor storage device |
KR910009444B1 (en) * | 1988-12-20 | 1991-11-16 | 삼성전자 주식회사 | Semiconductor memory device |
JPH02302986A (en) * | 1989-05-16 | 1990-12-14 | Mitsubishi Electric Corp | Dynamic type semiconductor memory |
-
1991
- 1991-09-27 DE DE69121503T patent/DE69121503T2/en not_active Expired - Fee Related
- 1991-09-27 EP EP91116610A patent/EP0479170B1/en not_active Expired - Lifetime
- 1991-09-28 KR KR1019910017156A patent/KR950014243B1/en not_active IP Right Cessation
- 1991-09-30 US US07/767,774 patent/US5377151A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69121503T2 (en) | 1997-02-13 |
KR950014243B1 (en) | 1995-11-23 |
US5377151A (en) | 1994-12-27 |
DE69121503D1 (en) | 1996-09-26 |
EP0479170B1 (en) | 1996-08-21 |
EP0479170A3 (en) | 1993-02-24 |
EP0479170A2 (en) | 1992-04-08 |
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20031106 Year of fee payment: 9 |
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LAPS | Lapse due to unpaid annual fee |