KR910009000Y1 - Stable synchronous signal separating detective circuit - Google Patents

Stable synchronous signal separating detective circuit Download PDF

Info

Publication number
KR910009000Y1
KR910009000Y1 KR2019880020208U KR880020208U KR910009000Y1 KR 910009000 Y1 KR910009000 Y1 KR 910009000Y1 KR 2019880020208 U KR2019880020208 U KR 2019880020208U KR 880020208 U KR880020208 U KR 880020208U KR 910009000 Y1 KR910009000 Y1 KR 910009000Y1
Authority
KR
South Korea
Prior art keywords
signal
detection circuit
circuit unit
color
resistor
Prior art date
Application number
KR2019880020208U
Other languages
Korean (ko)
Other versions
KR900013733U (en
Inventor
이순일
이상수
Original Assignee
삼성전자주식회사
안시환
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사, 안시환 filed Critical 삼성전자주식회사
Priority to KR2019880020208U priority Critical patent/KR910009000Y1/en
Publication of KR900013733U publication Critical patent/KR900013733U/en
Application granted granted Critical
Publication of KR910009000Y1 publication Critical patent/KR910009000Y1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/08—Separation of synchronising signals from picture signals
    • H04N5/10—Separation of line synchronising signal from frame synchronising signal or vice versa
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N9/00—Details of colour television systems
    • H04N9/44—Colour synchronisation
    • H04N9/455—Generation of colour burst signals; Insertion of colour burst signals in colour picture signals or separation of colour burst signals from colour picture signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

내용 없음.No content.

Description

TV신호로 부터 안정된 동기신호의 분리검출회로Separate detection circuit for stable synchronization signal from TV signal

제1도는 본 고안의 한 실시예를 나타내는 회로도.1 is a circuit diagram showing an embodiment of the present invention.

제2도는 본 고안의 타 실시예를 나타내는 회로도.2 is a circuit diagram showing another embodiment of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for the main parts of the drawings

100 : 합성영상신호 입력단 110 : 휘도, 컬러신호 검출회로부100: composite video signal input terminal 110: luminance, color signal detection circuit

111a, 111b : 콤필터 112 : 휘도신호출력단111a, 111b: comb filter 112: luminance signal output terminal

113 : 컬러신호출력단 120 : 버퍼회로부113: color signal output terminal 120: buffer circuit

130 : 수평돌기신호 검출회로부 131 : 수평동기신호 검출단130: horizontal projection signal detection circuit unit 131: horizontal synchronous signal detection stage

140 : 수직동기신호 검출회로부 141 : 수직동기신호 검출단140: vertical synchronous signal detection circuit section 141: vertical synchronous signal detection stage

TR1, TR2 : 트랜지스터 C1-C8 : 콘덴서TR1, TR2: Transistor C1-C8: Capacitor

R1-R8 : 저항 RL : 부하저항R1-R8: Resistance RL: Load Resistance

본 고안은 컬러 TV의 합성 영상신호(TV신호)로 부터 안정된 휘도신호와 컬러신호, 수직동기신호와 수평동기신호가 분리검출되도록 한 TV신호로 부터 안정된 동기신호의 분리 검출회로에 관한 것이다.The present invention relates to a separate detection circuit of a stable synchronization signal from a TV signal which allows a stable luminance signal, a color signal, a vertical synchronization signal and a horizontal synchronization signal to be separately detected from a composite video signal (TV signal) of a color TV.

종래에는 컬러 TV의 합성영상신호가 영상처리 집적회로에 의해 휘도신호와 컬러신호로 분리시키고, 그 휘도신호가 동기신호 검출단에서 수평동기신호와 수직동기신호로 검출 되도록 하였다.Conventionally, a composite video signal of a color TV is separated into a luminance signal and a color signal by an image processing integrated circuit, and the luminance signal is detected as a horizontal synchronizing signal and a vertical synchronizing signal at the synchronizing signal detection stage.

그러나 컬러 TV의 합성영상신호로 부터 휘도신호와 컬러 신호, 수직동기신호와 수평동기시신호 분리검출시 더욱 안정된 값으로 분리검출되도록 요구되었다.However, it was required to separate and detect the luminance signal, the color signal, the vertical synchronization signal, and the horizontal synchronization signal from the composite video signal of the color TV to a more stable value.

본 고안은 상기와 같은 요구를 충족시키기 위하여 안출한 것인바, 컬러 TV의 합성영상신호가 버퍼(BUFFER)회로에 입력되어 그 버퍼회로가 완충작용을 함으로써 휘도신호와 컬러신호, 수직동기신호와 수평동기신호로 분리검출시 더욱 안정된 값으로 분리 검출되도록 함에 그 목적이 있는 것으로 이하 첨부된 도면에 의하여 본 고안을 상세히 설명하면 다음과 같다.The present invention was devised to satisfy the above requirements, and the composite video signal of the color TV is inputted to the buffer circuit, and the buffer circuit buffers the luminance signal, the color signal, the vertical synchronization signal, and the horizontal signal. The present invention will be described in detail below with reference to the accompanying drawings.

제1도는 본 고안의 한실시예를 니타네는 회로도로서 합성 영상신호입력단(100)이 콘덴서(C1)와 접지된 저항(R1)을 거쳐 합성영상신호를 휘도신호와 컬러신호로 분리검출하는 휘도, 컬러신호 검출회로부(110)태의 콤필터(111a)에 연결하고, 저항(R4)과 접지된 콘덴서(C7)를 통해서는 합성 영상신호가 안정된 수평동기신호와 수직동기신호로 분리 검출되도록 완충작용을 하기 위한 버퍼회로부(120)내의 트랜지스터(TR1) 베이스에 연결하며, 상기 휘도, 컬러신호검출회로부(110) 내의 콤필터(111a)는 콘덴서(C2), (C3)를 통하여 휘도신호출력단(112)과 컬러신호출력단(113) 및 전원(B+)에 각각 연결시키고, 콜렉터가 접지된 트랜지스터(TR1)의 에미터측은 부하저항(RL)을 거쳐 전원(B+)에 그리고 수평동기신호만을 검출하는 수평동기신호검출회로부(130)내의 저항(R2)일측에 각각 연결하고, 상기 저항(R2)타측은 콘텐서(C4)를 통해 수평 동기신호검출단(131)에 그리고 상기 저항(R3) 타측은 접지된 콘덴서(C6)와 콘덴서(C5)를 토이해 수직동기신호 검출단(141)에 연결시켜 구성한 것이다.1 is a circuit diagram illustrating an embodiment of the present invention, in which a composite video signal input terminal 100 separately detects a composite video signal into a luminance signal and a color signal through a capacitor C1 and a grounded resistor R1. And a comb filter 111a of the color signal detection circuit unit 110, and a buffering function so that the composite image signal is separated into a stable horizontal synchronizing signal and a vertical synchronizing signal through the resistor R4 and the grounded capacitor C7. And the comb filter 111a in the luminance and color signal detection circuit unit 110 are connected to the luminance signal output terminal 112 through the capacitors C2 and C3. ) And the color signal output terminal 113 and power supply B + , respectively, and the emitter side of the transistor TR1 with the collector grounded detects the power supply B + and the horizontal synchronous signal only through the load resistor RL. Each side of the resistor R2 in the horizontal synchronous signal detection circuit 130 And the other side of the resistor R2 is connected to the horizontal synchronization signal detection terminal 131 through a capacitor C4 and the other side of the resistor R3 is connected to a grounded capacitor C6 and a capacitor C5. It is configured to connect to the signal detection stage 141.

이하 이들의 동작 및 작용효과를 설명한다.The operation and effect of these will be described below.

제1도의 합성영상신호입력단(100)에 입력된 신호가 하이로 입력되면 그 입력된 신호는 콘덴서(C1)와 접지된 저항(R1)에 의하여 교류성분의 신호만 추출하고, 그 교류 성분신호는 휘도, 컬러신호검출회로부(110)내의 콤필터(111a)에 하이신호로 입력되고, 따라서 저항(R4)과 접지된 콘덴서(C7)에 의하여 더 안정된 교류성분의 신호로 만들어 버퍼회로부(120)내의 트랜지스터(TR1)의 베이스에 하이 신호로 입력된다.When the signal input to the composite video signal input terminal 100 of FIG. 1 is high, the input signal extracts only an AC component signal by a capacitor C1 and a grounded resistor R1, and the AC component signal is The luminance and color signals are input to the comb filter 111a in the color signal detection circuit unit 110 as a high signal, thereby making the signals of the AC component more stable by the resistor R4 and the grounded capacitor C7 in the buffer circuit unit 120. A high signal is input to the base of the transistor TR1.

그리고 상기 버퍼회로부(120)내의 트랜지스터(TR1)의 베이스에 하이신호로 입력됨에 따라 상기 트랜지스터(TR1)가 오프됨으로써 전원(B+)전압이 상기 콤필터(111a)에 인가되고 동시에 전원(B+)전압이 과전류방지용 부하저항(RL)을 거쳐 수평동기신호검출회로부(130)에 입력되고, 따라서 수직동기신호검출회로부(140)에 입력된다.As the transistor TR1 is turned off as a high signal is input to the base of the transistor TR1 in the buffer circuit 120, a power source B + voltage is applied to the comb filter 111a and simultaneously a power source B +. The voltage is input to the horizontal synchronous signal detection circuit unit 130 via the overcurrent prevention load resistor RL, and thus to the vertical synchronous signal detection circuit unit 140.

그러므로 상기 콤필터(111a)에 하이신호로 입력된 교류 성분의 합성영상신호와 전원(B+)전압에 의하여 콤필터(111a)가 동작하여 콘덴서(C2)를 통해 휘도신호출릭단(112)에 휘도신호가 하이로 출력되고, 콘덴서(C3)를 통하여서는 컬러신호출력단(113)에 컬러신호가 하이로 출력되도록 한다.Therefore, the comb filter 111a is operated by the composite video signal of the AC component inputted as the high signal to the comb filter 111a and the power supply B + voltage to the luminance signal extracting stage 112 through the condenser C2. The luminance signal is output high, and the color signal is output high to the color signal output terminal 113 through the capacitor C3.

또한 상기 수평동기신호 검출회로부(130)에 하이로 입력된 신호는 저항(R2)과 콘덴서(C4)에 의하여 횡적으로 일정한 수평동기신호만 검출되어 수평동기신호검출단(131)에 안정된 하이신호로 출력되고, 상기 수직동기신호검출회로부(140)에 입력된 신호는 저항(R3)과 접지된 콘덴서(C6)에 의하여 직류성분의 신호만 추출되고, 그 추출된 신호는 콘덴서(C5)에 의하여 종적으로 일정한 수직동기신호만 검출되어 수직동기신호 검출단(141)에 안정된 하이신호로 출력된다.In addition, the signal input high to the horizontal synchronous signal detection circuit 130 is detected as a horizontal high signal horizontally constant by the resistor (R2) and the capacitor (C4) as a stable high signal to the horizontal synchronous signal detection terminal 131 The signal input to the vertical synchronous signal detection circuit unit 140 is extracted only a signal of the DC component by the resistor (R3) and the grounded capacitor (C6), the extracted signal by the capacitor (C5) Only a constant vertical synchronization signal is detected and output as a stable high signal to the vertical synchronization signal detection stage 141.

반면에 상기 합성영상신호입력단(100)에 입력된 신호가 로우로 입력되면 그 입력된 신호는 콘덴서(C1)와 접지된 저항(R1)을 거쳐 휘도, 컬러신호 검출회로부(110)내의 콤필터(111a)에 로우신호로 입력되고, 따라서 저항(R4)과 접지된 콘덴서(C7)를 거쳐 버퍼회로부(120)내의 트랜지스터(TR1)의 베이스에 로우신호로 입력된다.On the other hand, when the signal input to the composite video signal input terminal 100 is input low, the input signal passes through the condenser C1 and the grounded resistor R1 and the comb filter in the luminance and color signal detection circuit unit 110. The low signal is input to 111a), and therefore, the low signal is input to the base of the transistor TR1 in the buffer circuit unit 120 via the resistor R4 and the grounded capacitor C7.

이렇게 트랜지스터(TR1)의 베이스에 로우신호로 입력됨에 따라 상기 트랜지스터(TR1)가 온됨으로써 전원(B+)전압이 부하저항(RL)과 상기 트랜지스터(TR1)의 에미터를 통하여 콜렉터로 접지된다.As the transistor TR1 is turned on as the low signal is input to the base of the transistor TR1, the power supply B + voltage is grounded to the collector through the load resistor RL and the emitter of the transistor TR1.

그러므로 상기 콤필터(11a)에 로우신호로 입력된 합성영상신호에 의하여 콤필터(111a)가 동작하지 않아 휘도 신호출력단(112)과 컬러신호출력단(113)에 각각 휘도신호와 컬러신호가 로우로 출력되도록 한다.Therefore, the comb filter 111a does not operate due to the composite image signal input as the low signal to the comb filter 11a, so that the luminance signal and the color signal are set low to the luminance signal output terminal 112 and the color signal output terminal 113, respectively. To be printed.

또한 상기 수평동기신호검출회로부(130)에 로우로 입력된 신호는 저항(R2)과 콘덴서(C4)를 거쳐 수평동기신호검출단(131)에 수평동기신호가 로우로 출력되고, 따라서 수직동기신호검출회로부(140)에 입력된 신호는 저항(R3)과 콘덴서(C5), (C6)를 거쳐 수직동기신호검출단(141)에 수직동기신호가 로우로 출력된다.In addition, a horizontal synchronous signal is output low to the horizontal synchronous signal detection terminal 131 through a resistor (R2) and a capacitor (C4) as a signal input low to the horizontal synchronous signal detection circuit 130, and thus a vertical synchronous signal The signal input to the detection circuit unit 140 outputs a vertical synchronous signal to the vertical synchronous signal detection terminal 141 through a resistor R3, a capacitor C5, and a C6.

한편 제2도는 본 고안의 타실시예를 나타내는 회로도로서 상기 제1도와 같이 구성되어 있으나, 다만 합성영상신호입력단(100)이 콘덴서(C1)와 접지된 저항(R1)을 거쳐 휘도, 컬러신호 검출회로부(110)내의 콤필터(111b)에 연결하고, 저항(R4)과 콘덴서(C8)를 통하여서는 버퍼회로부(120)내의 트랜지스터(TR2) 베이스에 연결하고 상기 전원(B+)이 콜렉터에 연결된 트랜지스터(TR2) 에미터측은 저항(R5)을 거쳐 접지시킴과 동시에수평동기신호 검출회로부(130)와 수직동기신호 검출회로부(140)에 연결시켜 구성한 것이다.FIG. 2 is a circuit diagram showing another embodiment of the present invention, which is configured as shown in FIG. 1, except that the composite video signal input terminal 100 detects luminance and color signals through a capacitor C1 and a grounded resistor R1. Connected to the comb filter 111b in the circuit unit 110, through the resistor R4 and the capacitor C8, connected to the base of the transistor TR2 in the buffer circuit unit 120, and the power source B + is connected to the collector. The emitter side of the transistor TR2 is connected to the horizontal synchronous signal detection circuit 130 and the vertical synchronous signal detection circuit 140 at the same time as it is grounded through the resistor R5.

이하 이들의 동작 및 작용효과를 설명한다.The operation and effect of these will be described below.

제2도에서 합성영상신호 입력단(100)에 입력된 신호가 하이로 입력되면, 상기 제1도와 같이 그 입력된 신호는 콘덴서(C1)와 접지된 저항(R1)에 의하여 교류성분의 신호만 추출되고, 그 교류성분신호는 휘도, 컬러신호검출회로부(110)내의 콤필터(111b)에 하이신호로 입력되고, 저항(R4)과 콘덴서(C8)에 의하여 안정된 교류성분의 신호로 만들어 버퍼회로부(120)내의 트랜지스터(TR2) 베이스에 하이신호로 입력된다.When the signal input to the composite video signal input terminal 100 is high in FIG. 2, the input signal extracts only the signal of the AC component by the capacitor C1 and the grounded resistor R1 as shown in FIG. 1. The AC component signal is input to the comb filter 111b in the luminance and color signal detection circuit unit 110 as a high signal, and made into a stable AC component signal by the resistor R4 and the capacitor C8. A high signal is input to the base of the transistor TR2 in 120.

이렇게 트랜지스터(TR2)의 베이스에 하이신호로 입력됨에 따라 상기 신호 트랜지스터(TR2)가 온됨으로써 전원(B+)전압이 상기 온된 트랜지스터(TR2)의 콜렉터와 에미터 및 과전류 방지용 저항(R5)을 거쳐 접지되고, 따라서 수평동기신호 검출회로부(130)와 수직동기신호검출부(140)에 동시에 입력된다.As the signal transistor TR2 is turned on as the high signal is input to the base of the transistor TR2, the power supply B + voltage passes through the collector of the transistor TR2 turned on, the emitter, and the resistor R5 for preventing the overcurrent. It is grounded, and is therefore simultaneously input to the horizontal synchronous signal detection circuit unit 130 and the vertical synchronous signal detection unit 140.

그리고 상기 수평동기신호검출회로부(130)에 입력된 신호에 의해 횡적으로 일정한 수핑동기신호만 검출되어 수평동기 신호검출단(131)에 안정된 하이신호로 출력되고, 상기 수직동기신호검출회로부(140)에 입력된 신호에 의해 종적으로 일정힌 수직동기신호만 검출되어 수직동기신호검출단(141)에 안정된 하이신호로 출력된다.In addition, only a horizontally constant ping synchronous signal is detected by the signal input to the horizontal synchronous signal detection circuit unit 130 and output as a stable high signal to the horizontal synchronous signal detection terminal 131, and the vertical synchronous signal detection circuit unit 140 Only a vertically constant vertical synchronization signal is detected by the signal input to the output signal as a stable high signal to the vertical synchronization signal detection stage 141.

또한 상기 콤필터(111b)에 아이로 입력된 합성영상신호에 의하여 콤필터(111b)가 동작하지 않아 휘도신호출력(112)과 컬러신호출력단(113)에 각각 휘도신호와 컬러신호가 로우 신호로 출력되도록 한다.In addition, since the comb filter 111b does not operate due to the composite video signal input to the comb filter 111b as the eye, the luminance signal and the color signal are output as low signals to the luminance signal output 112 and the color signal output terminal 113, respectively. To be printed.

반면에 상기 합성영상신호입력단(100)에 입력된 신호가 로우로 입력되면, 상기 제1도와 같이 그 입력된 신호는 콘덴서(C1)와 접지된 저항(R1)을 부터 상기 회도, 컬러신호 검출회로부(110)내의 콤필터(111b)에 로우신호로 입력되고, 따라서 저항(R4)과 접지된 콘덴서(c7)를 통하여서는 상기 버퍼회로부(120)내의 트랜지스터(TR2)에 베이스에 로우신호로 입력된다.On the other hand, when the signal input to the composite video signal input terminal 100 is low, the input signal is detected from the condenser C1 and the grounded resistor R1 as shown in FIG. The signal is input to the comb filter 111b in the circuit unit 110 as a low signal. Therefore, the resistor R4 and the grounded capacitor c7 are input to the transistor TR2 in the buffer circuit unit 120 as a low signal. do.

이렇게 상기 트랜지스터(TR2)의 베이스에 로우신호로 입력됨에 따라 상기 트랜지스터(TR2)가 오프됨으로써 수평동기신호 검출회로부(130)와 수직동기신호 검출회로부(140)에 각각 로우신호가 입력된다.As the transistor TR2 is turned off as the low signal is input to the base of the transistor TR2, the low signal is input to the horizontal synchronous signal detection circuit 130 and the vertical synchronous signal detection circuit 140, respectively.

그리고 상기 수평동기신호 검출회로부(130)와 상기 수직동기신호 검출회로부(140)에 로우로 입력된 신호에 의하여 수평동기신호 검출단(131)과 수직동기신호검출단(141)에 수평동기신호와 수직동기신호가 각각 로우로 출력된다.The horizontal synchronous signal detection unit 131 and the vertical synchronous signal detection unit 141 are connected to the horizontal synchronous signal detection circuit unit 130 and the vertical synchronous signal detection circuit unit 140 by a low signal. The vertical synchronization signal is output low, respectively.

또한 상기 트랜지스터(TR2)가 오프됨에 따라 상기 콤필터(111b)에 로우로 입력된 교류성분의 영상신호와, 전원(B+)전압에 의하여 콤필터(111b)가 동작하여 휘도신호 출력단(112)에 휘도신호가 출력되로 컬러신호 출력단(113)에는 컬러신호가 출력되도록 한다.In addition, as the transistor TR2 is turned off, the comb filter 111b is operated by the video signal of the AC component input to the comb filter 111b low and the power supply B + voltage, thereby operating the luminance signal output terminal 112. The luminance signal is output to the color signal output terminal 113 so that the color signal is output.

따라서 본 고안의 두가지 실시예의 차이점은 합성영상신호 입력단(100)에 입력된 신호가 하이로 입력되면 제1도의 실시예에서는 휘도신호와 컬러신호, 수평동기신호와 수직동기신호가 모두 안정된 하이신호로 검출되었고 제2도의 실시예에서는 휘도신호와 컬러신호만 로우신호로, 수평동기 신호와 수직동기신호는 안정된 하이신호로 검출되었으며, 합성영상신호 입력단(100)에 입력된 신호가 로우로 입력되면 제1도의 실시예에는 휘도신호와 컬러신호, 수평 동기신호와 수직동기신호가 모두 로우신호로 검출되었고 제2도의 실시예에는 휘도신호와 컬러신호만 안정된 하이신호로, 수평동기신호와 수직동기신호는 로우신호로 검출되도록 하였는바, 본 고안의 의도가 안정된 휘도신호와 컬러신호, 수평동기신호와 수직동기신호가 분리점출되도록 하는데 있으므로 제1도의 실시예와 제2도의 실시예에서 동일한 목적을 얻을 수 있다.Therefore, the difference between the two embodiments of the present invention is that when the signal input to the composite video signal input terminal 100 is input as high, in the embodiment of FIG. 1, the luminance signal, the color signal, the horizontal synchronization signal and the vertical synchronization signal are all stable high signals. In the embodiment of FIG. 2, only the luminance signal and the color signal are detected as low signals, and the horizontal and vertical synchronization signals are detected as stable high signals. When the signal input to the composite image signal input terminal 100 is inputted as low, In the embodiment of FIG. 1, the luminance signal, the color signal, the horizontal synchronization signal, and the vertical synchronization signal are all detected as low signals. In the embodiment of FIG. 2, only the luminance signal and the color signal are stable high signals, and the horizontal synchronization signal and the vertical synchronization signal are It was detected as a low signal, and the intention of the present invention is to stably separate the luminance signal, the color signal, the horizontal synchronization signal, and the vertical synchronization signal. Therefore, the same purpose can be obtained in the embodiment of FIG. 1 and the embodiment of FIG.

이상에서 설명한 바와같이 본 고안은 컬TV의 합성영상 신호가 버퍼회로에 입력되어 그 버퍼회로가 완충작용을 함으로써 휘도신호와 컬러신호, 수직동기신호와 수평 동기신호로 분리검출시 더욱 안정된 값으로 분리 검출되는 효과가 있다.As described above, according to the present invention, the composite video signal of Curl TV is input to the buffer circuit, and the buffer circuit is buffered so that the signal is separated into a more stable value when separated into a luminance signal, a color signal, a vertical sync signal, and a horizontal sync signal. There is an effect detected.

Claims (5)

TV신호로 부터 동기신호의 분리검출회로에 있어서, 통상의 합성영상신호 입력단(100)에 콘덴서(C1)와 저항(R1)을 통해 합성영상신호 따라 휘도신호와 컬러신호로 분리 검출하는 휘도, 컬러신호 검출회로부(110)를 연결하고, 저항(R4), 콘덴서(C8)를 통하여서는 그 합성영상신호가 안정된 수평동기신호와 수직동기신호로 분리검출되도록 완충작용을 하는 버퍼회로부(120)를 연결하며, 상기 휘도, 컬러신호, 검출회로부(10)에 연결된 버회로부(120)는 수평동기신호만 검출하는 수평동기신호검출회로부(130)와 수직동기신호만 검출하는 수직동기신호검출회로부(140)에 연결하여 컬러 TV의 합성영상신호로부터 안정된 휘도 신호와 수직동기신호와 수평동기신호가 분리 검출되도록 구성함을 특징으로 하는 TV신호로 부터 안정된 동기신호의 분리검출회로.In a separate detection circuit for synchronizing signals from a TV signal, luminance and color which are separately detected as a luminance signal and a color signal according to the composite video signal through a capacitor C1 and a resistor R1 at a conventional composite video signal input terminal 100. The signal detection circuit unit 110 is connected, and the buffer circuit unit 120 is buffered so that the composite video signal is separated and detected as a stable horizontal synchronizing signal and a vertical synchronizing signal through the resistor R4 and the condenser C8. The burr circuit 120 connected to the luminance, color signal, and detection circuit unit 10 includes a horizontal synchronous signal detection circuit unit 130 for detecting only a horizontal synchronous signal and a vertical synchronous signal detection circuit unit 140 for detecting only a vertical synchronous signal. And a stable detection signal and a vertical synchronization signal and a horizontal synchronization signal are separately detected from the composite video signal of the color TV. 제1항에 있어서, 합성영상호가 휘도·컬러신호검출회로부(110)의 콤필터(111a)에 의하여 휘도신호와 컬러신호로 분리검출되도록 한 TV신호로 부터 안정된 동기신호의 분리검출회로.2. The separate detection circuit according to claim 1, wherein the composite video signal is stabilized from a TV signal such that the composite video signal is separately detected as a luminance signal and a color signal by a comb filter (111a) of the luminance and color signal detection circuit unit (110). 제1항에 합성영상신호에 의하여 버퍼회로부(120)의 트랜지스터(TR1)가 안정된 수평동기신호와 수직동기신호로 분리 검출되도록 완충작용을 하는 TV신호로 부터 안정된 동기신호의 분리검출회로.The separate detection circuit of the stable synchronization signal from the TV signal buffering function so that the transistor (TR1) of the buffer circuit unit 120 is separated into a stable horizontal synchronization signal and a vertical synchronization signal by the composite video signal. 제1항에 있어서, 수평동기신호만 검출하는 상기 수핑동기신호 검출회로부(130)는 저항(R2)과 콘덴서로 구성하되 이 저항(R2)과 콘덴서(C4)를 상기 버퍼회로부(120)와 수평동기신호검출단(131)에 직렬연결하여 구성한 것을 특징으로 하는 TV신호로 부터 안정된 동기신호의 분리검출회로.The method of claim 1, wherein the ping synchronous signal detection circuit 130 for detecting only the horizontal synchronization signal is composed of a resistor (R2) and a capacitor, the resistor (R2) and the capacitor (C4) parallel to the buffer circuit unit 120 A separate detection circuit for a stable synchronization signal from a TV signal, characterized in that configured in series with the synchronization signal detection terminal (131). 제1항에 있어서, 수직동기신호만을 검출하는 상기 수직동기신호 검출회로부(140)는 저항(R3)과 콘덴서(C5), (C6)로 구성하되 이 저항(R3)과 콘덴서(C5)를 상기 버퍼회로부(120)와 수직동기신호검출단(141)에 직렬연결하고 상기 저항(R3)과 콘덴서(C5)사이에 콘덴서(C6)를 연결하여 구성한 것을 특징으로 하는 TV신호로부터 안정된 동기신호의 분리검출회로.The vertical synchronizing signal detecting circuit unit 140 for detecting only the vertical synchronizing signal includes a resistor R3, a capacitor C5, and a C6. Separation of a stable synchronization signal from a TV signal, characterized in that by connecting in series with the buffer circuit unit 120 and the vertical synchronous signal detection terminal 141 and connecting the capacitor (C6) between the resistor (R3) and the capacitor (C5) Detection circuit.
KR2019880020208U 1988-12-07 1988-12-07 Stable synchronous signal separating detective circuit KR910009000Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019880020208U KR910009000Y1 (en) 1988-12-07 1988-12-07 Stable synchronous signal separating detective circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019880020208U KR910009000Y1 (en) 1988-12-07 1988-12-07 Stable synchronous signal separating detective circuit

Publications (2)

Publication Number Publication Date
KR900013733U KR900013733U (en) 1990-07-06
KR910009000Y1 true KR910009000Y1 (en) 1991-11-18

Family

ID=19281951

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019880020208U KR910009000Y1 (en) 1988-12-07 1988-12-07 Stable synchronous signal separating detective circuit

Country Status (1)

Country Link
KR (1) KR910009000Y1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100484532B1 (en) * 2002-01-07 2005-04-20 윤안소 Registration number plate for car

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100484532B1 (en) * 2002-01-07 2005-04-20 윤안소 Registration number plate for car

Also Published As

Publication number Publication date
KR900013733U (en) 1990-07-06

Similar Documents

Publication Publication Date Title
KR910009000Y1 (en) Stable synchronous signal separating detective circuit
KR980004010A (en) Multiplexer Sync Signal Detection and Separation Method
KR920006949B1 (en) Sync-signal seperating circuit
KR950010389Y1 (en) Video signal recognizing circuit
KR0144962B1 (en) A sync signal separation apparatus of hdtv
KR900001325Y1 (en) Synchronizing devision circuit for satelite signal receiver
KR910019401A (en) Video signal processing device
KR890004764Y1 (en) Video switching circuit
JPH0510463Y2 (en)
KR940005288Y1 (en) Synchronous signal selection ic
KR0137212Y1 (en) Sync. separating circuit
KR920008528Y1 (en) Circuit for eliminating the remaining image after switching off in tv
KR870002271Y1 (en) Horizontal pulse frequency stabilization circuit of television
KR960012593B1 (en) Circuit for automatically converting chrominance demodulator according to a broadcasting method
KR100322577B1 (en) Phase cut discrimination device
KR910004904Y1 (en) Point noise detecting circuit using correlation detecting
KR960006584A (en) Method and Circuit for Automatically Correcting the Vertical Size of TV Receiver
KR910008287Y1 (en) Jitter clear circuit of color tv
KR900000709Y1 (en) Horizontal synchronizing signal dividing circuit
KR900007386Y1 (en) Syn seperating circuits of satellite receiver
KR840001114Y1 (en) Feld dectecting circuit in video signal
KR910006093Y1 (en) Picture in picture signal processing circuit
KR0139175B1 (en) Sync separation and field detection circuit and method in hdtv
KR970058046A (en) Plasma Display Panel TV's Horizontal Sync Signal Filter
KR900007853Y1 (en) Video signal detecting time reducing circuit

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 19981029

Year of fee payment: 8

LAPS Lapse due to unpaid annual fee