KR910006881A - Boundary pixel detection circuit of binary image - Google Patents

Boundary pixel detection circuit of binary image Download PDF

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Publication number
KR910006881A
KR910006881A KR1019890014176A KR890014176A KR910006881A KR 910006881 A KR910006881 A KR 910006881A KR 1019890014176 A KR1019890014176 A KR 1019890014176A KR 890014176 A KR890014176 A KR 890014176A KR 910006881 A KR910006881 A KR 910006881A
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KR
South Korea
Prior art keywords
data
pixel
boundary pixel
line
memory means
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Application number
KR1019890014176A
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Korean (ko)
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KR930009161B1 (en
Inventor
신재섭
Original Assignee
정용문
삼성전자 주식회사
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Priority to KR1019890014176A priority Critical patent/KR930009161B1/en
Publication of KR910006881A publication Critical patent/KR910006881A/en
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Publication of KR930009161B1 publication Critical patent/KR930009161B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/40—Extraction of image or video features
    • G06V10/46—Descriptors for shape, contour or point-related descriptors, e.g. scale invariant feature transform [SIFT] or bags of words [BoW]; Salient regional features

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  • Engineering & Computer Science (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Theoretical Computer Science (AREA)
  • Image Analysis (AREA)
  • Image Processing (AREA)

Abstract

내용 없음No content

Description

이진 화상의 경계(境界)화소 검출회로Boundary pixel detection circuit of binary image

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 의한 이진 화상 경계 화소검출부를 채용한 화상처리 시스템의 개략적인 블럭도.2 is a schematic block diagram of an image processing system employing a binary image boundary pixel detection unit according to the present invention.

제3도는 본 발명에 의한 이진 화상 경계 화소 검출부에서 경계화소로 선택되는 예를 나타낸 논리도.3 is a logic diagram showing an example in which a binary pixel boundary pixel detection unit is selected as a boundary pixel according to the present invention.

제4도는 본 발명에 의한 경계 화소 선택의 논리적 구성을 나타낸 진리표와 논리를 도시한 도면.4 is a diagram showing a truth table and logic showing the logical configuration of boundary pixel selection according to the present invention;

Claims (1)

화상처리 시스템에서 A/D 변환된 전체의 화상데이터를 저장하는 제1페이지 메모리 수단으로부터 3라인분으로 데이터를 제어수단에 의해서 기입 및 독출하는 라인 메모리수단과, 상기 라인 메모리수단에서 독출된 데이터를 읽어 중심화소에 대한 수직, 수평으로의 인접 화소들과 비교를 위해 상기 데이터를 각각 지연시키는 지연수단과, 상기 지연수단을 통해 입력된 각각 라인에 해당되는 데이터를 조합하여 경계화소와 점잡음을 검출하는 경계화소 검출수단과, 상기 라인메모리 수단에서 독출된 데이터중 중심라인에 해당하는 데이터를 지연시키는 지연수단의 중심화소에 대한 출력신호와 기준데이터 신호를 비교하는 비교수단과, 상기한 비교수단과 경계화소 검출 수단에서 출력된 신호에 따라 입력되는 내부화소 및 고립화소신호를 변환하여 제2페이지 메모리로 출력하는 변환제어 논리 수단과, 상기 각 메모리의 입출력 제어 및 어드레스 발생을 위한 시스템 제어수단을 구비함을 특징으로 하는 이진화상의 경계화소 검출회로.Line memory means for writing and reading data by the control means for three lines from the first page memory means for storing the entire image data A / D converted in the image processing system, and the data read out from the line memory means. Read the delay means for delaying the data for comparison with adjacent pixels horizontally and horizontally with respect to the center pixel, and combining the data corresponding to each line input through the delay means. Comparison means for comparing an output signal and a reference data signal for the center pixel of the boundary pixel detection means for detecting, the delay means for delaying data corresponding to the center line among the data read out from the line memory means, and the comparison means described above. And converting the internal pixel and the isolated pixel signal according to the signal output from the boundary pixel detection means. If conversion control logic for outputting to the memory means, each memory output control and binarization, characterized in that the system comprises a control means for the boundary pixel address generation circuit on the detection of the. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890014176A 1989-09-29 1989-09-29 Boundary pixel detection circuit of binary image KR930009161B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890014176A KR930009161B1 (en) 1989-09-29 1989-09-29 Boundary pixel detection circuit of binary image

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890014176A KR930009161B1 (en) 1989-09-29 1989-09-29 Boundary pixel detection circuit of binary image

Publications (2)

Publication Number Publication Date
KR910006881A true KR910006881A (en) 1991-04-30
KR930009161B1 KR930009161B1 (en) 1993-09-23

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890014176A KR930009161B1 (en) 1989-09-29 1989-09-29 Boundary pixel detection circuit of binary image

Country Status (1)

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KR (1) KR930009161B1 (en)

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Publication number Publication date
KR930009161B1 (en) 1993-09-23

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