KR910013847A - Original Image Processing Equipment - Google Patents

Abstract

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Description

Original Image Processing Equipment

As this is a public information case, the full text was not included.

1 is an image processing circuit diagram,

2 is an exemplary diagram of gray image signal level acquisition of a one-dimensional scan;

3 is a block diagram of a manuscript processing circuit of the present invention.

Claims (1)

A facsimile original scan image data processing circuit for processing an image of a predetermined bit scanned from an image input device, comprising: a line memory for accessing original image scan data to an address and a control signal and outputting pixel data of all lines and all lines ( 26), a local window for shifting the pixel data of the current line, the pixel data of all the lines delayed by the operation of the line memory 26 and the pixel data of the previous line to form a local window of a predetermined size, and outputting the local window data. The pixel data of all the lines connected to the register 28 and the line memory 26 and output one line of delay from the line memory 26 is shifted to form a horizontal broad window WB, and the wide window data serving as the sample data. In synchronization with the image input sampling clock The clock CLK and an EOL signal input at predetermined intervals are input to generate a shift clock SC, a latch clock LC, an output control signal OE, a write control signal WE, and an address, thereby generating the line memory 26. ) And an address and clock generator 32 provided to the local window register 28 and the broad window register 30, and output terminals of the local window register 28 and the broad window register 30. The difference DEL between the maximum value WLMAX and the minimum value WLMIN of the local window WL of the window register 28, the rm average value AVE, and the center value CEN of the local window are extracted, and the maximum value of the broad window WB of the broad window register 30 is extracted. Extracts WBMAX and logically combines the result of comparison between the center value CEN, the difference DEL, and the average value AVE, the maximum value WLMAX of the broad window, and the center value CEN. Outputting Y Eunghyeong drain sh document image processing circuit characterized by a composed of the hold unit 34. ※ Note: The disclosure is based on the initial application.