KR900702563A - 드라이에칭 방법 - Google Patents

드라이에칭 방법

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Publication number
KR900702563A
KR900702563A KR1019900701544A KR900701544A KR900702563A KR 900702563 A KR900702563 A KR 900702563A KR 1019900701544 A KR1019900701544 A KR 1019900701544A KR 900701544 A KR900701544 A KR 900701544A KR 900702563 A KR900702563 A KR 900702563A
Authority
KR
South Korea
Prior art keywords
gas
dry etching
etching method
reactive gas
reactive
Prior art date
Application number
KR1019900701544A
Other languages
English (en)
Other versions
KR950000662B1 (ko
Inventor
미키오 노나카
히로유키 하라
Original Assignee
원본미기재
가부시키가이샤 도쿠다 세이사쿠쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 원본미기재, 가부시키가이샤 도쿠다 세이사쿠쇼 filed Critical 원본미기재
Publication of KR900702563A publication Critical patent/KR900702563A/ko
Application granted granted Critical
Publication of KR950000662B1 publication Critical patent/KR950000662B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

내용 없음

Description

드라이에칭 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명에 따른 드라이에칭 방법을 적용시킨 드라이에칭 장치를 나타낸 모식도이고, 제2도는 피처리물의 확대단면도이며, 제3도는 에틸알콜을 함유하는 에칭가스의 혼합비로 에칭속도 및 에칭 선택비의 관계를 나타낸 그라프이다.

Claims (6)

  1. 진공용기내의 수납대상에 피처리물을 수납하고 활성화수단을 매개로 활성화된 반응성가스로 상기 피처리물을 에칭시키는 방법에 있어서, 반응성 가스로서 불화물 가스와 수소를 구성원소로 함유하는 화합물의 가스가 포함된 가스를 사용하는 것임을 특징으로하는 드라이에칭 방법.
  2. 제1항에 있어서, 상기 불화물 가스로서 CF4, NF3및 F6중에서 적어도 1종 이상을 선택하여 사용하는 것임을 특징으로하는 드라이에칭 방법.
  3. 제1항에 있어서, 상기 수소를 구성원소로 함유하는 화합물의 가스는 에탄올, 메탄올 및 물 중에서 적어도 1종 이상을 선택하여 가스화시킨 것임을 특징으로하는 드라이에칭 방법.
  4. 진공용기내의 수납대상에 피처리물을 수납하고 활성화수단을 매개로 활성화된 반응성가스로 상기 피처리물을 에칭시키는 방법에 있어서, 반응성 가스로서 불화물가스와 산소가스 및 수소를 구성원소로 함유하는 화합물의 가스가 포함된 가스를 사용하는 것임을 특징으로 하는 드라이 에칭방법.
  5. 제4항에 있어서, 상기 반응성가스에는 질소가스가 포함된 것임을 특징으로하는 드라이에칭 방법.
  6. 진공용기내의 수납대상에 피처리물을 수납하고 활성화수단을 매개로 활성화된 반응성가스로 상기 피처리물을 에칭시키는 방법에 있어서, 반응성가스로서 불화물가스와 산소가스 및 수소가스가 포함된 가스를 사용하는 것임을 특징으로하는 드라이에칭 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019900701544A 1988-11-18 1989-11-17 드라이에칭 방법 KR950000662B1 (ko)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP88-291736 1988-11-18
JP29173688 1988-11-18
JP89-2461 1989-01-09
JP246189 1989-01-09
JP13518989 1989-05-29
JP89-135189 1989-05-29
PCT/JP1989/001174 WO1990005994A1 (en) 1988-11-18 1989-11-17 Dry-etching method

Publications (2)

Publication Number Publication Date
KR900702563A true KR900702563A (ko) 1990-12-07
KR950000662B1 KR950000662B1 (ko) 1995-01-27

Family

ID=27275359

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900701544A KR950000662B1 (ko) 1988-11-18 1989-11-17 드라이에칭 방법

Country Status (5)

Country Link
US (1) US5201994A (ko)
EP (1) EP0406434B1 (ko)
KR (1) KR950000662B1 (ko)
DE (1) DE68926855T2 (ko)
WO (1) WO1990005994A1 (ko)

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DE4228551C2 (de) * 1992-08-27 1996-02-22 Linde Ag Verfahren und Anwendung des Verfahrens zur reinigenden Behandlung von Oberflächen mit einem Niederdruckplasma
US5338362A (en) * 1992-08-29 1994-08-16 Tokyo Electron Limited Apparatus for processing semiconductor wafer comprising continuously rotating wafer table and plural chamber compartments
US5756402A (en) * 1992-12-28 1998-05-26 Kabushiki Kaisha Toshiba Method of etching silicon nitride film
JP2804700B2 (ja) * 1993-03-31 1998-09-30 富士通株式会社 半導体装置の製造装置及び半導体装置の製造方法
JPH0864559A (ja) * 1994-06-14 1996-03-08 Fsi Internatl Inc 基板面から不要な物質を除去する方法
US6124211A (en) * 1994-06-14 2000-09-26 Fsi International, Inc. Cleaning method
US5534107A (en) * 1994-06-14 1996-07-09 Fsi International UV-enhanced dry stripping of silicon nitride films
US6015503A (en) * 1994-06-14 2000-01-18 Fsi International, Inc. Method and apparatus for surface conditioning
US5635102A (en) 1994-09-28 1997-06-03 Fsi International Highly selective silicon oxide etching method
JPH08186098A (ja) * 1994-12-27 1996-07-16 Ryoden Semiconductor Syst Eng Kk 感光性樹脂の除去方法および除去装置
US6794301B2 (en) 1995-10-13 2004-09-21 Mattson Technology, Inc. Pulsed plasma processing of semiconductor substrates
US6253704B1 (en) 1995-10-13 2001-07-03 Mattson Technology, Inc. Apparatus and method for pulsed plasma processing of a semiconductor substrate
US5983828A (en) * 1995-10-13 1999-11-16 Mattson Technology, Inc. Apparatus and method for pulsed plasma processing of a semiconductor substrate
US7025831B1 (en) 1995-12-21 2006-04-11 Fsi International, Inc. Apparatus for surface conditioning
US6015761A (en) * 1996-06-26 2000-01-18 Applied Materials, Inc. Microwave-activated etching of dielectric layers
US5911887A (en) * 1996-07-19 1999-06-15 Cypress Semiconductor Corporation Method of etching a bond pad
US5786276A (en) * 1997-03-31 1998-07-28 Applied Materials, Inc. Selective plasma etching of silicon nitride in presence of silicon or silicon oxides using mixture of CH3F or CH2F2 and CF4 and O2
US6051504A (en) * 1997-08-15 2000-04-18 International Business Machines Corporation Anisotropic and selective nitride etch process for high aspect ratio features in high density plasma
US6165273A (en) 1997-10-21 2000-12-26 Fsi International Inc. Equipment for UV wafer heating and photochemistry
US6080680A (en) * 1997-12-19 2000-06-27 Lam Research Corporation Method and composition for dry etching in semiconductor fabrication
US6057645A (en) * 1997-12-31 2000-05-02 Eaton Corporation Plasma discharge device with dynamic tuning by a movable microwave trap
US6461529B1 (en) 1999-04-26 2002-10-08 International Business Machines Corporation Anisotropic nitride etch process with high selectivity to oxide and photoresist layers in a damascene etch scheme
US7547635B2 (en) * 2002-06-14 2009-06-16 Lam Research Corporation Process for etching dielectric films with improved resist and/or etch profile characteristics
US20040171260A1 (en) * 2002-06-14 2004-09-02 Lam Research Corporation Line edge roughness control
US7357115B2 (en) * 2003-03-31 2008-04-15 Lam Research Corporation Wafer clamping apparatus and method for operating the same
FR2865135B1 (fr) * 2004-01-20 2007-10-05 Serac Group Installation de sterilisation d'articles par bombardement electronique
US7268082B2 (en) * 2004-04-30 2007-09-11 International Business Machines Corporation Highly selective nitride etching employing surface mediated uniform reactive layer films
US8715455B2 (en) * 2007-02-06 2014-05-06 Tokyo Electron Limited Multi-zone gas distribution system for a treatment system
JP6011614B2 (ja) * 2012-04-02 2016-10-19 住友電気工業株式会社 多孔質炭素材料の製造方法

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JPS5751265A (en) * 1980-09-10 1982-03-26 Hitachi Ltd Microwave plasma etching device
JPS57139927A (en) * 1981-02-23 1982-08-30 Nec Corp Manufacture of semiconductor integrated circuit
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JPS5950567A (ja) * 1982-09-16 1984-03-23 Hitachi Ltd 電界効果トランジスタの製造方法
DE3420347A1 (de) * 1983-06-01 1984-12-06 Hitachi, Ltd., Tokio/Tokyo Gas und verfahren zum selektiven aetzen von siliciumnitrid
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Also Published As

Publication number Publication date
EP0406434A1 (en) 1991-01-09
EP0406434B1 (en) 1996-07-17
US5201994A (en) 1993-04-13
DE68926855T2 (de) 1997-02-13
DE68926855D1 (de) 1996-08-22
KR950000662B1 (ko) 1995-01-27
WO1990005994A1 (en) 1990-05-31
EP0406434A4 (en) 1991-05-15

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