KR900018825A - Operation control device of input / output control circuit in personal computer - Google Patents

Operation control device of input / output control circuit in personal computer Download PDF

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Publication number
KR900018825A
KR900018825A KR1019890007284A KR890007284A KR900018825A KR 900018825 A KR900018825 A KR 900018825A KR 1019890007284 A KR1019890007284 A KR 1019890007284A KR 890007284 A KR890007284 A KR 890007284A KR 900018825 A KR900018825 A KR 900018825A
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KR
South Korea
Prior art keywords
input
control circuit
output control
output
personal computer
Prior art date
Application number
KR1019890007284A
Other languages
Korean (ko)
Inventor
김동옥
Original Assignee
정용문
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 정용문, 삼성전자 주식회사 filed Critical 정용문
Priority to KR1019890007284A priority Critical patent/KR900018825A/en
Publication of KR900018825A publication Critical patent/KR900018825A/en

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Abstract

내용 없음No content

Description

퍼스널 컴퓨터에 있어서 입출력 제어회로의 작동 제어장치Operation control device of input / output control circuit in personal computer

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 회로도, 제3도는 제2도의 동작 흐름도.2 is a circuit diagram of the present invention, and FIG. 3 is an operation flowchart of FIG.

Claims (2)

CPU 및 입출력 제어회로(110)를 구비한 퍼스널 컴퓨터에 있어서, CPU로부터 인가되는 어드레스와 칩셀렉트 인에이블 단자를 인입되는 칩 셀렉트 인에이블신호를 디코딩하여 소프트웨어 클럭 신호나 CS신호를 발생하는 디코더회로(100)와 운용자의 조작에 의해 상기 입출력 제어회로(110)의 작동을 지정하는 제1점퍼(J200)와, 상기 디코더회로(100)의 출력인 소프트웨어 클럭 신호에 의해 상기 입출력 제어회로(110)의 작동을 지정하는 플립플롭(FF1)과, 상기 제1점퍼(J201)의 출력이나 상기 플립플롭(FF1)의 출력을 상기 디코더회로(100)의 칩 셀렉트 인에이블단자로 전송하는 논리전송 수단과, 운용자의 조작에 의해 상기 논리전송수단의 전송 논리신호의 선택을 지정하기 위한 제2점퍼(J210)로 구성됨을 특징으로하는 입출력 제어회로의 작동제어장치.A personal computer having a CPU and an input / output control circuit 110, comprising: a decoder circuit for decoding a chip select enable signal into which an address applied from a CPU and a chip select enable terminal are inserted to generate a software clock signal or a CS signal ( 100 and a first jumper J200 for designating the operation of the input / output control circuit 110 by an operator and a software clock signal output from the decoder circuit 100 of the input / output control circuit 110. A flip-flop FF1 for designating an operation, logical transfer means for transmitting the output of the first jumper J201 or the output of the flip-flop FF1 to the chip select enable terminal of the decoder circuit 100; And a second jumper (J210) for designating a selection of a transmission logic signal of said logical transmission means by an operator's operation. 제1항에 있어서, 전원인가시 상기 플립플롭(FF1)을 초기화하는 리세트수단을 구비함을 특징으로 하는 입출력 제어회로의 작동 제어장치.2. An operation control apparatus for an input / output control circuit according to claim 1, further comprising reset means for initializing the flip-flop (FF1) when power is applied. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890007284A 1989-05-31 1989-05-31 Operation control device of input / output control circuit in personal computer KR900018825A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890007284A KR900018825A (en) 1989-05-31 1989-05-31 Operation control device of input / output control circuit in personal computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890007284A KR900018825A (en) 1989-05-31 1989-05-31 Operation control device of input / output control circuit in personal computer

Publications (1)

Publication Number Publication Date
KR900018825A true KR900018825A (en) 1990-12-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890007284A KR900018825A (en) 1989-05-31 1989-05-31 Operation control device of input / output control circuit in personal computer

Country Status (1)

Country Link
KR (1) KR900018825A (en)

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