KR900005682A - Frequency output generator - Google Patents

Frequency output generator Download PDF

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Publication number
KR900005682A
KR900005682A KR1019890006722A KR890006722A KR900005682A KR 900005682 A KR900005682 A KR 900005682A KR 1019890006722 A KR1019890006722 A KR 1019890006722A KR 890006722 A KR890006722 A KR 890006722A KR 900005682 A KR900005682 A KR 900005682A
Authority
KR
South Korea
Prior art keywords
latch circuit
bit rate
frequency
output
output generator
Prior art date
Application number
KR1019890006722A
Other languages
Korean (ko)
Inventor
알. 블랭크 넬슨
엘.젤로니스 게리
Original Assignee
로버트 제이. 에드워즈
더 뱁콕 앤드 윌콕스 컴퍼니
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 로버트 제이. 에드워즈, 더 뱁콕 앤드 윌콕스 컴퍼니 filed Critical 로버트 제이. 에드워즈
Publication of KR900005682A publication Critical patent/KR900005682A/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B19/00Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
    • H03B19/06Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
    • H03B19/14Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device

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  • Measuring Volume Flow (AREA)
  • Manipulation Of Pulses (AREA)
  • Indication And Recording Devices For Special Purposes And Tariff Metering Devices (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

내용없음No content

Description

주파수 출력발생기Frequency output generator

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 주파수출력 발생기에 있어서 신호조정기(12)의 입추력 파형도이다.2 is an input thrust waveform diagram of the signal regulator 12 in the frequency output generator according to the present invention.

Claims (6)

아날로그 입력신호의 크기에 비례하는 주파수를 갖춘 일련의 출력펄스를 발생시키도록 된 주파수출력 발생기에 있어서, 상기 아날로그입력신호를 소정 워드길이의 디지탈신호로 변환시키는 신호조정기(12)와, 상기 워드의 일부분을 제1래치회로(18)로 전송하고 그 나머지부분을 제2래치회로(20)로 전송하는 마이크로프로세서(14), 이 마이크로프로세서(14)와 제1래치회로(18) 및 제2래치회로(20)를 상호 연결시키도록 되어 있으면서 상기 제1래치회로(18)로 전송되는 워드길이에 근접한 용량을 갖는 버스(32) 및, 상기 제1래치회로(18)와 제2래치회로(20)에 연결되어져 상기 아날로그입력신호에 대응되는 출력신호를 발생시키는 복수의 비트율승산기(24, 26, 28)를 구비하여 이루어진 것을 특징으로 하는 주파수출력발생기.A frequency output generator configured to generate a series of output pulses having a frequency proportional to the magnitude of an analog input signal, comprising: a signal conditioner 12 for converting the analog input signal into a digital signal having a predetermined word length; A microprocessor 14 which transfers a portion to the first latch circuit 18 and the remaining portion to the second latch circuit 20, the microprocessor 14 and the first latch circuit 18 and the second latch. A bus 32 having a capacitance close to the word length transmitted to the first latch circuit 18 while interconnecting the circuits 20, and the first latch circuit 18 and the second latch circuit 20. And a plurality of bit rate multipliers (24, 26, 28) connected to each other to generate an output signal corresponding to the analog input signal. 제1항에 있어서, 상기 비트율승산기(24, 26, 28)가 종속적으로 상호연결된 것을 특징으로 하는 주파수출력발생기.2. A frequency output generator according to claim 1, characterized in that the bit rate multipliers (24, 26, 28) are interconnected dependently. 제1항에 있어서, 조작자의 임의적인 입력데이터를 받아들이는 제3래치회로(22)와 상기 다수의 비트율승산기(24, 26, 28)의 출력을 분할시킬 수 있도록 해주는 프로그램가능주파수분할기(30)를 더 구비하여 구성되면서, 상기 제3래치회로(22)가 상기 다수의 비트율승산기(24, 26, 28)와 프로그램가능 주파수분할기(30)에 접속시켜진 것을 특징으로 하는 주파수출력발생기.2. The programmable frequency divider (30) according to claim 1, wherein the programmable frequency divider (30) enables to divide the output of the plurality of bit rate multipliers (24, 26, 28) and the third latch circuit (22) that accepts arbitrary input data of the operator. And a third latch circuit (22) connected to the plurality of bit rate multipliers (24, 26, 28) and a programmable frequency divider (30). 제3항에 있어서, 상기비트율승산기(24, 26. 28)의 출력단이 상기 프로그램가능주파수분할기(30)에 연결된 것을 특징으로 하는 주파수출력발생기.4. Frequency generator as claimed in claim 3, characterized in that the output of said bit rate multiplier (24, 26. 28) is connected to said programmable frequency divider (30). 제1항에 있어서, 상기 버스(32)의 용량이 상기 제1래치회로(18) 및 제2래치회로(20)의 용량과 거의 같도록 된 것을 특징으로 하는 주파수출력발생기.2. The frequency output generator as claimed in claim 1, wherein the capacity of the bus (32) is approximately equal to that of the first latch circuit (18) and the second latch circuit (20). 제1항에 있어서, 상기 제1래치회로(18)와 상기 제2래치회로(20)의 용량이 상기 각 비트율승산기(24, 26, 28)의 용량과, 거의 같도록 된 것을 특징으로 하는 주파수출력발생기.2. The frequency according to claim 1, wherein the capacitance of the first latch circuit 18 and the second latch circuit 20 is substantially equal to the capacitance of each of the bit rate multipliers 24, 26, 28. Output generator. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890006722A 1988-09-30 1989-05-19 Frequency output generator KR900005682A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US25283488A 1988-09-30 1988-09-30
US07-252834 1988-09-30

Publications (1)

Publication Number Publication Date
KR900005682A true KR900005682A (en) 1990-04-14

Family

ID=22957744

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890006722A KR900005682A (en) 1988-09-30 1989-05-19 Frequency output generator

Country Status (5)

Country Link
JP (1) JPH02149019A (en)
KR (1) KR900005682A (en)
AU (1) AU607635B2 (en)
CA (1) CA1322575C (en)
IN (1) IN171476B (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5143664A (en) * 1974-10-11 1976-04-14 Mitsubishi Chem Ind Anarogu dejitaruhenkansochi
AU1647576A (en) * 1976-08-02 1978-02-09 Johnson & Johnson Electronic thermometer
JPS62110323A (en) * 1985-11-08 1987-05-21 Nec Ic Microcomput Syst Ltd Frequency-digital conversion circuit
EP0232451B1 (en) * 1986-02-10 1990-03-14 LGZ LANDIS & GYR ZUG AG Method and device for the conversion of an electrical signal into a proportional frequency

Also Published As

Publication number Publication date
CA1322575C (en) 1993-09-28
JPH02149019A (en) 1990-06-07
IN171476B (en) 1992-10-24
AU4153289A (en) 1990-04-05
AU607635B2 (en) 1991-03-07

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