KR900005563A - Manufacturing Method of Semiconductor Device - Google Patents

Manufacturing Method of Semiconductor Device Download PDF

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Publication number
KR900005563A
KR900005563A KR1019880012049A KR880012049A KR900005563A KR 900005563 A KR900005563 A KR 900005563A KR 1019880012049 A KR1019880012049 A KR 1019880012049A KR 880012049 A KR880012049 A KR 880012049A KR 900005563 A KR900005563 A KR 900005563A
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KR
South Korea
Prior art keywords
conductive type
polycrystalline silicon
forming
manufacturing
semiconductor device
Prior art date
Application number
KR1019880012049A
Other languages
Korean (ko)
Other versions
KR920001035B1 (en
Inventor
정순문
Original Assignee
강진구
삼성반도체통신 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 강진구, 삼성반도체통신 주식회사 filed Critical 강진구
Priority to KR1019880012049A priority Critical patent/KR920001035B1/en
Publication of KR900005563A publication Critical patent/KR900005563A/en
Application granted granted Critical
Publication of KR920001035B1 publication Critical patent/KR920001035B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H01L21/76879—Filling of holes, grooves or trenches, e.g. vias, with conductive material by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895—Local interconnects; Local pads, as exemplified by patent document EP0896365
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

내용 없음No content

Description

반도체 장치의 제조방법Manufacturing Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1(A)-(G)도는 본 발명에 따른 일실시예의 제조공정도.1 (A)-(G) is a manufacturing process diagram of one embodiment according to the present invention.

Claims (3)

제1도전형의 반도체 기판 표면에 형성된 상기 제1도전형과 반대도전형인 제2도전형의 반도체 영역상에 전극을 형성하는 공정이 하기 공정을 구비하여 하기 공정의 연속으로 이루어짐을 특징으로 하는 반도체 장치의 제조방법.A process of forming an electrode on a semiconductor region of a second conductive type which is opposite to the first conductive type formed on the surface of the first conductive type semiconductor substrate comprises the following steps, comprising the following steps: Method of manufacturing a semiconductor device. (a) 제1도전형의 반도체 기판 표면에 형성된 제1도전형과 반대도전형인 제2도전형의 반도체영역 상부에 상기 반도체 영역을 소정부분 노출시키는 접속창을 형성하는 공정 (b) 상기 기판상에 상기 접속창 영역을 덮을수 있도록 도핑된 다결정 실리콘 패턴을 형성하는 공정 (c) 상기 기판상부 전면에 절연막을 도포하고 상기 다결정 실리콘 패턴 부분을 노출시키는 창을 형성하는 공정 (d) 상기 노출된 다결정 실리콘 부분 상부의 창영역을 도전성 물질로 채우는 공정 (e) 상기 도전성 물질과 절연막상에 금속을 도포하고 전극 패턴을 형성하는 공정(a) forming a connection window exposing a predetermined portion of the semiconductor region over the semiconductor region of the second conductive type opposite to the first conductive type formed on the surface of the semiconductor substrate of the first conductive type (b) the substrate Forming a doped polycrystalline silicon pattern on the substrate to cover the connection window region (c) applying an insulating film to the entire upper surface of the substrate and forming a window for exposing the polycrystalline silicon pattern portion; Filling the window region on the polycrystalline silicon portion with a conductive material (e) applying a metal on the conductive material and the insulating film and forming an electrode pattern 제1항에 있어서, 상기 다결정 실리콘 패턴의 두께가 1000-3000Å으로 형성하는 것을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein the polycrystalline silicon pattern has a thickness of 1000-3000 kPa. 제1항에 있어서, 제(d)공정이 다결정 실리콘 위에 텅스텐을 선택적으로 도포하는 공정임을 특징으로 하는 반도체 장치의 제조방법.The method of manufacturing a semiconductor device according to claim 1, wherein step (d) is a step of selectively applying tungsten on the polycrystalline silicon. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019880012049A 1988-09-16 1988-09-16 Manufacturing method of semiconductor device KR920001035B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019880012049A KR920001035B1 (en) 1988-09-16 1988-09-16 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880012049A KR920001035B1 (en) 1988-09-16 1988-09-16 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
KR900005563A true KR900005563A (en) 1990-04-14
KR920001035B1 KR920001035B1 (en) 1992-02-01

Family

ID=19277826

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880012049A KR920001035B1 (en) 1988-09-16 1988-09-16 Manufacturing method of semiconductor device

Country Status (1)

Country Link
KR (1) KR920001035B1 (en)

Also Published As

Publication number Publication date
KR920001035B1 (en) 1992-02-01

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