KR850700279A - 컴퓨터 및 그에 관한 개량 - Google Patents

컴퓨터 및 그에 관한 개량

Info

Publication number
KR850700279A
KR850700279A KR1019850700282A KR850700282A KR850700279A KR 850700279 A KR850700279 A KR 850700279A KR 1019850700282 A KR1019850700282 A KR 1019850700282A KR 850700282 A KR850700282 A KR 850700282A KR 850700279 A KR850700279 A KR 850700279A
Authority
KR
South Korea
Prior art keywords
address
computer
processor
master controller
main memory
Prior art date
Application number
KR1019850700282A
Other languages
English (en)
Inventor
앤더스 핸드릭 햄달 고란
Original Assignee
앤더스 핸드릭 햄달 고란
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 앤더스 핸드릭 햄달 고란 filed Critical 앤더스 핸드릭 햄달 고란
Publication of KR850700279A publication Critical patent/KR850700279A/ko

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Saccharide Compounds (AREA)
  • Peptides Or Proteins (AREA)
  • Multi Processors (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

내용 없음

Description

컴퓨터 및 그에 관한 개량
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음

Claims (1)

  1. 센트럴 프로세서, 메모리에 2진 형태의 정보저장을 위한 주 메모리 수단, 실제(virtual) 어드레스를 발하는 프로세서, 프로세서에 의해 발해진 실제 어드레스를 주메모리에서 진실(veal) 어드레스로 변환시키도록 제공된 마스터 컨트롤러, 어떤 프로그램 평션에 독립하여 어떤 어드레스 계산 또는 인덱스 곱을 수행하는 마스터 컨트롤러 병합 수단등을 포함하는 컴퓨터.
    ※참고사항:최초출원 내용에 의하여 공개하는 것임.
KR1019850700282A 1984-03-02 1985-03-01 컴퓨터 및 그에 관한 개량 KR850700279A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB848405491A GB8405491D0 (en) 1984-03-02 1984-03-02 Computers
GB8405491 1984-03-02
PCT/GB1985/000084 WO1985004031A1 (en) 1984-03-02 1985-03-01 Virtual address to real address conversion

Publications (1)

Publication Number Publication Date
KR850700279A true KR850700279A (ko) 1985-12-26

Family

ID=10557469

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019850700282A KR850700279A (ko) 1984-03-02 1985-03-01 컴퓨터 및 그에 관한 개량

Country Status (8)

Country Link
US (1) US4922415A (ko)
EP (1) EP0172868A1 (ko)
JP (1) JPS61502428A (ko)
KR (1) KR850700279A (ko)
AU (1) AU569615B2 (ko)
CA (1) CA1232078A (ko)
GB (1) GB8405491D0 (ko)
WO (1) WO1985004031A1 (ko)

Families Citing this family (18)

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US5276819A (en) * 1987-05-01 1994-01-04 Hewlett-Packard Company Horizontal computer having register multiconnect for operand address generation during execution of iterations of a loop of program code
JP2510605B2 (ja) * 1987-07-24 1996-06-26 株式会社日立製作所 仮想計算機システム
JPH02205953A (ja) * 1989-02-03 1990-08-15 Nec Corp アドレス変換装置
US5121487A (en) * 1989-02-21 1992-06-09 Sun Microsystems, Inc. High speed bus with virtual memory data transfer capability using virtual address/data lines
US5101493A (en) * 1989-06-19 1992-03-31 Digital Equipment Corporation Digital computer using data structure including external reference arrangement
DE58904087D1 (de) * 1989-07-21 1993-05-19 Heidenhain Gmbh Dr Johannes Verfahren zum interpolieren von positionsmesssignalen.
EP0423989A3 (en) * 1989-10-16 1992-09-23 Hewlett-Packard Company Software compiler and linker with improved line number table
US5301284A (en) * 1991-01-16 1994-04-05 Walker-Estes Corporation Mixed-resolution, N-dimensional object space method and apparatus
US5426747A (en) * 1991-03-22 1995-06-20 Object Design, Inc. Method and apparatus for virtual memory mapping and transaction management in an object-oriented database system
US5297285A (en) * 1991-07-23 1994-03-22 Telefonaktiebolaget L M Ericsson System for dynamically linking modular portions of computer software
SE515718C2 (sv) * 1994-10-17 2001-10-01 Ericsson Telefon Ab L M System och förfarande för behandling av minnesdata samt kommunikationssystem
US6542918B1 (en) * 1996-06-21 2003-04-01 Ramot At Tel Aviv University Ltd. Prefix sums and an application thereof
US5907866A (en) * 1996-12-19 1999-05-25 International Business Machines Corporation Block address translation circuit using two-bit to four-bit encoder
MXPA02011760A (es) 2000-05-31 2003-04-10 Matsushita Electric Ind Co Ltd Medio de registro de informacion, metodo de registro de informacion, aparato de registro de informacion, metodo de reproduccion de informacion y aparato de reproduccion de informacion.
US7505822B2 (en) * 2003-03-18 2009-03-17 University Of Maryland Optical interconnect structure in a computer system and method of transporting data between processing elements and memory through the optical interconnect structure
US8417733B2 (en) * 2010-03-04 2013-04-09 Oracle International Corporation Dynamic atomic bitsets
CN109426517B (zh) * 2017-08-30 2021-01-01 比亚迪股份有限公司 微控制单元及其控制方法和控制装置
TWI818732B (zh) * 2022-09-16 2023-10-11 新唐科技股份有限公司 記憶體裝置及其操作方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1188436A (en) * 1967-09-25 1970-04-15 Burroughs Corp Improvements in and relating to Digital Computers
US3723976A (en) * 1972-01-20 1973-03-27 Ibm Memory system with logical and real addressing
FR2230258A5 (ko) * 1973-05-16 1974-12-13 Honeywell Bull Soc Ind
GB2008821B (en) * 1977-11-04 1982-01-13 Sperry Rand Corp Digital computers
US4285040A (en) * 1977-11-04 1981-08-18 Sperry Corporation Dual mode virtual-to-real address translation mechanism
US4442484A (en) * 1980-10-14 1984-04-10 Intel Corporation Microprocessor memory management and protection mechanism
US4482952A (en) * 1980-12-15 1984-11-13 Nippon Electric Co., Ltd. Virtual addressing system using page field comparisons to selectively validate cache buffer data on read main memory data
US4456954A (en) * 1981-06-15 1984-06-26 International Business Machines Corporation Virtual machine system with guest architecture emulation using hardware TLB's for plural level address translations
US4682281A (en) * 1983-08-30 1987-07-21 Amdahl Corporation Data storage unit employing translation lookaside buffer pointer
JPS6184754A (ja) * 1984-10-03 1986-04-30 Hitachi Ltd 拡張アドレス変換装置
JPH0685156B2 (ja) * 1985-05-24 1994-10-26 株式会社日立製作所 アドレス変換装置

Also Published As

Publication number Publication date
EP0172868A1 (en) 1986-03-05
AU4061785A (en) 1985-09-24
GB8405491D0 (en) 1984-04-04
WO1985004031A1 (en) 1985-09-12
JPS61502428A (ja) 1986-10-23
CA1232078A (en) 1988-01-26
US4922415A (en) 1990-05-01
AU569615B2 (en) 1988-02-11

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Legal Events

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WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid