JPS5621238A - Address calculation processing system - Google Patents

Address calculation processing system

Info

Publication number
JPS5621238A
JPS5621238A JP9572879A JP9572879A JPS5621238A JP S5621238 A JPS5621238 A JP S5621238A JP 9572879 A JP9572879 A JP 9572879A JP 9572879 A JP9572879 A JP 9572879A JP S5621238 A JPS5621238 A JP S5621238A
Authority
JP
Japan
Prior art keywords
register
added
content
read out
calculation processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9572879A
Other languages
Japanese (ja)
Other versions
JPS5921059B2 (en
Inventor
Takeshi Murata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9572879A priority Critical patent/JPS5921059B2/en
Publication of JPS5621238A publication Critical patent/JPS5621238A/en
Publication of JPS5921059B2 publication Critical patent/JPS5921059B2/en
Expired legal-status Critical Current

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  • Executing Machine-Instructions (AREA)

Abstract

PURPOSE: To perform the address calculation processing in 2 cycles by accessing the work memory mutually and independently with two accessing section
CONSTITUTION: In the cycle I, the content of base register, lower rank L is read out from the work memory 1 on X bus and it is added with the adder with the displacement value. On the other hand, in cycle II, the content of the index register is read out on the bus Y and it is added with the ceontent of the register 5-L read out on the but X. The carry produced at the addition is added with the content of the register 5-U. When the result of addition is output together, it is fed to the main storage.
COPYRIGHT: (C)1981,JPO&Japio
JP9572879A 1979-07-27 1979-07-27 Address calculation processing method Expired JPS5921059B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9572879A JPS5921059B2 (en) 1979-07-27 1979-07-27 Address calculation processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9572879A JPS5921059B2 (en) 1979-07-27 1979-07-27 Address calculation processing method

Publications (2)

Publication Number Publication Date
JPS5621238A true JPS5621238A (en) 1981-02-27
JPS5921059B2 JPS5921059B2 (en) 1984-05-17

Family

ID=14145527

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9572879A Expired JPS5921059B2 (en) 1979-07-27 1979-07-27 Address calculation processing method

Country Status (1)

Country Link
JP (1) JPS5921059B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007055566A (en) * 2005-08-26 2007-03-08 T S Tec Kk Vehicular seat
JP2010030593A (en) * 2009-11-09 2010-02-12 Mazda Motor Corp Seat structure of vehicle

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI474597B (en) * 2006-05-31 2015-02-21 Intersil Americas LLC Apparatus for transferring charge

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007055566A (en) * 2005-08-26 2007-03-08 T S Tec Kk Vehicular seat
JP2010030593A (en) * 2009-11-09 2010-02-12 Mazda Motor Corp Seat structure of vehicle

Also Published As

Publication number Publication date
JPS5921059B2 (en) 1984-05-17

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