KR20180092972A - 하드웨어 플로우-제어를 갖는 강화된 직렬 주변장치 인터페이스 - Google Patents

하드웨어 플로우-제어를 갖는 강화된 직렬 주변장치 인터페이스 Download PDF

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Publication number
KR20180092972A
KR20180092972A KR1020187016215A KR20187016215A KR20180092972A KR 20180092972 A KR20180092972 A KR 20180092972A KR 1020187016215 A KR1020187016215 A KR 1020187016215A KR 20187016215 A KR20187016215 A KR 20187016215A KR 20180092972 A KR20180092972 A KR 20180092972A
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KR
South Korea
Prior art keywords
slave
voltage state
select line
slave select
line
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KR1020187016215A
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English (en)
Korean (ko)
Inventor
랄란 지 미쉬라
리차드 도미닉 위트펠트
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퀄컴 인코포레이티드
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Publication of KR20180092972A publication Critical patent/KR20180092972A/ko
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/404—Coupling between buses using bus bridges with address mapping
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • Information Transfer Systems (AREA)
  • Power Sources (AREA)
KR1020187016215A 2015-12-10 2016-11-15 하드웨어 플로우-제어를 갖는 강화된 직렬 주변장치 인터페이스 Withdrawn KR20180092972A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201562265877P 2015-12-10 2015-12-10
US62/265,877 2015-12-10
US15/348,435 US10140243B2 (en) 2015-12-10 2016-11-10 Enhanced serial peripheral interface with hardware flow-control
US15/348,435 2016-11-10
PCT/US2016/062106 WO2017099959A1 (en) 2015-12-10 2016-11-15 Enhanced serial peripheral interface with hardware flow-control

Publications (1)

Publication Number Publication Date
KR20180092972A true KR20180092972A (ko) 2018-08-20

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020187016215A Withdrawn KR20180092972A (ko) 2015-12-10 2016-11-15 하드웨어 플로우-제어를 갖는 강화된 직렬 주변장치 인터페이스

Country Status (9)

Country Link
US (1) US10140243B2 (enExample)
EP (1) EP3387542B1 (enExample)
JP (1) JP2018536942A (enExample)
KR (1) KR20180092972A (enExample)
CN (1) CN108369569B (enExample)
AU (1) AU2016369271A1 (enExample)
BR (1) BR112018011598A2 (enExample)
TW (1) TW201729110A (enExample)
WO (1) WO2017099959A1 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170371830A1 (en) * 2016-06-28 2017-12-28 Qualcomm Incorporated Accelerated i3c master stop
US9734099B1 (en) * 2017-04-27 2017-08-15 Micro Lambda Wireless, Inc. QSPI based methods of simultaneously controlling multiple SPI peripherals
US10459869B2 (en) * 2017-12-17 2019-10-29 Himax Technologies Limited Electronic apparatus and operation method thereof
CN110008155B (zh) * 2018-01-04 2023-02-28 奇景光电股份有限公司 电子装置及其操作方法
US11288215B2 (en) * 2020-08-28 2022-03-29 Juniper Networks, Inc. Mapped register access by microcontrollers
CN114138700B (zh) * 2021-12-03 2023-11-24 西安广和通无线软件有限公司 一种串口数据传输的流控方法、装置、设备及存储介质
TWI812194B (zh) * 2022-04-27 2023-08-11 凌通科技股份有限公司 序列周邊介面相容性擴展切換方法與使用其之嵌入式系統
CN114911743B (zh) * 2022-07-12 2022-10-25 杭州晶华微电子股份有限公司 Spi从机设备、spi主机设备和相关的通信方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3134819B2 (ja) 1997-06-04 2001-02-13 ソニー株式会社 データ処理装置
US5933025A (en) * 1997-01-15 1999-08-03 Xilinx, Inc. Low voltage interface circuit with a high voltage tolerance
US7171542B1 (en) * 2000-06-19 2007-01-30 Silicon Labs Cp, Inc. Reconfigurable interface for coupling functional input/output blocks to limited number of i/o pins
US20030028864A1 (en) 2001-01-29 2003-02-06 Matt Bowen System, method and article of manufacture for successive compilations using incomplete parameters
EP1237090A1 (en) * 2001-02-28 2002-09-04 Alcatel Serial peripheral interface master device, a serial peripheral interface slave device and a serial peripheral interface
US7299303B2 (en) 2002-01-16 2007-11-20 Microsoft Corporation System and method for pendant bus for serially chaining multiple portable pendant peripherals
JP4834294B2 (ja) 2004-01-07 2011-12-14 日立オートモティブシステムズ株式会社 データ通信装置及びそれを用いたコントローラ
US20050223141A1 (en) * 2004-03-31 2005-10-06 Pak-Lung Seto Data flow control in a data storage system
US20060143348A1 (en) 2004-12-29 2006-06-29 Wilson Matthew T System, method, and apparatus for extended serial peripheral interface
US7509445B2 (en) 2006-04-12 2009-03-24 National Instruments Corporation Adapting a plurality of measurement cartridges using cartridge controllers
JP4066383B2 (ja) 2006-07-06 2008-03-26 シチズンホールディングス株式会社 通信装置および通信制御方法、並びに当該通信装置を備えたプリンタ
TWI334547B (en) * 2007-06-07 2010-12-11 Via Tech Inc System and method for serial peripheral interface data transmission
US7755412B2 (en) 2008-04-01 2010-07-13 Kyocera Corporation Bi-directional level shifted interrupt control
CN102508812B (zh) * 2011-11-30 2013-09-04 上海大学 一种基于spi总线的双处理器通信方法
US8732366B2 (en) 2012-04-30 2014-05-20 Freescale Semiconductor, Inc. Method to configure serial communications and device thereof

Also Published As

Publication number Publication date
BR112018011598A2 (pt) 2018-11-27
EP3387542A1 (en) 2018-10-17
TW201729110A (zh) 2017-08-16
EP3387542B1 (en) 2019-12-25
AU2016369271A1 (en) 2018-05-24
US20170168978A1 (en) 2017-06-15
WO2017099959A1 (en) 2017-06-15
US10140243B2 (en) 2018-11-27
CN108369569A (zh) 2018-08-03
JP2018536942A (ja) 2018-12-13
CN108369569B (zh) 2021-04-27

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Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20180607

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination