KR20170007582A - Vacuum socket and semiconductor detecting device including the same - Google Patents

Abstract

The present invention provides a vacuum socket comprising: a lower housing having a recessed part and a first hole provided in the recessed part; a printed circuit board which is arranged in the recessed part and has a second hole connected to the first hole; a first semiconductor chip arranged on the printed circuit board; a cover provided in the recessed part to cover the printed circuit board and the first semiconductor chip; and a vacuum pad which is inserted to the first hole, thereby contacting with the second hole and being exposed to the outside of the lower side of the lower housing. The present invention can be applied to a testing device which can perform two separate processes, which are picking up and testing a semiconductor chip, together in one process.

Description

TECHNICAL FIELD [0001] The present invention relates to a vacuum socket and a semiconductor inspection apparatus including the vacuum socket,

The present invention relates to a vacuum socket, and more particularly, to a vacuum socket including a vacuum pad and a semiconductor inspection equipment including the vacuum socket.

Recently, various kinds of semiconductor devices have been researched and developed according to the development of information communication. The semiconductor device must be as reliable as its performance. In the test process, reliability evaluation of semiconductors is done through inspection equipments. The test section of the test equipment is provided with sockets for testing the electrical connection between the memory chip and the logic chip.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a vacuum socket which is applied to an inspection apparatus capable of performing a dual method of picking up and testing a semiconductor chip in a unified manner.

SUMMARY OF THE INVENTION The present invention provides a vacuum socket in which a logic chip and a memory chip are tested in a state in which a memory chip is fixed on a logic chip rather than a package on package.

The present invention provides a vacuum socket. The vacuum socket comprises a printed circuit board having a lower housing having a recessed recess and a first hole provided in the recess, and a second hole arranged in the recess and connected to the first hole, A cover provided on the concave portion so as to cover the printed circuit board and the first semiconductor chip, and a cover which is inserted into the first hole and contacts the second hole, As shown in FIG.

According to an example, conduits are provided on the upper surface of the printed circuit board, the conduits are recessed in the direction from the upper surface to the lower surface of the printed circuit board, and connected to the second hole to provide a passage do.

By way of example, the conduits are provided symmetrically about the second hole.

By way of example, in a plan view, the conduits include a first conduit and a second conduit extending from the second hole toward an edge of the printed circuit board, the first conduit and the second conduit extending The directions are perpendicular to each other.

According to one example, the printed circuit board further comprises pads provided along an edge, the channels being provided spaced apart from the pads.

According to an example, the vacuum pad has a third hole that provides a passage through which the second hole and air flow, and the vacuum pad contacts the second semiconductor chip to pick up the second semiconductor chip.

According to an embodiment of the present invention, a lower surface of the printed circuit board is provided with an insertion portion which is recessed toward a lower surface of the printed circuit board to insert a part of the vacuum pad, and the insertion portion is vertically overlapped with the second hole.

According to an example, the cover has a first hole and a fourth hole provided so as to be vertically overlapped with the second hole.

According to one example, the probe further includes a probe which is exposed to the outside through the concave portion of the lower housing.

According to an example, the printed circuit board further includes a sealing layer provided between the recess and the printed circuit board.

According to one example, the sealing layer includes a polyimide film and silicon films provided on upper and lower surfaces of the polyimide film, respectively.

According to one example, the apparatus further includes an upper housing which is in contact with the lower housing and is provided to cover the cover.

The present invention provides semiconductor inspection equipment. The semiconductor inspection apparatus includes a loading section for carrying the first semiconductor chips, a test section including a contact tool for picking up and testing the first semiconductor chips, and an unloading section for unloading the first semiconductor chips from the test section , The contact tool has a plurality of vacuum sockets, each of the vacuum sockets A printed circuit board comprising: a lower housing having a recessed recess and a lower hole provided in the recess; a printed circuit board disposed on the upper surface and having a through hole connected to the lower hole; And an upper housing having a semiconductor chip, a vacuum pad inserted in the lower hole and in contact with the printed circuit board, and an upper hole disposed on the lower housing and vertically overlapping with the lower hole, And a channel for providing the passage through which the air flowing through the through hole and the vacuum pad flows into the upper hole.

According to an example, the loading unit includes a first loading unit and a second loading unit that move the first semiconductor chips to the test unit.

According to one example, the contact tool includes a first contact tool adjacent to the first loading portion and a second contact tool adjacent to the second loading portion.

By way of example, the conduits extend toward the edge of the printed circuit board about the through hole.

According to an embodiment of the present invention, the vacuum socket can be vacuumed to pick up and test a logic chip without additional equipment.

According to the embodiment of the present invention, the test can be performed without packaging the logic chip and the memory chip in the form of a package on package. If the memory chip is defective, only the memory chip can be discarded without discarding the logic chip Thus reducing the cost of the process.

1 is a view showing a typical inspection apparatus for testing a first semiconductor chip.
2 is a cross-sectional view illustrating a vacuum socket according to an embodiment of the present invention.
3 is an exploded perspective view illustrating a vacuum socket according to an embodiment of the present invention.
4 is a perspective view illustrating a lower housing according to an embodiment of the present invention.
5A is a perspective view illustrating an upper portion of a printed circuit board according to an embodiment of the present invention.
5B is a perspective view illustrating a lower portion of a printed circuit board according to an embodiment of the present invention.
5C is a cross-sectional view taken along the line A-A 'in FIG. 5A.
6 is a perspective view showing an upper part of a printed circuit board according to another embodiment of the present invention.
7 is a perspective view showing a sealing layer according to an embodiment of the present invention.
8 is a perspective view illustrating a vacuum pad according to an embodiment of the present invention.
9 is a perspective view showing a lower portion of a cover according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and how to accomplish them, will become apparent by reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.

In addition, the embodiments described herein will be described with reference to cross-sectional views and / or plan views, which are ideal illustrations of the present invention. In the drawings, the thicknesses of the films and regions are exaggerated for an effective description of the technical content. Thus, the shape of the illustrations may be modified by manufacturing techniques and / or tolerances. Therefore, the embodiments of the present invention are not limited to the specific forms shown, but also include changes in the forms that are generated according to the manufacturing process. For example, the etched area shown at right angles may be rounded or may have a shape with a certain curvature. Thus, the regions illustrated in the figures have schematic attributes, and the shapes of the regions illustrated in the figures are intended to illustrate specific types of regions of the elements and are not intended to limit the scope of the invention.

1 is a view showing a typical inspection apparatus for testing a first semiconductor chip.

Referring to FIG. 1, the semiconductor inspection equipment 50 may include a loading unit 20, a test unit 30, and an unloading unit 40. The loading unit 20 may provide the first semiconductor chips C1 from the stacker 10 to the test unit. The first semiconductor chips C1 may be a logic chip, for example, a logic chip may be an application processor chip (AP). The stacker 10 loads a tray containing the first semiconductor chips C1. The stacker 10 may be disposed on one side of the front side of the semiconductor inspection equipment 50. The loading unit 20 may include an input module 12, a loading buffer 14, and a loading shuttle 25.

The input module 12 may pick up the first semiconductor chips C1 from the stacker 10. [ The input module 12 can transfer the first semiconductor chips C1 to the loading buffer 14. [

The loading buffer 14 aligns the first semiconductor chips C1 and applies heat at a constant temperature to the first semiconductor chips C1. The first semiconductor chips C1 in the loading buffer 14 may be provided to the loading shuttle 25 by robots (not shown).

The loading shuttle 25 may provide the first semiconductor chips C1 to the test section 30. [ According to one example, the loading shuttle 25 may include a first sub-loading shuttle 26 and a second sub-loading shuttle 28. The first subloading shuttle 26 and the second subloading shuttle 28 can each carry the first semiconductor chips C1 so that a single movement of the loading shuttle 25 will cause the 32 first semiconductor chips C1 ) Can be moved to the test section 30. [ The loading shuttle 25 can move the first semiconductor chips C1 to a test site 35 inside the test section 30 while keeping the first semiconductor chips C1 at a high temperature. The remaining tray is advanced to the empty space formed after being transported by the loading shuttle 25. The trays having exhausted devices are conveyed to a conveyance rail (not shown).

The test section 30 can electrically test the first semiconductor chips C1. The test section 30 may be disposed between the loading section 20 and the unloading section 40. The first semiconductor chips C1 can be moved to the test site 35 inside the test portion 30 through the loading shuttle 25. [ The contact tool 38 in the test section 30 can pick up the first semiconductor chips C1 and place them on the test site 35. [ The contact tool 38 may include a vacuum socket (1 in FIG. 2) capable of pulling up the first semiconductor chips C1. The vacuum socket (1 in FIG. 2) of the contact tool 38 picks up the first semiconductor chips C1 and moves them to the test site 35 while applying a test signal to the first semiconductor chips C1, The test between 1) of FIG. 2 and the first semiconductor chips C1 can be performed at the same time. In other words, the process of moving the first semiconductor chips C1 to the test site 35 and the process of applying the test signals to the first semiconductor chips C1 can be performed through a single device, which simplifies the process , The time of the process can be shortened.

The unloading unit 40 can unload the first semiconductor chips C1 from the test unit 30. [ The unloading portion 40 may include an unloading shuttle 45, an unloading buffer 34, and an output module 32.

The unloading shuttle 45 can transport the first semiconductor chips C1 from the testing section 30 to the unloading section 40. [ The first semiconductor chips C1 have been tested. The unloading shuttle 45 may include a first sub unloading shuttle 46 and a second sub unloading shuttle 48. The robot (not shown) can transfer the first semiconductor chips C1 on the unloading shuttle 45 to the unloading buffer 34. [

The unloading buffer 34 may temporarily store the first semiconductor chips C1. The output module 32 may provide the first semiconductor chips C1 to the stacker 10. The first semiconductor chips C1 may be classified into good and defective products according to the test results. The output module 32 can separate the first semiconductor chips C1 of the good product and the poor first semiconductor chips C1 and provide them to the stacker 10.

FIG. 2 is a cross-sectional view illustrating a vacuum socket according to one embodiment of the present invention, and FIG. 3 is an exploded perspective view illustrating a vacuum socket according to an embodiment of the present invention.

2 and 3, the vacuum socket 1 includes a lower housing 100, an upper housing 150, a printed circuit board 200, a vacuum pad 300, a probe 400, and a cover 500 .

The lower housing 100 may include a body 110 that contacts the upper housing 150 and a recess 130 that is recessed downwardly from the body 110. The concave portion 130 may be provided with a first lower hole 135. A base cover 180 may be provided on the lower surface of the lower housing 100.

The upper housing 150 may be provided on the body 110 so as to cover the cover 500. The upper housing 150 may have an upper hole 155 vertically overlapping the first lower hole 135. A sealing ring 600 may be provided on the upper housing 150. The sealing ring 600 may serve to prevent breakage due to contact between the contact tool (38 in FIG. 1) and the vacuum socket 1 when the contact tool (38 in FIG. 1) and the vacuum socket 1 are engaged have. The sealing ring 600 may be rubber.

The printed circuit board 200 may be disposed on the concave portion 130. The printed circuit board 200 may have a through hole 210 vertically overlapping the first lower hole 135 and the upper hole 155. A second semiconductor chip C2 may be disposed on the printed circuit board 200. [ The second semiconductor chip C2 may be a memory chip. The printed circuit board 200 and the second semiconductor chip C2 may be flip-chip bonded. The printed circuit board 200 can electrically connect the second semiconductor chip C2 and the probes 400. [

A sealing layer 250 may be disposed between the printed circuit board 200 and the recess 130. The sealing layer 250 may seal between the printed circuit board 200 and the concave portion 130 so that air flows through the through hole 210 and the first lower hole 135.

The vacuum pad 300 may be inserted into the material 1 lower hole 135 of the recess 130 to be brought into contact with the through hole 210 of the printed circuit board 200. The vacuum pad 300 may have a pad hole 350 and the side wall of the pad hole 350 may be coplanar with the side wall of the through hole 210. The vacuum pad 300 may contact the first semiconductor chip C1 to pick up the first semiconductor chip C1.

The probe 400 may be provided to penetrate the concave portion 130 of the lower housing 100 and the base cover 180. In plan view, the probe 400 may be provided along the edge of the recess 130 and the base cover 180. The probe 400 may be in the form of a ring having a plurality of pins or a plurality of pins electrically connecting the printed circuit board 200 and the second semiconductor chip C2 to each other. The probe 400 may provide a test signal applied to the second semiconductor chip C2 to the first semiconductor chip C1 through a tester (not shown). The electrical connection between the first semiconductor chip C1 and the second semiconductor chip C2 can be tested through the probe 400. [

The cover 500 may be disposed on the second semiconductor chip C2. The cover 500 may have a cover hole 510 perpendicularly intersecting the first lower hole 135, the upper hole 155, and the through hole 210. The side wall of the cover hole 510 may be coplanar with the side wall of the upper hole 155.

The pad hole 350, the first lower hole 135, the through hole 210, the cover hole 510, and the upper hole 155 may provide a passage through which air flows. The vacuum socket 1 according to the embodiment of the present invention can vacuum the path formed by the first lower hole 135, the through hole 210, the cover hole 510 and the upper hole 155, The pad 300 can pick up the first semiconductor chip C1. Therefore, a separate equipment for moving the first semiconductor chip C1 may not be required. Since the second semiconductor chip C2 is embedded in the vacuum socket 1, the electrical connection between the second semiconductor chip C2 and the first semiconductor chip C1 can be tested without any additional process .

The vacuum socket 1 can also test the first semiconductor chip C1 without packaging the first semiconductor chip C1 and the second semiconductor chip C2 in the form of a package on package If the first semiconductor chip C1 is defective, the second semiconductor chip C2 can be discarded and only the first semiconductor chip C1 can be discarded, so that the manufacturing cost can be reduced. For example, the first semiconductor chip C1 may be a logic chip, and the second semiconductor chip C1 may be a memory chip. At this time, if the logic chip is defective, the expensive memory chip may not be discarded. Further, the logic chip can be tested without packaging the memory chip on the logic chip, and only the logic chip can be used. The second semiconductor chip C2 disposed inside the vacuum socket 1 can be fixed to the vacuum socket 1 without being replaced for testing the first semiconductor chip C1.

4 is a perspective view illustrating a lower housing according to an embodiment of the present invention.

Referring to FIGS. 2 to 4, the lower housing 100 may include a body 110 and a recess 130. The concave portion 130 may be a recessed region in a downward direction in the body portion 110. The recess 130 may be recessed in a rounded shape. The corners of the recess 130 serve to prevent damage to the edges of the rectangular printed circuit board 200, the second semiconductor chip C2 and the cover 500 disposed in the recess 130 can do. The recess 130 may be provided with a first lower hole 135 and a second lower hole 138 that penetrate through the recess 130. The first lower hole 135 may be provided at the center of the concave portion 130 and the second lower holes 138 may be provided along the edge of the concave portion 130. The vacuum pad 300 may be inserted into the first lower hole 135 to be in contact with the through hole 210 of the printed circuit board 200 disposed in the recess 130. The probe 400 may be inserted into the second lower hole 138 and contact the lower surface of the printed circuit board 200 disposed in the recess 130.

FIG. 5A is a perspective view illustrating an upper portion of a printed circuit board according to an embodiment of the present invention, FIG. 5B is a perspective view showing a lower portion of a printed circuit board according to an embodiment of the present invention, FIG. 5C is a cross- A 'in Fig.

Referring to FIGS. 2, 3 and 5A, the printed circuit board 200 may be provided with a through hole 210, a channel 220 and an upper pad 230a. The through hole 210 may penetrate the printed circuit board 200. The through hole 210 may contact the vacuum pad 300. The conduit 220 may be provided on the printed circuit board 200. The channel 220 may be recessed from the upper surface of the PCB 200 toward the lower surface and may extend from the through hole 210 toward the edge of the printed circuit board 200. The conduit 220 may include a first conduit 220a and a second conduit 220b. The first conduit 220a and the second conduit 220 may be provided symmetrically with respect to the through hole 210 in all directions and the first conduit 220a and the second conduit 220b may extend in a direction They can be perpendicular to each other. The first conduit 220a and the second conduit 220b may be provided in plurality, respectively. The conduit 220 may provide a passage through which the air delivered through the through-hole 210 flows. The upper pad 230a may be provided along the edge of the upper surface of the printed circuit board 200 in plurality. The upper pad 230a may be electrically connected to the second semiconductor chip C2.

Referring to FIGS. 2, 3 and 5B, an inserting portion 215 and a lower pad 230b may be provided on the lower surface of the printed circuit board 200. The insertion portion 215 may provide a space into which a part of the vacuum pad 300 is inserted. The insertion portion 215 may be vertically overlapped with the through hole 210 and the insertion portion 215 may have a wider diameter than the through hole 210. [ The lower pad 230b may be provided along the edge of the lower surface of the printed circuit board 200. The lower pad 230b may be in physical contact with the probe 400 and electrically connected to each other.

Referring to FIGS. 2, 3, 5A and 5C, two first channels 220a may be provided on the printed circuit board 200. FIG. The first conduits 220a may be recessed in the direction from the upper surface to the lower surface of the printed circuit board 200. [ For example, the first conduits 220a may have a step height h of 0.1 mm to 0.2 mm, and may have a width d of 0.05 mm to 0.12 mm. The step height h and the width d of the first conduits 220a may not be limited to a specific value and the second conduits 220b may have the same step height as the first conduits 220a h) and a width (d). The first conduits 220a may be provided apart from each other. Upper pads 230a and lower pads 230b may be provided on the upper and lower surfaces of the printed circuit board 200, respectively. The upper pad 230a and the lower pad 230b may be vertically overlapped.

6 is a perspective view showing an upper part of a printed circuit board according to another embodiment of the present invention.

Referring to FIGS. 2, 3 and 6, the first conduits 220a and the second conduits 220b may extend toward the edge of the printed circuit board 200 in the through hole 210. In FIG. The direction in which the first conduits 220a and the second conduits 220b extend may not be perpendicular.

Unlike the above-described example, the number and arrangement of the first conduits 220a and the second conduits 220b may not be limited.

7 is a perspective view showing a sealing layer according to an embodiment of the present invention.

2, 3 and 7, the sealing layer 250 may include a polyimide film 250a and silicon films 250b and 250c provided on upper and lower surfaces of the polyimide film 250a . The sealing layer 250 may seal the space between the printed circuit board 200 and the lower housing 100 and may be formed in the sealing layer 250 in correspondence with the printed circuit board 200 and the lower housing 100, A second film hole 255 and a second film hole 258 may be provided. A vacuum pad 300 may be inserted into the first film hole 255 and a probe 400 may be inserted into the second film hole 258. The sealing layer 250 is provided between the concave portion 130 and the printed circuit board 200 so that air flowing out from the vacuum pad 300 can not be leaked out of the through hole 210.

8 is a perspective view illustrating a vacuum pad according to an embodiment of the present invention.

Referring to FIGS. 2, 3 and 8, the vacuum pad 300 may be inserted into the first lower hole 135 of the recess 130. The vacuum pad 300 may include a first region 310 located at the top, a second region 320 located at the center, and a third region 330 located at the bottom. The first region 310 may contact the insertion portion 215 of the printed circuit board 200. The second region 320 may connect the first region 310 and the third region 330. The second region 320 may have a cylindrical shape. The third region 330 can contact and pick up the first semiconductor chip C1. The third region 330 may be larger in diameter than the first region 310 and the second region 320 to pick up the first semiconductor chip C1. The vacuum pad 300 may be provided with a pad hole 350 used as a passage through which the air moves. Air may be discharged through the pad hole 350 and the inside of the pad hole 350 may be in a vacuum state. When the pad hole 350 is in a vacuum state, the vacuum pad 300 can pick up the first semiconductor chip C1. The vacuum pad 300 may be a flexible material, for example, a rubber material.

9 is a perspective view showing a lower portion of a cover according to an embodiment of the present invention.

Referring to FIGS. 2, 3 and 9, the cover 500 may be provided with a cover hole 510 and a cover pad 530. The cover hole 510 may be vertically overlapped with the upper hole 155, the through hole 210, and the pad hole 350. The cover hole 510 may have an inner wall that is coplanar with the upper hole 155. The cover pad 530 can prevent defects caused by direct contact between the cover 500 and the second semiconductor chip C2 by contacting the upper surface of the second semiconductor chip C2. In addition, the cover pad 530 may create a space between the second semiconductor chip C2 and the cover 500 to provide a passage through which the air can move. The air that flows out between the printed circuit board 200 and the second semiconductor chip C2 flows into the space between the second semiconductor chip C2 and the cover 500 and moves to the cover hole 510. [

Claims (10)

A lower housing having a recessed recess and a first hole provided in the recess;
A printed circuit board disposed in the concave portion and having a second hole connected to the first hole;
A first semiconductor chip disposed on the printed circuit board;
A cover provided on the recess to cover the printed circuit board and the first semiconductor chip; And
And a vacuum pad inserted into the first hole to be in contact with the second hole and exposed to the outside of the lower surface of the lower housing. The method according to claim 1,
Pipes are provided on the upper surface of the printed circuit board,
Wherein the conduits are recessed in a direction toward a lower surface from an upper surface of the printed circuit board and connected to the second holes to provide a passage through which air flows. 3. The method of claim 2,
In a plan view, the conduits include a first conduit and a second conduit extending from the second hole toward an edge of the printed circuit board, wherein the first conduit and the second conduit extend perpendicularly to each other Vacuum socket. 3. The method of claim 2,
Wherein the printed circuit board further comprises pads provided along an edge,
Wherein the conduits are provided spaced apart from the pads. The method according to claim 1,
Wherein the vacuum pad has a second hole and a third hole for providing a passage through which air flows,
Wherein the vacuum pad contacts the second semiconductor chip to pick up the second semiconductor chip. The method according to claim 1,
Wherein a lower surface of the printed circuit board is provided with an insertion portion which is recessed toward a lower surface of the printed circuit board to insert a part of the vacuum pad,
And the inserting portion is vertically overlapped with the second hole. The method according to claim 1,
And a probe penetrating through the concave portion of the lower housing to be exposed to the outside. A loading section for carrying the first semiconductor chips;
A test unit including a contact tool for picking up and testing the first semiconductor chips; And
And an unloading unit for unloading the first semiconductor chips from the test unit,
The contact tool having a plurality of vacuum sockets,
Each of the vacuum sockets comprising:
A lower housing having a recessed recess and a lower hole provided in the recess;
A printed circuit board disposed on the upper surface and having a through hole connected to the lower hole;
A second semiconductor chip disposed on the printed circuit board;
A vacuum pad inserted in the lower hole and in contact with the printed circuit board; And
And an upper housing disposed on the lower housing and having an upper hole vertically overlapping the lower hole,
Wherein the printed circuit board has channels that provide a passage through which the air flowing through the through hole and the vacuum pad flows into the upper hole. 9. The method of claim 8,
Wherein the loading section includes a first loading section and a second loading section for moving the first semiconductor chips to the test section. 9. The method of claim 8,
The contact tool comprising:
A first contact tool adjacent to the first loading portion; And
And a second contact tool adjacent to the second loading portion.

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