KR20160080042A - Organic light emitting display device and method of manufacturing the same - Google Patents

Abstract

The present invention relates to an organic light emitting display device which can reduce resistance of a second electrode and prevent corrosion of a pad electrode and a metal transition phenomenon while a separate mask process is not added or mask processes are reduced, and a manufacturing method thereof. According to the present invention, in the organic light emitting display device, an auxiliary line is connected to the second electrode through an auxiliary electrode installed in the same layer as a first electrode and a pad cover electrode covers an upper surface and a side surface of a pad connection electrode not to expose the pad connection electrode connected to a pad to the outside.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic light emitting diode (OLED) display device,

The present invention relates to an organic light emitting display and a method of manufacturing the same, and more particularly, to an organic light emitting diode display and a method of manufacturing the same, which can reduce the resistance of the second electrode and prevent corrosion and metal transition of the pad electrode, To an organic light emitting display and a method of manufacturing the same.

The organic light emitting diode (OLED) is a self-luminous device having low power consumption, a high response speed, a high luminous efficiency, a high luminance and a wide viewing angle, and has been attracting attention as a next generation flat panel display.

The organic light emitting diode (OLED) is divided into a top emission type and a bottom emission type according to a transmission direction of light emitted through the organic light emitting diode. Since the lower light emitting method has a problem of lowering the aperture ratio, the upper light emitting method is mainly used.

1 is a schematic cross-sectional view of a conventional top emission type OLED display.

A conventional top emission type OLED display includes a substrate 10, a thin film transistor T, a passivation layer 20, a planarization layer 30, a first electrode 40, an auxiliary electrode 50, a bank 60, , An organic light emitting layer (70), and a second electrode (80).

Though not shown in the figure, a gate line and a data line intersect each other to define a pixel region on the substrate 10, and a thin film transistor (T) is provided in each pixel region.

The passivation layer 20 covers the thin film transistor T and is provided on the front surface of the substrate 10 and the planarization layer 30 covers the entire surface of the passivation layer 20.

The first electrode 40 is provided on the planarization layer 30 and is electrically connected to the TFT. In this case, the first electrode 40 may include a material having a high reflectance, for example, a silver alloy layer.

The auxiliary electrode (50) is provided in the same layer as the first electrode (40). The auxiliary electrode 50 is connected to the second electrode 80 to lower the resistance of the second electrode 80.

The banks 60 are provided at the boundaries of the respective pixel regions. The bank 60 is provided between the first electrode 40 and the auxiliary electrode 50 to insulate the first electrode 40 and the auxiliary electrode 50 from each other. The organic light emitting layer 70 is provided on the first electrode 40.

The second electrode 80 is provided on the front surface of the substrate 10 and is connected to the auxiliary electrode 50. The second electrode 80 may be made of a metallic material that is thinly formed to a thickness of several hundreds of angstroms (A) or less.

In such a conventional top emission type OLED display device, since the thickness of the second electrode 80 is thin, the resistance can be relatively increased. The second electrode 80 and the auxiliary electrode 50 may be connected to each other to reduce the resistance of the second electrode 80. However, Since the auxiliary electrode 50 must be provided, there is a space restriction to increase the size of the auxiliary electrode 50. Accordingly, there is a limit to lowering the resistance of the second electrode 80.

When the source electrode 14 and the drain electrode 15 of the thin film transistor T are provided in the pixel region on the substrate 10, An electrode may be provided. However, the pad electrode is vulnerable to corrosion, and as the process proceeds, corrosion and metal migration may occur in the pad region. In order to prevent corrosion and metal transition of the pad region, a separate process for only the pad region may be added. However, in this case, the productivity of the display device due to the process addition may be reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and it is an object of the present invention to provide an organic electroluminescent device capable of reducing the resistance of the second electrode and preventing corrosion and metal transition of the pad electrode, A display device and a method of manufacturing the same are provided.

In order to achieve the above object, in the organic light emitting display according to the present invention, the auxiliary wiring is connected to the second electrode through the auxiliary electrode provided on the same layer as the first electrode, and the pad connecting electrode connected to the pad is exposed So that the pad cover electrode covers the upper surface and the side surface of the pad connecting electrode. Further, in the organic light emitting display according to the present invention, the bank is disposed along the rim of the first electrode.

According to embodiments of the present invention, the auxiliary wiring connected to the auxiliary electrode is provided under the auxiliary electrode, and the auxiliary wiring is connected to the second electrode through the auxiliary electrode, so that the resistance of the second electrode is reduced .

In addition, according to embodiments of the present invention, since the pad connecting electrode is provided on the pad, and the pad cover electrode is provided to cover the upper surface and the side surface of the pad connecting electrode, And the metal transition due to this can be prevented. Further, reliability and productivity of the organic light emitting display can be improved without adding a separate mask process.

In addition, in the present invention, the bank and the first electrode can be formed through the same mask process, and since the pad protection pattern and the protective film can be formed through the same mask process, the productivity can be improved and the cost can be reduced .

1 is a schematic cross-sectional view of a conventional top emission type OLED display.
2 is a cross-sectional view of an OLED display according to a first embodiment of the present invention.
3A to 3C are cross-sectional views illustrating a method of manufacturing an organic light emitting display according to a first embodiment of the present invention.
4 is a cross-sectional view of an OLED display according to a second embodiment of the present invention.
5A to 5G are cross-sectional views illustrating a method of manufacturing an organic light emitting diode display according to a second embodiment of the present invention.
6 is a cross-sectional view of an OLED display according to a third embodiment of the present invention.
7A to 7D are cross-sectional views illustrating a method of manufacturing an OLED display according to a third embodiment of the present invention.
8 is a cross-sectional view of an OLED display according to a fourth embodiment of the present invention.
9 is a plan view specifically showing the bank shown in Fig.
10A to 10F are cross-sectional views illustrating a method of manufacturing an OLED display according to a fourth embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited thereto. Like reference numerals refer to like elements throughout the specification. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. In the case where the word 'includes', 'having', 'done', etc. are used in this specification, other parts can be added unless '~ only' is used. Unless the context clearly dictates otherwise, including the plural unless the context clearly dictates otherwise.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description.

In the case of a description of the positional relationship, for example, if the positional relationship between two parts is described as 'on', 'on top', 'under', and 'next to' Or " direct " is not used, one or more other portions may be located between the two portions.

In the case of a description of a temporal relationship, for example, if the temporal relationship is described by 'after', 'after', 'after', 'before', etc., May not be continuous unless they are not used.

The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other, partially or wholly, technically various interlocking and driving, and that the embodiments may be practiced independently of each other, It is possible.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a cross-sectional view of an OLED display according to a first embodiment of the present invention.

As shown in FIG. 2, the OLED display according to the first embodiment of the present invention includes a pixel region AA and a pad region PA.

A passivation layer 135, a planarization layer 145, a connection wiring 161, an auxiliary wiring 165, a passivation layer 150, a first passivation layer 150, and a second passivation layer 150 are formed in the pixel region AA on the substrate 100. [ An auxiliary electrode 175, a bank 180, an organic light emitting layer 173, and a second electrode 172 are provided.

The thin film transistor T includes an active layer 130, a gate insulating layer 120, a gate electrode 110, an interlayer insulating layer 125, a source electrode 141, and a drain electrode 142.

The active layer 130 is provided on the substrate 100 so as to overlap with the gate electrode 110. The active layer 130 includes one end region 131 located on the source electrode 141 side, another end region 132 located on the drain electrode 142 side, and the one end region 131 and the other end region 133, As shown in FIG. The first region 131 and the second region 132 may be formed of a semiconductor material doped with a dopant.

The gate insulating layer 120 is formed on the active layer 130. The gate insulating layer 120 functions to insulate the active layer 130 from the gate electrode 110. The gate insulating layer 120 covers the active layer 130 and is formed on the entire surface of the pixel region AA. The gate insulating layer 120 may be formed of an inorganic insulating material such as a silicon oxide layer (SiO _x ), a silicon nitride layer (SiN _x ), or a multilayer thereof, but is not limited thereto.

The gate electrode 110 is provided on the gate insulating layer 120. The gate electrode 110 is formed to overlap the central region 133 of the active layer 130 with the gate insulating layer 120 interposed therebetween. The gate electrode 110 may be formed of one of Mo, Al, Cr, Au, Ti, Ni, Ne, But may be a single layer or a multilayer of these alloys, but is not limited thereto.

The interlayer insulating layer 125 is formed on the gate electrode 110. The interlayer insulating layer 125 is formed on the entire surface of the pixel region AA including the gate electrode 110. The interlayer insulating layer 125 may be formed of the same inorganic insulating material as the gate insulating layer 120, for example, a silicon oxide layer (SiO _x ), a silicon nitride layer (SiN _x ), or a multilayer thereof. However, it is not limited thereto.

The source electrode 141 and the drain electrode 142 are provided on the interlayer insulating layer 125 so as to be spaced apart from each other. The first contact hole CH1 exposing a part of the one end region 131 of the active layer 130 is provided in the gate insulating film 120 and the interlayer insulating film 125. The other end of the active layer 130 And a second contact hole (CH2) exposing a part of the region (132). The source electrode 141 is connected to the one end region 131 of the active layer 130 through the first contact hole CH1 and the drain electrode 142 is connected to the second contact hole CH2 To the other end region 132 of the active layer 130.

The source electrode 141 and the drain electrode 142 may be formed of a metal such as Mo, Al, Cr, Au, Ti, Ni, Nd ) And copper (Cu), or an alloy thereof. However, the present invention is not limited thereto.

The thin film transistor T configured as described above may be formed on each of the pixel regions AA on the substrate 100. The structure of the thin film transistor T is not limited to the example described above, and can be variously modified to a known structure that can be easily practiced by those skilled in the art.

The passivation layer 135 is provided on the thin film transistor T. The passivation layer 135 is formed on the entire surface of the pixel region AA including the source electrode 141 and the drain electrode 142. The passivation layer 135 functions to protect the TFT. The passivation layer 135 may be formed of an inorganic insulating material such as a silicon oxide film (SiO _x ) or a silicon nitride film (SiN _x ), but is not limited thereto.

The planarization layer 145 is provided on the passivation layer 135. The planarization layer 145 functions to flatten the upper surface of the substrate 100 on which the thin film transistor T is formed. The planarization layer 145 may be formed of, for example, an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, or the like But is not limited thereto.

The third contact hole CH3 exposing the drain electrode 142 is formed in the passivation layer 135 and the planarization layer 145 described above. The drain electrode 142 and the connection wiring 161 are connected through the third contact hole CH3.

The connection wiring 161 is provided on the planarization layer 145. The connection wiring 161 connects the drain electrode 142 and the first electrode 171. The connection wiring 161 may be formed of a metal such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) Or an alloy thereof. However, the present invention is not limited thereto.

The auxiliary wiring 165 is provided in the same layer as the connection wiring 161. The auxiliary wiring 165 is spaced apart from the connection wiring 161. The auxiliary wiring 165 may be formed at the same time through the same process as the connection wiring 161 and may be made of the same material. The auxiliary wiring 165 is connected to the auxiliary electrode 175.

The passivation layer 150 covers the connection wiring 161 and the auxiliary wiring 165. The protection layer 150 is provided with a fourth contact hole CH4 for exposing a part of the connection wiring 161 and a fifth contact hole CH5 for exposing a part of the auxiliary wiring 165. [ The protective layer 150 may be formed of, for example, an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, or the like But is not limited thereto.

The first electrode 171 is provided on the protection layer 150. The first electrode 171 is provided in a pixel region AA on the substrate 100 and is electrically connected to the thin film transistor T. [ The first electrode 171 is connected to the connection wiring 161 exposed through the fourth contact hole CH4. Since the connection wiring 161 is connected to the drain electrode 142, the first electrode 171 is connected to the drain electrode 142 through the connection wiring 161.

The first electrode 171 functions as an anode or a cathode according to the type of the thin film transistor T. In the case of the present invention, the first electrode 171 performs an anode function of the organic light emitting diode. The first electrode 171 may include a transparent conductive material having a relatively large work function value, for example, indium-tin- Oxide (IZO). The first electrode 171 may be formed of at least two layers including a metal material having excellent reflection efficiency, for example, aluminum (Al), silver (Ag), Ag (Pb) have.

The auxiliary electrode 175 is provided on the same layer as the first electrode 171. The auxiliary electrode 175 and the first electrode 171 are spaced apart from each other. The auxiliary electrode 175 is formed at the same time through the same process as the first electrode 171 and may be formed of the same material.

The auxiliary electrode 175 is connected to the auxiliary wiring 165 exposed through the fifth contact hole CH5. The auxiliary electrode 175 is provided to be in contact with the second electrode 172 to lower the resistance of the second electrode 172, as described later. The second electrode 172 is provided so as to be in contact with the auxiliary wiring 165 described above in order to lower the resistance of the second electrode 172.

The bank 180 is disposed between the first electrode 171 and the auxiliary electrode 175 and insulates the first electrode 171 and the auxiliary electrode 175 from each other. The bank 180 may be formed of, for example, a transparent organic film such as a polyimide resin, an acryl resin, a benzocyclobutene (BCB) or the like, or a black organic film, but is not limited thereto .

The organic light emitting layer 173 is provided on the first electrode 171. The organic light emitting layer 173 may have a structure of a hole transporting layer / a light emitting layer / an electron transporting layer or a structure of a hole injecting layer / a hole transporting layer / a light emitting layer / an electron transporting layer / an electron injecting layer. Further, the organic light emitting layer 173 may further include at least one functional layer for improving light emitting efficiency and / or lifetime of the light emitting layer.

The second electrode 172 is provided to cover the organic light emitting layer 173 and the upper portion of the bank 180. The second electrode 172 extends to cover the bank 180 and is connected to the auxiliary electrode 175.

When the first electrode 171 serves as an anode electrode, the second electrode 172 serves as a cathode electrode. As the second electrode 172, a very thin and low work function metallic material may be used. For example, the second electrode 172 may be formed of a metallic material such as silver (Ag), titanium (Ti), aluminum (Al), molybdenum (Mo), or an alloy of silver (Ag) Can be used. In addition, the above-described metallic materials may be formed to a thickness of several hundreds of angstroms (A) or less, for example, 200 angstroms or less and used as the second electrode 172. In this case, the second electrode 172 becomes a semi-transparent layer and can be used as a substantially transparent cathode.

When the second electrode 172 is used as a transparent cathode, the resistance can be relatively increased since the thickness becomes thinner. The second electrode 172 and the auxiliary electrode 175 are connected to each other to lower the resistance of the second electrode 172. However, since the auxiliary electrode 175 is provided in the same layer as the first electrode 171, space for providing the auxiliary electrode 175 is limited. That is, as the area of the auxiliary electrode 175 contacting the second electrode 172 is increased, the resistance of the second electrode 172 may be further reduced. However, since the auxiliary electrode 175 can be disposed only in a region where the first electrode 171 is not provided, there is a limitation in increasing the size of the auxiliary electrode 175, There is a limit in lowering the resistance of the capacitor.

In the first embodiment of the present invention, an auxiliary wiring 165 connected to the auxiliary electrode 175 is provided under the auxiliary electrode 175 to solve the problem. Since the second electrode 172 is connected to the auxiliary electrode 175 and the auxiliary wiring 165, the second electrode 172 and the auxiliary electrode 175 are connected to each other, The resistance of the electrode 172 can be further reduced.

Although not shown in the drawing, a sealing portion may be additionally provided on the second electrode 172. The sealing part protects the organic light emitting element and the driving transistor (T) from external impact and prevents moisture from penetrating.

A gate insulating layer 120, an interlayer insulating layer 125, a pad 240, and a passivation layer 135 are formed on the pad region PA on the substrate 100.

The gate insulating layer 120 extends from the pixel region AA and is provided on the entire surface of the pad region PA.

The interlayer insulating layer 125 is disposed on the gate insulating layer 120 and extends from the pixel region AA to the entire surface of the pad region PA.

The pad 240 is located in the pad region PA and is provided on the interlayer insulating layer 125. The pad 240 may be formed at the same time through the same process as the source electrode 141 and the drain electrode 142, and may be formed of the same material.

The passivation layer 135 extends from the pixel region AA and covers the entire surface of the pad region PA. However, the passivation layer 135 is provided with a pad contact hole (CHp) exposing a part of the pad 240. A part of the top surface of the pad 240 may be exposed to the outside through the pad contact hole CHp.

In this case, the pad 240 may be corroded by the etching solution used in the photomask process for forming the first electrode 171. In addition, when the pad connecting electrode 261 is exposed to the outside atmosphere, the pad 240 can be easily oxidized by being exposed to moisture in the air. Accordingly, corrosion and metal migration may occur in the pad region PA of the OLED display.

In order to prevent corrosion and metal transition of the pad region PA as described above, the pad contact hole CHp may be formed by adding a separate process after forming the first electrode 171, clad may be used to seal the pad connecting electrode 261. However, in this case, a photomask process may be added and the productivity may be reduced. Accordingly, in the second to fourth embodiments of the present invention, an organic light emitting display capable of preventing corrosion of the pad area PA without adding a photomask is described.

Hereinafter, the manufacturing method according to the first embodiment of the present invention will be described first to compare the number of masks, and then, the second to fourth embodiments of the present invention and the manufacturing method thereof will be described in detail.

FIGS. 3A to 3C are cross-sectional views illustrating a method of manufacturing an organic light emitting diode display according to a first embodiment of the present invention. Referring to FIG. Therefore, the same reference numerals are assigned to the same components, and repetitive descriptions of the repetitive portions in the materials, structures, etc. of the respective components are omitted.

3A, a thin film transistor T is formed on a pixel region AA on the substrate 100, and a pad 240 is formed on a pad region PA on the substrate 100. Referring to FIG. The pad 240 is formed simultaneously with the source electrode 141 and the drain electrode 142 of the thin film transistor T through the same process. For convenience of explanation, the process of forming the pad 240, the source electrode 141, and the drain electrode 142 is referred to as a first mask process.

3B, a passivation layer 135 is formed on the entire surface of the pad region PA including the pixel region AA including the thin film transistor T and the pad 240. As shown in FIG. The passivation layer 135 is formed to have a third contact hole CH3 exposing the drain electrode 142 of the TFT. Here, the entire surface of the pad region PA is covered with the passivation layer 135. The process of forming the passivation layer 135 to include the third contact hole CH3 is referred to as a second mask process.

Next, a planarization layer 145 is formed on the passivation layer 135 located in the pixel region AA. In this case, the planarization layer 145 is not formed in the pad region PA. The planarization layer 145 is formed to have a third contact hole CH3 exposing the drain electrode 142 of the TFT. The step of forming the planarization layer 145 in the pixel region PA with the third contact hole CH3 is referred to as a third mask process.

Next, a connection wiring 161 connected to the thin film transistor T and an auxiliary wiring 165 spaced apart from the connection wiring 161 are formed on the planarization layer 145. The process of forming the connection wiring 161 and the auxiliary wiring 165 is referred to as a fourth mask process.

Next, as shown in FIG. 3C, a passivation layer 150 is formed in the pixel region AA. In this case, the protective layer 150 is not formed in the pad region PA. The passivation layer 150 is formed to have a fourth contact hole CH4 exposing the connection wiring 161 and a fifth contact hole CH5 exposing the auxiliary wiring 165. [ The process of forming the protective layer 150 to include the fourth contact hole CH4 and the fifth contact hole CH5 is referred to as a fifth mask process.

Next, a first electrode 171 connected to the connection wiring 161 and an auxiliary electrode 175 connected to the auxiliary wiring 165 are formed on the passivation layer 150. The first electrode 171 and the auxiliary electrode 175 are spaced apart from each other. The process of forming the first electrode 171 and the auxiliary electrode 175 is referred to as a sixth mask process.

In order to form the first electrode 171 and the auxiliary electrode 175, a metal material such as ITO / Ag alloy / ITO is etched with an etching solution. Here, when the pad 240 is exposed to the outside, the pad 240 may be corroded by the etching solution.

However, as in the first embodiment of the present invention, when the passivation layer 135 covers the entire surface of the pad 240, the passivation layer 135 protects the pad 240 from the etching solution , The pad 240 is not corroded. However, in this case, a separate mask process for forming a pad contact hole CHp for exposing a part of the upper surface of the pad, that is, a seventh mask process is added as described later.

Next, as described above, a pad contact hole (CHp) exposing a part of the upper surface of the pad 240 is formed in the passivation layer 135 having the pad region PA. The process of forming such a pad contact hole CHp is referred to as a seventh mask process.

Next, a bank 180 for separating the first electrode 171 and the auxiliary electrode 175 is formed. The process of forming the bank 180 is referred to as an eighth mask process.

Finally, an organic light emitting layer 173 is formed on the first electrode 171 and a second electrode 172 is formed on the organic light emitting layer 173. In this case, the second electrode 172 extends along the bank 180 and is connected to the auxiliary electrode 175.

As described above, in the first embodiment of the present invention, a total of eight photomasks are used from the step of forming the source electrode 141 and the drain electrode 172 to the step of forming the bank 180.

4 is a cross-sectional view of an OLED display according to a second embodiment of the present invention. The organic light emitting display according to the second embodiment of the present invention includes the connection cover wiring 192 on the connection wiring 161 and the auxiliary cover wiring 190 on the auxiliary wiring 165, Except that a pad connecting electrode 261 and a pad cover electrode 290 are provided on the pad 240. Therefore, the same reference numerals are assigned to the same components, and repetitive descriptions of the repetitive portions in the materials, structures, etc. of the respective components are omitted.

A passivation layer 135, a planarization layer 145, a connection wiring 161, and a connection cover wiring 192 are formed in the pixel region AA on the substrate 100 according to the second embodiment of the present invention. The auxiliary wiring 175, the auxiliary cover wiring 190, the protective layer 150, the first electrode 171, the auxiliary electrode 175, the bank 180, the organic light emitting layer 173, and the second electrode 172, Respectively.

The connection cover wiring 192 is provided on the connection wiring 161. The connection cover wirings 192 are provided so as to cover the upper surface and side surfaces of the connection wirings 161. In this case, the oxidation degree of the connection cover wiring 192 may be lower than that of the connection wiring 161, so that the upper surface of the connection wiring 161 is not easily corroded. The connection cover wiring 192 may comprise, for example, indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).

The auxiliary cover wiring 190 is provided in the same layer as the connection cover wiring 192. The auxiliary cover wiring 190 and the connection cover wiring 192 are spaced apart from each other. The auxiliary cover wiring 190 is provided on the auxiliary wiring 165 and covers the upper surface and the side surface of the auxiliary wiring 165.

The auxiliary cover wiring 190 may be formed at the same time through the same process as the connection cover wiring 192 and may be made of the same material. Accordingly, the oxidation degree of the auxiliary cover wiring 190 may be lower than that of the auxiliary wiring 165, so that the upper surface of the auxiliary wiring 165 is not easily corroded.

A gate insulating layer 120, an interlayer insulating layer 125, a pad 240, a passivation layer 135, a pad connecting electrode 261, and a pad cover electrode 290 are formed on the pad region PA on the substrate 100 .

The pad 240 is located in the pad region PA and is provided on the interlayer insulating layer 125.

The passivation layer 135 extends from the pixel region AA and covers the entire surface of the pad region PA. However, the passivation layer 135 is provided with a pad contact hole (CHp) exposing a part of the pad 240.

The pad connection electrode 261 is provided on the passivation layer 135 to overlap the pad 240. The pad connection electrode 261 is connected to the pad 240 through the pad contact hole CHp. The pad connection electrode 261 may be formed at the same time through the same process as the connection wiring 161 and the auxiliary wiring 165, and may be formed of the same material.

The pad cover electrode 290 is provided on the pad connection electrode 261. The pad cover electrode 290 covers the side surface and the upper surface of the pad connection electrode 261 so that the pad connection electrode 261 is not exposed to the outside. The pad cover electrode 290 covers a part of the passivation layer 135 in contact with the pad connection electrode 261. Accordingly, the side surface and the top surface of the pad connection electrode 261 can be completely sealed by the pad cover electrode 290. The pad cover electrode 290 may be formed at the same time through the same process as the auxiliary cover wiring 190, and may be made of the same material.

According to the second embodiment of the present invention, since the pad cover electrode 290 is provided to cover the pad 240 on the pad 240, the pad cover electrode 290 is formed by the etching solution used in the photomask process It is possible to prevent corrosion and metal migration of the pad region PA. Thus, the reliability of the organic light emitting display device can be improved.

5A to 5G are cross-sectional views illustrating a method of manufacturing an organic light emitting diode display according to a second embodiment of the present invention. Therefore, the same reference numerals are assigned to the same components, and repetitive descriptions of the repetitive portions in the materials, structures, etc. of the respective components are omitted.

5A, the source and drain electrodes 141 and 142 of the thin film transistor T are formed in the pixel region AA on the substrate 100 using the first mask process, and the substrate 100 The pads 240 are simultaneously formed in the pad area PA on the pad area PA.

Next, a passivation layer 135 is formed on the entire surface of the pad region PA including the pixel region AA including the thin film transistor T and the pad 240 using a second mask process. A third contact hole CH3 exposing the drain electrode 142 of the thin film transistor T and a pad contact hole CHp exposing the pad 240 are formed in the passivation layer 135 .

Next, as shown in FIG. 5B, a planarization layer 145 is formed on the passivation layer 135 located in the pixel region PA using the photoresist pattern PR formed through the third mask process. The third contact hole CH3 is formed to penetrate the planarization layer 145 located in the pixel region AA except for the pad region PA to expose the drain electrode 142. [

5A and 5B, the pad contact hole CHp is formed in the second mask process, and the planarization layer 145 is formed in the third mask process. However, as shown in FIGS. 5C and 5D, The planarization layer 145 may be formed in the second mask process and the pad contact hole CHp may be formed in the third mask process.

5C, a passivation layer 135 is formed on the entire surface of the substrate 100 so as to cover the source and drain electrodes 141 and 142 and the pad 240 formed through the first mask process.

Next, a planarization layer 145 is formed on the passivation layer 135 located in the pixel area PA using a second mask process. The third contact hole CH3 exposing the drain electrode 142 is formed in the planarization layer 145 located in the pixel region AA excluding the pad region PA.

Next, as shown in FIG. 5D, the passivation layer 135 is patterned using the photoresist pattern PR formed through the third mask process. The passivation layer is provided with a pad contact hole CHp for exposing the pad 240 and a third contact hole CH3 is formed through the passivation layer 135 to expose the drain electrode 142. [

In the meantime, although the passivation layer 135, the planarization layer 145, the third contact hole CH3, and the pad contact hole CHp are formed through the mask process two times, it is also possible to use a halftone mask or a slit Or may be formed through one mask process using a mask.

Next, as shown in FIG. 5E, a connection wiring 161, an auxiliary wiring 165, and a pad connection electrode 261 are formed through a fourth mask process. In this case, the pad connecting electrode 261 is connected to the pad 240 through the pad contact hole CHp.

Next, a connection cover wiring 192 is formed to cover the connection wiring 161 through a fifth mask process, and the auxiliary cover wiring 190 is formed to cover the auxiliary wiring 165. The pad cover electrode 290 covering the pad connection electrode 261 is formed simultaneously with the connection cover wiring 192 and the auxiliary cover wiring 190.

 Next, a protective layer 150 is formed on the pixel region AA by using a sixth mask process, and a pad protection pattern 152a is formed on the pad region PA. In this case, the passivation layer 150 and the pad protection pattern 152a may be formed using a halftone mask. Wherein the halftone mask is a mask having a light shielding portion, a light projecting portion, and a semi-light projecting portion, the light shielding portion is a portion shielding light, the light transmitting portion is a portion transmitting light, Refers to less than the transparent portion. When the halftone mask is used, patterns different in height may be formed by applying different amounts of light. Accordingly, the pad protection pattern 152a may be formed on the pad region PA, and the passivation layer 150 may be formed on the pixel region AA.

Next, as shown in FIG. 5F, the first electrode 171 and the auxiliary electrode 175 are formed on the entire surface of the substrate 110 using a seventh mask process. In this case, in order to form the first electrode 171 and the auxiliary electrode 175, a metal material such as ITO / Ag alloy / ITO is etched with an etching solution. The pad protection pattern 152a, Since the pad cover electrode 290 covers the pad area PA, corrosion does not occur in the pad area PA.

5G, a bank 180 for separating the first electrode 171 and the auxiliary electrode 175 is formed by using an eighth mask process.

Finally, the pad protection pattern 152a provided on the pad region PA is removed, and an organic light emitting layer 173 is formed on the first electrode 171. On the organic light emitting layer 173, Electrode 172 is formed.

In addition, the pad protection pattern 152a is removed after forming the bank, but the pad protection pattern 152a may be formed on the photoresist pattern during the strip process of the photoresist pattern, which is used as a mask in forming the first electrode 171, It may be removed at the same time as the resist pattern. In this case, the pad protection pattern 152a is formed of a material that reacts with the strip liquid in the strip process, for example, a photoresist.

As described above, in the second embodiment of the present invention, a total of eight photomasks are used from the step of forming the source electrode 141 and the drain electrode 172 to the step of forming the bank 180. That is, the pad connecting electrode 261 is formed on the pad 240 by using the same number of photomasks as in the first embodiment of the present invention, and the pad covering electrode 261 is formed to cover the pad connecting electrode 261, (290). Accordingly, it is possible to prevent corrosion and metal transition in the pad region PA without adding a separate mask, thereby improving the reliability and productivity of the OLED display.

6 is a cross-sectional view of an OLED display according to a third embodiment of the present invention. The organic light emitting display according to the third embodiment of the present invention includes a protective layer 150 formed of a first protective layer 151 and a second protective layer 152, Except that the auxiliary cover wiring 195 is provided between the second protective layer 152 and the auxiliary wiring 165. The auxiliary cover wiring 195 may be formed in the same manner as the above- 2 embodiment. Therefore, the same reference numerals are assigned to the same components, and repetitive descriptions of the repetitive portions in the materials, structures, etc. of the respective components are omitted.

A passivation layer 135, a planarization layer 145, a connection wiring 161, a connection cover wiring 192, and the like are formed in the pixel region AA on the substrate 100 according to the third embodiment of the present invention. The auxiliary wiring 175, the auxiliary cover wiring 190, the protective layer 150, the first electrode 171, the auxiliary electrode 175, the bank 180, the organic light emitting layer 173, and the second electrode 172, Respectively.

The connection cover wiring 192 is provided on the connection wiring 161. The connection cover wirings 192 are provided so as to cover the upper surface and side surfaces of the connection wirings 161.

The auxiliary cover wiring 190 is provided in the same layer as the connection cover wiring 192. The auxiliary cover wiring 190 and the connection cover wiring 192 are spaced apart from each other. The auxiliary cover wiring 190 is provided on the auxiliary wiring 165 and covers the upper surface and the side surface of the auxiliary wiring 165.

The passivation layer 150 includes a first passivation layer 151 and a second passivation layer 152.

The first passivation layer 151 is provided on the connection cover wiring 192. The first passivation layer 151 covers the top surface of the connection cover wiring 192. In this case, The layer 151 does not cover the side surface of the connection cover wiring 192. Accordingly, the side surface of the connection cover wiring 192 may be exposed. This can be easily understood by referring to a manufacturing method described later.

The second protective layer 152 is provided on the auxiliary cover wiring 190. The second protective layer 152 covers the top surface of the auxiliary cover wiring 190. In this case, the second protective layer 152 does not cover the side surface of the auxiliary cover wiring 190.

The first passivation layer 151 and the second passivation layer 152 are spaced apart from each other. Banks 180 are provided between the first and second protective layers 151 and 152 which are spaced apart from each other.

A first electrode 171 is provided on the first passivation layer 151 and an auxiliary electrode 175 is provided on the second passivation layer 152.

The bank 180 is provided between the first electrode 171 and the auxiliary electrode 175 to insulate the first electrode 171 and the auxiliary electrode 175 from each other. In this case, the bank 180 is provided between the first protective layer 151 and the second protective layer 152 facing each other, and the connection cover wiring (not shown) disposed under the first protective layer 151, And insulates the auxiliary cover wiring 190 disposed under the first passivation layer 192 and the second passivation layer 152.

7A to 7D are cross-sectional views illustrating a method of manufacturing an OLED display according to a third embodiment of the present invention. Therefore, the same reference numerals are assigned to the same components, and repetitive descriptions of the repetitive portions in the materials, structures, etc. of the respective components are omitted.

7A, a thin film transistor T is formed on a pixel region AA on the substrate 100 by using a first mask process, and a pad (not shown) is formed on a pad region PA on the substrate 100, (240).

Next, a passivation layer 135 is formed on the entire surface of the pad region PA including the pixel region AA including the thin film transistor T and the pad 240 using a second mask process. A third contact hole CH3 exposing the drain electrode 142 of the thin film transistor T and a pad contact hole CHp exposing the pad 240 are formed in the passivation layer 135 .

Next, a planarization layer 145 is formed on the passivation layer 135 located in the pixel area PA using a third mask process.

7B, the connection wiring 161, the auxiliary wiring 165, and the pad connection electrode 261 are formed through the fourth mask process, and the auxiliary cover wiring material 190a is coated on the entire surface of the substrate do.

A second passivation layer 152 is formed on the pixel region AA to be spaced apart from the first passivation layer 151 and the first passivation layer 151 by using a fifth mask process, The pad protection pattern 152a is formed on the pad PA. The fourth contact hole CH4 is formed in the first passivation layer 151 and the fifth contact hole CH5 is formed in the second passivation layer 152. [ The first passivation layer 151, the second passivation layer 152, and the pad protection pattern 152a may be formed using a halftone mask.

7C, the first electrode 171 is formed on the first passivation layer 151 using the sixth mask process, and the auxiliary (not shown) is formed on the second passivation layer 152. Then, Electrode 175 is formed. When the first electrode 171 and the auxiliary electrode 172 are formed, the cover wiring material 190a located in the pad area PA is etched at the same time, A cover electrode 290 is formed. In addition, when the first electrode 171 and the auxiliary electrode 172 are formed, the cover wiring material 190a located in the pixel region AA is simultaneously etched, The wiring 192 and the auxiliary cover wiring 195 are formed. Accordingly, the side surface of the connection cover wiring 192 may be exposed to the outside. Since the connection cover wirings 192 are made of a material having a low degree of oxidation, even if they are exposed to the outside, corrosion does not easily occur.

Next, a bank 180 for separating the first electrode 171 and the auxiliary electrode 175 is formed using a seventh mask process. In this case, the bank 180 is provided between the first passivation layer 151 and the second passivation layer 152 to insulate the connection cover wiring 161 and the auxiliary cover wiring 165.

7D, the pad protection pattern 152a is removed, an organic light emitting layer 173 is formed on the first electrode 171, a second electrode 173 is formed on the organic light emitting layer 173, (Not shown).

As described above, in the third embodiment of the present invention, a total of seven photomasks are used from the step of forming the source electrode 141 and the drain electrode 172 to the step of forming the bank 180. That is, in the third embodiment of the present invention, a pad connection electrode 261 is formed on the pad 240 using a smaller number of photomasks than in the first embodiment of the present invention, It is possible to form the pad cover electrode 290. Accordingly, it is possible to prevent corrosion and metal transition in the pad region PA while reducing the number of masks.

FIG. 8 is a cross-sectional view of an OLED display according to a fourth embodiment of the present invention, and FIG. 9 is a plan view for explaining the bank shown in FIG. The organic light emitting display according to the fourth embodiment of the present invention is the same as the second embodiment except that the bank 180 is formed along the rim of the first electrode 171. [ Therefore, the same reference numerals are assigned to the same components, and repetitive descriptions of the repetitive portions in the materials, structures, etc. of the respective components are omitted.

The bank 180 shown in Figs. 8 and 9 includes an inner side IS spaced a certain distance inwardly from the side of the first electrode 171 and an inner side IS spaced a certain distance outward from the side of the first electrode 171 And an outer side (OS). The bank 180 having the inner side surface IS and the outer side surface OS is formed to cover the upper surface and the side surface of the first electrode 180 except for the light emitting region where the organic light emitting layer 173 is formed. Accordingly, the bank 180 is formed so as to cover the side surface of the first electrode 171 along the rim of the first electrode 171 excluding the light emitting region, so that the light emitting region has an open island shape.

10A to 10F are cross-sectional views illustrating a method of manufacturing an OLED display according to a fourth embodiment of the present invention. Since the first through fifth mask processes in the method of manufacturing an organic light emitting display according to the fourth embodiment of the present invention are the same as those of the second embodiment of the present invention, a detailed description thereof will be omitted.

A protective layer 150 is formed on the pixel area AA using a sixth mask process and a pad protection pattern 152a having the same material as that of the protection layer 150 is formed on the pad area PA, ). At this time, the protective layer 150 is formed to have a fourth contact hole CH4 exposing the connection cover wiring 192 and a fifth contact hole CH5 exposing the auxiliary cover wiring 190.

Next, a conductive material 171a and a photosensitive film are sequentially formed on the substrate 100 on which the protection layer 150 and the pad protection pattern 152a are formed, as shown in FIG. 10B. At this time, the conductive material 171a is formed into a multilayer structure in which a transparent conductive material / a metal material / a transparent conductive material are sequentially stacked. For example, the conductive material 171a is formed of ITO / Ag alloy / ITO. The photoresist film is formed, for example, of photo-acrylic (PAC).

Next, the photoresist pattern 180a having the first and second heights, which are different from each other, is formed in the pixel region AA by exposing and developing the photoresist through the seventh mask process using the halftone mask or the slit mask. The multi-layered photoresist pattern 180a is formed to have a first thickness in the region corresponding to the transflective portion of the halftone mask and a second thickness in the region corresponding to the light shielding portion of the halftone mask. In the region corresponding to the transmissive portion of the halftone mask, the photosensitive film is removed, so that the photosensitive film pattern 180a is not formed.

Next, as shown in FIG. 10C, the first electrode 171 and the auxiliary electrode 175 are formed by wet-etching the conductive material 171a using the multi-stage structure photoresist pattern 180a as a mask. Since the pad protection pattern 152a covers the pad cover electrode 290 during the etching process, the corrosion of the pad cover electrode 290, the pad connection electrode 261 and the pad 240 located in the pad area PA .

10D, the photoresist pattern 180a is reflowed through a curing process so that the photoresist pattern 180a is exposed to the exposed first and second electrodes 171 and 175 And is formed to cover the side surface. Accordingly, it is possible to prevent the first electrode 171 from being electrically short-circuited with the second electrode 172 formed later.

Next, as shown in Fig. 10E, the photoresist pattern 180a and the pad protection pattern 152a are etched or dry etched. As a result, the pad protection pattern 152a located in the pad area PA is removed to expose the pad cover electrode 290, and the photoresist pattern 180a located in the pixel area AA is thinned to form the bank 180). The bank 180 is formed to cover the side surfaces of the first electrode 171 and the auxiliary electrode 175 along the rims of the first electrode 171 and the auxiliary electrode 175, respectively. At this time, the bank 180 exposes the light emitting region on the first electrode 171 and exposes the upper surface of the auxiliary electrode 175 connected to the second electrode 172.

10F, an organic light emitting layer 173 is formed on the light emitting region of each of the first electrodes 171 exposed by the bank 180, and a second electrode 173 is formed on the organic light emitting layer 173 172 are formed. At this time, the second electrode 172 is electrically connected to the auxiliary electrode 175, so that the resistance component of the second electrode 172 can be compensated.

As described above, in the fourth embodiment of the present invention, a total of seven photomasks are used from the step of forming the source electrode 141 and the drain electrode 172 to the step of forming the bank 180. That is, in the fourth embodiment of the present invention, a pad connecting electrode 261 is formed on the pad 240 using a smaller number of photomasks than in the first embodiment of the present invention, It is possible to form the pad cover electrode 290. Accordingly, in the fourth embodiment of the present invention, it is possible to prevent corrosion and metal transition in the pad region PA while reducing the number of masks. In more detail, in the fourth embodiment of the present invention, the pad cover electrode 290 can be protected during the etching process of the first electrode 171 by the pad protection pattern 152a formed at the same time as the protection film 150, Corrosion and fast transit phenomenon in the area PA can be prevented. In addition, in the fourth embodiment of the present invention, the bank 180 and the first electrode 171 can be formed through the same mask process, and the pad protection pattern 152a and the protection film 150 can be formed in the same mask It is possible to improve the productivity and reduce the cost.

The foregoing description is merely illustrative of the present invention, and various modifications may be made by those skilled in the art without departing from the spirit of the present invention. Accordingly, the embodiments disclosed in the specification of the present invention are not intended to limit the present invention. The scope of the present invention should be construed according to the following claims, and all the techniques within the scope of equivalents should be construed as being included in the scope of the present invention.

100: substrate 145: passivation layer
151: first protective layer 152: second protective layer
161: connection wiring 165: auxiliary wiring
261: pad electrode 171: first electrode

Claims (15)

A liquid crystal display comprising: a substrate including a pixel region and a pad region;
A thin film transistor provided in a pixel region of the substrate;
A first electrode electrically connected to the thin film transistor;
An organic light emitting layer provided on the first electrode;
A second electrode provided on the organic light emitting layer;
An auxiliary electrode connected to the second electrode and provided in the same layer as the first electrode;
An auxiliary wiring connected to the auxiliary electrode and provided under the auxiliary electrode;
A pad provided in a pad region of the substrate;
A pad connecting electrode provided on the pad; And
And a pad cover electrode provided on the pad connection electrode,
Wherein the pad cover electrode covers the top and side surfaces of the pad connection electrode so that the pad connection electrode is not exposed to the outside. The method according to claim 1,
Wherein the oxidation degree of the pad cover electrode is lower than that of the pad connection electrode. The method according to claim 1,
And the pad connection electrode is made of the same material as the auxiliary wiring. The method according to claim 1,
And an auxiliary cover wiring provided on the auxiliary wiring so as to cover the upper surface and the side surface of the auxiliary wiring,
Wherein the auxiliary cover wiring is made of the same material as the pad cover electrode. The method according to claim 1,
Wherein the thin film transistor and the first electrode are connected by a connection wiring, and the connection wiring is provided in the same layer as the auxiliary wiring. 6. The method of claim 5,
A first protective layer is provided between the first electrode and the connection wiring,
A second protective layer is provided between the auxiliary electrode and the auxiliary wiring,
Wherein the first passivation layer and the second passivation layer are spaced apart from each other. The method according to claim 6,
And a bank is provided between the first and second protective layers facing each other. 6. The method of claim 5,
A connection cover wiring is provided on the connection wiring so as to cover an upper surface and a side surface of the connection wiring,
Wherein a side surface of the connection cover wiring is exposed. The method according to claim 1,
And a bank disposed along the rim of the first electrode. Forming a thin film transistor in a pixel region on a substrate and forming a pad in a pad region on the substrate;
Forming a planarization layer on the thin film transistor;
Forming a connection wiring connected to the thin film transistor on the planarization layer and an auxiliary wiring spaced apart from the connection wiring and forming a pad connection electrode connected to the pad;
Forming a connection cover electrode to cover the connection wiring, forming an auxiliary cover electrode to cover the auxiliary wiring, and forming a pad connection electrode to cover the pad connection electrode;
Forming a protective layer on the pixel region and forming a pad protection pattern on the pad region;
Forming a first electrode connected to the connection wiring on the protection layer and an auxiliary electrode connected to the auxiliary wiring;
Forming a bank for separating the first electrode and the auxiliary electrode;
Forming an organic light emitting layer on the first electrode; And
And forming a second electrode connected to the auxiliary electrode on the organic light emitting layer. 11. The method of claim 10,
Wherein the pad protection pattern is removed after forming the bank or removed during a strip process of a photoresist pattern used in forming the first electrode. 11. The method of claim 10,
Wherein the protective layer and the pad protection pattern are simultaneously formed of the same material. 13. The method of claim 12,
Forming a first electrode connected to the connection wiring on the protection layer and an auxiliary electrode connected to the auxiliary wiring,
Depositing a conductive material on the protection layer and the substrate on which the pad protection pattern is formed;
Forming a multi-layered photoresist pattern on the substrate on which the conductive material is stacked;
And etching the conductive material using the photoresist pattern as a mask to form the first electrode and the auxiliary electrode. 14. The method of claim 13,
Wherein forming the bank that separates the first electrode and the auxiliary electrode comprises:
Forming a bank disposed along a rim of the first electrode and exposing the pad cover electrode by ashing the photoresist pattern and the pad protection pattern. Forming a thin film transistor in a pixel region on a substrate and forming a pad in a pad region on the substrate;
Forming a planarization layer on the thin film transistor;
Forming a connection wiring connected to the thin film transistor on the planarization layer and an auxiliary wiring spaced apart from the connection wiring, forming a pad connection electrode connected to the pad, and applying an auxiliary cover material to the entire surface of the substrate;
Forming a second passivation layer on the pixel region so as to be spaced apart from the first passivation layer and the first passivation layer, and forming a pad protection pattern on the pad region;
Forming the first electrode on the first protection layer, forming the auxiliary electrode on the second protection layer, and etching the pad protection pattern to form a connection cover wiring, an auxiliary cover wiring, and a pad cover electrode step;
Forming a bank for separating the first electrode and the auxiliary electrode, and removing the pad protection pattern;
Forming an organic light emitting layer on the first electrode; And
And forming a second electrode connected to the auxiliary electrode on the organic light emitting layer.

Images