KR20120116782A - Fabricating method of organic light emitting diode display - Google Patents

Abstract

PURPOSE: A manufacturing method for an organic luminance diode display is provided to reduce manufacturing costs of an alignment device by simplifying a passivation device configuration through a lift-off process. CONSTITUTION: A TFT(Thin Film Transistor) array is formed on valid display regions and a pad part(40) is formed on pad regions. An organic light emitting diode device(20) is formed on the TFT array and a sacrificial layer is formed to cover a pad part. A passivation layer(30) is formed on a front side of a motherboard in order to cover the organic light emitting diode device and the sacrificial layer. Panels are sealed by filling a gap between the passivation layer and an encapsulation substrate with a sealing film. Unit panels are individually cut along scribing lines prepared in a motherboard. The pad part is exposed by partially eliminating the passivation layer and the sacrificial layer.

Description

Fabrication Method Of Organic Light Emitting Diode Display

The present invention relates to a method of manufacturing an organic light emitting diode display.

Recently, development of various flat panel displays (FPDs) has been accelerated. Among them, the organic light emitting diode display has an advantage in that the response speed is fast and the luminous efficiency, luminance, and viewing angle are large by using a self-luminous element emitting light.

The organic light emitting diode display device has an organic light emitting diode element (OLED) for self emission. The organic light emitting diode (OLED) has an organic compound layer formed between the anode and the cathode. The organic compound layer includes a hole injection layer, a hole transport layer, an emission layer, an electron transport layer, and an electron injection layer. When a driving voltage is applied to the anode and the cathode, holes passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) are combined in the emission layer EML to form excitons, which excite from the excited state to the ground state. As it falls, it generates visible light.

The organic light emitting diode (OLED) has a property that is very vulnerable to moisture and oxygen in the air. Therefore, an encapsulation process is required in the manufacturing process of the organic light emitting diode display to seal the organic light emitting diode (OLED) so that moisture and oxygen do not penetrate.

The sealing technique is known as an edge sealing technique including a UV violet sealing method and a frit sealing method, and a face sealing technique. The UV sealing method is the oldest method using a glass encapsulation substrate and a moisture absorbent. The frit sealing method, which is mainly used for small products, has the best sealing property by sealing the substrate and the encapsulation substrate by using a low temperature frit, but is weak in external impact and thus is limited in application to a large substrate. Face sealing technology is a sealing method that is being developed to solve the external impact problem when applying large products. Face sealing technology fills the entire empty space between the encapsulation substrate and the OLED substrate using organic materials. As the filling organic material, a face sealing film is mainly used.

Filled organics, by their nature, have a lower ability to block water and oxygen than inorganics, which can cause pixel shrinkage. In general, the face sealing technology protects the organic light emitting diode device (OLED) from external impact, moisture and oxygen by passivating the organic light emitting diode device (OLED) with an inorganic material prior to filling the organic material. The conventional face sealing technique will be briefly described with reference to FIG. 1 as follows.

The face sealing technique is divided into a passivation step, an encapsulation step, and a scribing step as shown in FIG. 1.

In the passivation step, the inorganic material is formed by a physical vapor deposition (PVD) process such as sputtering or a plasma enhanced chemical vapor deposition (PECVD) process on the mother substrate 1 on which the organic light emitting diode device 2 is formed. It is deposited to form a passivation layer 3. The passivation layer 3 is formed to sufficiently cover the effective display area AA including the organic light emitting diode element 2. However, the passivation layer 3 should not be formed in the formation region of the pad portion 4, that is, the pad region PA, to which the driver IC (Flexible Printed Circuit) or FPC is to be contacted. For this purpose, in forming the passivation layer 3, a mask 5 is necessary for preventing the passivation layer 3 from being deposited in the pad region PA.

In the encapsulation step, the passivation layer 3 and the encapsulation substrate 7 are filled with a face sealing film 6 made of an organic material and sealed. In the scribing step, the mother substrate 1 and the encapsulation substrate 7 are cut in panel units to be individualized.

However, in the conventional face sealing technique as shown in FIG. 1, many problems are caused by the mask 5 which is inevitably applied for the selective deposition of the passivation layer 3.

For example, as shown in FIG. 2A, poor penetration film formation due to lifting of the mask 5 or misalignment of the mask 5, film quality deterioration due to foreign matter induction of the mask 5 as shown in FIG. 2B, and as shown in FIG. 2C Arc generation in the process chamber due to the mask 5, changes in the deposited film characteristics by the material of the mask 5 as shown in FIG. 2D, and induction of static electricity by the mask 5 as shown in FIG. 2E.

The above problems caused by the mask 5 become a factor that greatly lowers the yield. In addition, the mask (5) as described above requires an expensive fine align system (fine align system), additional cost is expensive to manufacture and maintain the expensive equipment, tact time (tact according to the fine alignment process) accompanied by increased time and reduced productivity.

Accordingly, it is an object of the present invention to provide a method of manufacturing an organic light emitting diode display device which can increase yield and reduce manufacturing cost and time.

In order to achieve the above object, a method of manufacturing an organic light emitting diode display according to an exemplary embodiment of the present invention includes preparing a multi-faceted mother substrate on which a plurality of unit panels each having a plurality of effective display areas and pad areas are formed. ; Forming a TFT array in each of the effective display regions and forming a pad portion in each of the pad regions; Forming an organic light emitting diode device on the TFT array and forming a sacrificial layer to cover the pad part; Forming a passivation layer on an entire surface of the mother substrate to cover the organic light emitting diode device and the sacrificial layer; Sealing the panels by filling a face sealing film between the passivation layer and the encapsulation substrate, and individually cutting the unit panels along scribing lines provided on the mother substrate; Cleaning the stripper to penetrate the sacrificial layer through the passivation layer; And partially removing the passivation layer thereon along with the sacrificial layer through a lift-off process to expose the pad portion.

The manufacturing method of the organic light emitting diode display device according to the present invention removes high-quality defects such as penetration film formation, foreign matter generation, arc generation, static electricity generation, and change in film characteristics caused by the mask in the passivation process of the organic light emitting diode device. This can greatly increase the effect.

Furthermore, the present invention can simplify the configuration of the passivation equipment through a simple lift-off process to reduce the cost of alignment equipment production and maintenance, as well as to significantly increase productivity by simplifying the process.

1 is a view schematically showing a method of manufacturing an organic light emitting diode display using a conventional face sealing technique.
2 shows the problems caused by the existing face sealing technique.
3 illustrates an example of a four chamfered mother substrate on which a plurality of display panels are formed.
4A through 4E are diagrams sequentially illustrating an example for forming an organic light emitting diode display device on a mother substrate of FIG. 3.
5A to 5C are views showing examples of a thermal deposition mask capable of simultaneously forming a sacrificial layer together with an organic compound layer of an organic light emitting diode device.
FIG. 5D shows a thermal deposition mask capable of forming only an organic compound layer of an organic light emitting diode device. FIG.
6A-6C show cross-sections of a sacrificial layer consisting of triple layers under the thermal deposition mask of FIGS. 5A-5C, respectively.
7 shows experimental results comparing microscope images before and after a cleaning process.
8A through 8E sequentially illustrate another example of forming an organic light emitting diode display device on a mother substrate of FIG. 3.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 3 to 8E.

3 illustrates an example of a four chamfered mother substrate on which a plurality of display panels are formed.

Referring to FIG. 3, four unit panels are separately formed along the scribing lines 100 on the mother substrate. Each unit panel has a pad in which an effective display area AA for displaying an image by light generated by an organic light emitting diode device and a pad portion 4 to which a driver IC (Integrated Circuit) or FPC (Flexible Printed Circuit) are to be contacted. Area PA.

4A through 4E sequentially illustrate an example for forming an organic light emitting diode display on a mother substrate as shown in FIG. 3. 4A to 4E show cutaway views of II ′ of FIG. 3 according to the process procedure, respectively.

The process of forming the organic light emitting diode device 20 and the sacrificial layer 25 is illustrated in FIG. 4A.

Referring to FIG. 4A, an organic light emitting diode element 20 is formed in each of the effective display areas AA of the mother substrate 10. The organic light emitting diode device 20 includes an anode, a cathode, and an organic compound layer formed therebetween. The organic light emitting diode device 20 further includes a capping layer CPL formed on the cathode.

The anode is deposited on the effective display area AA by a sputtering process and then patterned pixel by pixel through a photolithography process and an etching process. The anode may contact the TFT array (Thin Film Transistor Array) below the contact hole. The TFT array may include a gate line, a data line, a driving TFT, a switch TFT, a storage capacitor, an insulating layer, and the like formed through a photolithography process and an etching process.

The organic compound layer is a hole injection layer (HIL) sequentially formed on the anode of the effective display area AA by a thermal evaporation process using the thermal deposition mask of at least one of FIGS. 5A to 5D. And a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). Bank patterns and spacers may be formed between the anode and the organic compound layer to partition neighboring pixels.

The cathode is deposited by a thermal evaporation process on the organic compound layer in the effective display area AA. The capping layer CPL is deposited on the cathode by a thermal deposition process. The capping layer CPL protects the organic light emitting diode device 20 from plasma damage in the process of forming the passivation layer 30 to be described later, and buffers stress between the passivation layer 30 and the organic light emitting diode device 20. Do it.

The pad portion 40 and the sacrificial layer 25 covering the pad portion 40 are formed in the pad regions PA of the mother substrate 10, respectively. The pad portion 40 may be formed in the manufacturing process of the TFT array. The sacrificial layer 25 is formed together with the organic compound layer in the process of manufacturing the organic compound layer. The sacrificial layer 25 may be formed through a thermal deposition mask of any one of FIGS. 5A to 5C, and may be a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer by the thermal evaporation process. At least any one of the layers may be included. Thermal deposition masks such as FIGS. 5A-5C can be readily achieved with modifications to existing thermal deposition masks such as FIG. 5D.

The passivation layer 30 forming process is shown in FIG. 4B.

Referring to FIG. 4B, a physical vapor deposition (PVD) process, such as sputtering, on a mother substrate 10 having the organic light emitting diode device 20 and the sacrificial layer 25 formed thereon, or a plasma enhanced chemical vapor deposition (PECVD) process. In the process, an inorganic passivation layer 30 is deposited. The passivation layer 30 is formed on the entire area of the mother substrate 10 to cover not only the organic light emitting diode device 20 but also the sacrificial layer 25. Therefore, the present invention eliminates the conventional problems caused by the metal mask by eliminating the need for a separate metal mask as in the prior art when forming the passivation layer 30.

The deposition density of the passivation layer 30 is very low on the sacrificial layer 25 compared to other regions, and the interface between the passivation layer 30 and the sacrificial layer 25 becomes very unstable. This is because the sacrificial layer 25 is made of only an organic compound layer vulnerable to plasma damage without being covered with a capping layer (CPL) or a cathode, and the sacrificial layer 25 is damaged by the plasma during the deposition of the passivation layer 30. to be. The lower the deposition density of the passivation layer 30 or the unstable interface between the passivation layer 30 and the sacrificial layer 25, the easier the penetration of strippers in the cleaning process described later.

Encapsulation and scribing process is shown in Figure 4c.

Referring to FIG. 4C, a face sealing film is applied between the passivation layer 30 and the encapsulation substrate 60 by applying a temperature to the face sealing film 50 of the organic material sandwiched between the passivation layer 30 and the encapsulation substrate 60. By filling with (6), the display panels on the mother substrate 10 are sealed. Subsequently, the mother substrate 10 is cut along the scribing lines 100 and individualized in panel units.

The cleaning and lift off processes are shown in FIGS. 4D and 4E, respectively.

Referring to FIG. 4D, a cleaning process is performed using an ultrasonic cleaner or the like. In the cleaning process, the stripper easily penetrates into the interface of the passivation layer 30 having a lower deposition density on the sacrificial layer 25. Such stripper may be selected as DI water (deionized water). Meanwhile, the stripper may be selected as an organic solvent capable of penetrating the interface of the passivation layer 30 and melting some or all of the sacrificial layer 25 thereunder.

Referring to FIG. 4E, a lift-off process is performed by the stripper penetrated into the interface of the passivation layer 30. Due to the lift-off process, the passivation layer 30 ′ on the sacrificial layer 25 is easily removed to expose the pad portion 40 in the pad area PA.

5A to 5C show examples of a thermal deposition mask capable of simultaneously forming the sacrificial layer 25 together with the organic compound layer of the organic light emitting diode device 20. 5D shows a thermal deposition mask capable of forming only the organic compound layer of the organic light emitting diode device 20. 6A-6C show cross-sections of the sacrificial layer 25 consisting of triple layers under the thermal deposition mask of FIGS. 5A-5C, respectively.

As described above, the organic compound layer of the organic light emitting diode device 20 is composed of five layers (HIL, HTL, EML, ETL, EIL) deposited separately through five process chambers. The sacrificial layer 25 may include at least one layer that is relatively vulnerable to plasma damage among the five layers. The thermal deposition mask may be selected from any one of FIGS. 5A to 5C when the organic compound layer and the sacrificial layer 25 of the organic light emitting diode device 20 are simultaneously formed, while the organic compound layer of the organic light emitting diode device 20 is used. In the case of forming the bay, it may be selected in FIG. 5D. For example, when the material of the sacrificial layer 25 is selected as the triple layer of the hole transport layer HTL, the light emitting layer EML, and the electron transport layer ETL, the triple layers HTL, EML, and ETL are illustrated in FIGS. 5A to 5C. Any one of the organic compound layer of the organic light emitting diode device 20 and the sacrificial layer 25 is formed at the same time, the remaining double layer (HIL, EIL) is the organic compound layer of the organic light emitting diode device 20 by FIG. Can be formed.

The thermal deposition mask of FIG. 5A exposes the first openings OP1 that are aligned to expose the effective display areas AA of the mother substrate 10 and the pad areas PA of the mother substrate 10. And second openings OP2 arranged to be non-overlap with the scribing lines 100 in the horizontal (X) and vertical (Y) directions of the mother substrate 10. The width X of the second opening OP2 may be substantially the same or may not be the same as the width X of the first opening OP1.

A cross section of the sacrificial layer 25 formed of a thermal deposition mask as shown in FIG. 5A is the same as that of FIG. 6A. Thermal deposition masks such as FIG. 5A are advantageous for fabrication. However, since the side surface of the sacrificial layer 25 is not exposed to the outside as shown in FIG. 6A, it is difficult to penetrate the stripper as compared to FIGS. 5B and 5C.

The thermal deposition mask of FIG. 5B exposes the first openings OP1 aligned to expose the effective display areas AA of the mother substrate 10 and the pad areas PA of the mother substrate 10. And second openings OP2 arranged to overlap the scribing lines 100 in the vertical (Y) direction of the mother substrate 10. The width X of the second opening OP2 is greater than the width X of the first opening OP1. The second opening OP2 is common to the unit panels neighboring in the horizontal X direction.

A cross section of the sacrificial layer 25 formed of a thermal deposition mask as shown in FIG. 5B is the same as that of FIG. 6B. According to the thermal vapor deposition mask of FIG. 5B, since the side surface of the sacrificial layer 25 is exposed to the outside as shown in FIG. 6B, stripper penetration is facilitated, thereby making the lift-off process easier. However, since the rigidity of the mask is inferior, it is not easy to manufacture.

The thermal deposition mask of FIG. 5C includes two masks to facilitate mask fabrication and stripper penetration. Mask A is substantially the same as in FIG. 5A. The mask B may non-expose the first openings OP1 aligned to expose the effective display areas AA of the mother substrate 10 and the pad areas PA of the mother substrate 10. Third openings OP3 are aligned to overlap with the scribing lines 100 in the vertical (Y) direction of (10). The width X of the third opening OP3 is smaller than the width X of the first opening OP1. When the mask A and the mask B overlap, an effect similar to that of FIG. 5B is created by the second openings OP2 and the third openings OP3.

A cross-section of the sacrificial layer 25 formed of thermal deposition masks as in FIG. 5C is the same as in FIG. 6C. According to the thermal deposition masks as illustrated in FIG. 5C, some side surfaces of the sacrificial layer 25 are exposed to the outside as shown in FIG. 6C while maintaining the robustness of the mask, thereby facilitating stripper penetration, thereby making the lift-off process easier.

The thermal deposition mask of FIG. 5D includes only openings OP aligned to expose the effective display areas AA of the mother substrate 10.

7 shows experimental results of comparing microscope images before and after the cleaning process.

Referring to FIG. 7, it can be seen that the difference between the sacrificial layer deposition region and the sacrificial layer non-deposition region is clearly noticeable after the comparison of the optical microscope image after the cleaning. This shows that the lift-off process in the sacrificial layer deposition region proceeded smoothly.

In addition, when observed under a PL (Photoluminescence) microscope, light emission was observed in the sacrificial layer deposition region before cleaning, but no light emission was observed after cleaning. This shows that the lift-off process in the sacrificial layer deposition region proceeded smoothly.

8A through 8E sequentially illustrate another example of forming an organic light emitting diode display device on a mother substrate of FIG. 3. 8A to 8E show cutaway views of II ′ of FIG. 3, respectively, according to the process procedure.

8A to 8E, except for the material of the sacrificial layer 125 and the mask for forming the sacrificial layer 125, the remaining process steps are similar to those described with reference to FIGS. 4A to 4E.

The sacrificial layer 125 may be formed together with the TFT array in the manufacturing process of the TFT array unlike in FIGS. 4A to 4E. The sacrificial layer 125 may be selected as a photo resist used in the photolithography process of the TFT array. In addition, a mask for forming the sacrificial layer 125 may be easily made by modifying (exposing the pad region without blocking) the mask used in the photolithography process of the TFT array.

As described above, the method of manufacturing the organic light emitting diode display device according to the present invention includes the penetration film formation, foreign matter generation, arc generation, electrostatic generation and change of film characteristics caused by the metal mask in the passivation process of the organic light emitting diode device. Eliminating defects of high quality has the effect of significantly increasing the yield.

Furthermore, the present invention can simplify the configuration of the passivation equipment through a simple lift-off process to reduce the cost of alignment equipment production and maintenance, as well as to significantly increase productivity by simplifying the process.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

10 mother board 20 organic light emitting diode device
25, 125: sacrificial layer 30: passivation layer
40: pad portion 50: face sealing film
60: encapsulation substrate

Claims (10)

Preparing a multi-faceted mother substrate on which a plurality of unit panels each having a plurality of effective display areas and pad areas are formed;
Forming a TFT array in each of the effective display regions and forming a pad portion in each of the pad regions;
Forming an organic light emitting diode device on the TFT array and forming a sacrificial layer to cover the pad part;
Forming a passivation layer on an entire surface of the mother substrate to cover the organic light emitting diode device and the sacrificial layer;
Sealing the panels by filling a face sealing film between the passivation layer and the encapsulation substrate, and individually cutting the unit panels along scribing lines provided on the mother substrate;
Cleaning the stripper to penetrate the sacrificial layer through the passivation layer; And
And partially removing the passivation layer thereon together with the sacrificial layer through a lift-off process to expose the pad part. The method of claim 1,
The sacrificial layer is formed together with an organic compound layer in the process of manufacturing the organic light emitting diode device;
And wherein the sacrificial layer comprises at least one of a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer, wherein the sacrificial layer is relatively vulnerable to plasma damage. The method of claim 2,
The passivation layer is a PVD (Physical Vapor Deposition) process, PECVD (Plasma Enhanced Chemical Vapor Deposition) process of manufacturing an organic light emitting diode display device characterized in that the deposition. The method of claim 3, wherein
Due to the reaction with the sacrificial layer, the deposition density of the passivation layer is lower on the sacrificial layer than other regions or the interface between the passivation layer and the sacrificial layer is more unstable;
The lower the deposition density of the passivation layer or the unstable interface, the easier the penetration of the stripper, the method of manufacturing an organic light emitting diode display device. The method of claim 4, wherein
The organic light emitting diode display device further comprises a capping layer formed at an interface in contact with the passivation layer so as to be protected from the plasma damage. The method of claim 1,
The stripper may be selected as an organic solvent capable of dissolving some or all of the sacrificial layer by penetrating DI water or an interface of the passivation layer. The method of claim 2,
The thermal deposition mask for forming the sacrificial layer,
First openings aligned to expose the effective display areas;
And second openings that expose the pad regions and are aligned so as to be non-overlapping with scribing lines in the horizontal and vertical directions of the mother substrate. The method of claim 2,
The thermal deposition mask for forming the sacrificial layer,
First openings aligned to expose the effective display areas;
Second openings that expose the pad regions and are aligned to overlap vertical scribing lines of the mother substrate;
The horizontal width of the second openings is greater than the horizontal width of the first openings, and each of the second openings is shared by adjacent unit panels in a horizontal direction. The method of claim 2,
The thermal deposition mask for forming the sacrificial layer includes a first mask and a second mask optionally available;
The first mask may include first openings aligned to expose the effective display areas, and the pad areas to expose the pad areas and to be non-overlapping with horizontal and vertical scribing lines of the mother substrate. Second openings formed;
The second mask may include first openings that are aligned to expose the effective display areas, and a third that is aligned to overlap the vertical scribing lines of the mother substrate without exposing the pad areas. And openings, wherein the widths of the third openings are smaller than the widths of the first openings. The method of claim 1,
The sacrificial layer is formed together with the TFT array in the manufacture of the TFT array;
And wherein the sacrificial layer is selected as a photo resist used in the photolithography process for the TFT array.

Images