KR101814775B1 - Fabricating Method Of Organic Light Emitting Diode Display - Google Patents

Abstract

A method of manufacturing an organic light emitting diode display device according to the present invention includes the steps of preparing a mother substrate if a plurality of unit panels each having a plurality of effective display areas and pad areas are formed; Forming a TFT array and an organic light emitting diode device in each of the effective display areas, and forming a pad part and a sacrificial layer covering the pad part in each of the pad areas; Forming a passivation layer on the entire surface of the mother substrate so as to cover the organic light emitting diode device and the sacrificial layer; Filling the passivation layer and the encapsulation substrate with a face sealing film to seal the panels, and separately cutting the unit panels along scribing lines provided on the mother substrate; Cleaning the stripper to penetrate the sacrificial layer through the passivation layer; And partially removing the passivation layer thereon with the sacrificial layer through a lift-off process to expose the pad portion.

Description

Technical Field [0001] The present invention relates to an organic light emitting diode (OLED) display device,

The present invention relates to a method of manufacturing an organic light emitting diode display.

2. Description of the Related Art In recent years, development of various flat panel displays (FPD) has been accelerated. In particular, an organic light emitting diode (OLED) display device has advantages of high response speed, high luminous efficiency, high luminance and wide viewing angle by using a self-luminous element which emits light by itself.

The organic light emitting diode display device has an organic light emitting diode (OLED) element for self-emission. The organic light emitting diode (OLED) has an organic compound layer formed between the anode and the cathode. The organic compound layer includes a hole injection layer, a hole transport layer, an emission layer, an electron transport layer, and an electron injection layer. When driving voltage is applied to the anode and the cathode, electrons passing through the hole transport layer (HTL) and electrons passing through the electron transport layer (ETL) are combined with each other in the light emitting layer (EML) to form excitons, So that visible light is generated.

Such an organic light emitting diode (OLED) device is very vulnerable to moisture and oxygen in the air. Accordingly, in the manufacturing process of the organic light emitting diode display device, an encapsulation process is required to seal the organic light emitting diode (OLED) to prevent moisture and oxygen from penetrating.

The sealing technique is known as edge sealing technique and face sealing technique including ultra violet sealing method and frit sealing method. The UV sealing method is the oldest method using a glass sealing substrate and a moisture absorber. The frit sealing method, which is mainly used in small products, is a method of sealing a substrate and an encapsulating substrate by using a low temperature frit. However, it has a limitation in application to a large substrate because it is weak against an external impact. Face sealing technology has been developed to solve the external impact problem when applying large size products. The face sealing technique is a method of filling the entire void space between the encapsulation substrate and the OLED substrate using organic materials. As the filling organic matter, face sealing film is mainly used.

Charged organics, due to their nature, may have the ability to block moisture and oxygen compared to inorganic materials and cause pixel shrinkage. In general, the face sealing technique protects the organic light emitting diode (OLED) from external shock, moisture, and oxygen by passivating the organic light emitting diode device (OLED) with an inorganic material prior to filling the organic material. The conventional face sealing technique will be briefly described with reference to FIG.

The face sealing technique is roughly divided into a passivation step, an encapsulating step, and a scribing step as shown in Fig.

In the passivation step, an inorganic material is deposited on the mother substrate 1 on which the organic light emitting diode device 2 is formed by PVD (Physical Vapor Deposition) such as sputtering or PECVD (Plasma Enhanced Chemical Vapor Deposition) And the passivation layer 3 is formed. The passivation layer 3 is formed to sufficiently cover the effective display area AA including the organic light emitting diode elements 2. [ However, the passivation layer 3 should not be formed in the formation area of the pad part 4 to be in contact with the driver IC (Integrated Circuit) or the FPC (Flexible Printed Circuit), that is, the pad area PA. To this end, a mask 5 is required to prevent the passivation layer 3 from being deposited on the pad region PA when the passivation layer 3 is formed.

In the sealing step, the space between the passivation layer 3 and the sealing substrate 7 is filled with a face sealing film 6 made of an organic material and sealed. Then, in the scribing step, the mother substrate 1 and the sealing substrate 7 are cut in panel units to make individual elements.

However, in the conventional face sealing technique as shown in FIG. 1, many problems arise due to the mask 5, which is inevitably applied for selective deposition of the passivation layer 3.

As an example of such a case, there is a case in which the penetration film failure due to the lifting of the mask 5 or the misalignment of the mask 5 as shown in Fig. 2A, the deterioration of the film quality due to the foreign matter induction of the mask 5 as shown in Fig. Arc generation in the process chamber due to the mask 5, change in the characteristics of the deposition film by the material of the mask 5 as shown in Fig. 2D, and generation of static electricity by the mask 5 as shown in Fig. 2E.

The above-described problems caused by the mask 5 cause a significant drop in yield. Further, since the mask 5 requires an expensive fine aligning system, it requires a large amount of cost to manufacture and maintain expensive equipment, and the tact time due to the micro-alignment process time increase and productivity decrease.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a method of manufacturing an organic light emitting diode (OLED) display device capable of increasing yield and reducing manufacturing cost and time.

According to an aspect of the present invention, there is provided a method of manufacturing an organic light emitting diode display device, comprising: preparing a mother substrate having a plurality of unit panels each having a plurality of effective display areas and pad areas, ; Forming a TFT array and an organic light emitting diode device in each of the effective display areas, and forming a pad part and a sacrificial layer covering the pad part in each of the pad areas; Forming a passivation layer on the entire surface of the mother substrate so as to cover the organic light emitting diode device and the sacrificial layer; Filling the passivation layer and the encapsulation substrate with a face sealing film to seal the panels, and separately cutting the unit panels along scribing lines provided on the mother substrate; Cleaning the stripper to penetrate the sacrificial layer through the passivation layer; And partially removing the passivation layer thereon with the sacrificial layer through a lift-off process to expose the pad portion.

The method of manufacturing an organic light emitting diode display device according to the present invention eliminates high quality defects such as a penetration film, foreign matter, arc generation, static electricity generation, and film characteristic change caused by a mask in a passivation process of an organic light emitting diode device, Can be greatly increased.

Further, the present invention simplifies the passivation equipment configuration through a simple lift-off process, thereby reducing the cost of manufacturing and maintaining the alignment equipment, and significantly enhancing the productivity by simplifying the process.

1 is a schematic view illustrating a method of manufacturing an organic light emitting diode display device using a conventional face sealing technique.
FIG. 2 is a view showing the problems caused by the conventional face sealing technique. FIG.
3 is a view showing an example of a four-chamfered mother substrate in which a plurality of display panels are formed;
FIGS. 4A to 4E are views sequentially illustrating an example of forming an organic light emitting diode display device on a mother substrate as shown in FIG. 3. FIG.
5A to 5C are views showing examples of a thermal evaporation mask capable of simultaneously forming a sacrificial layer together with an organic compound layer of an organic light emitting diode device.
5D is a view showing a thermal evaporation mask capable of forming only an organic compound layer of an organic light emitting diode device.
6A to 6C are cross-sectional views of a sacrificial layer made of a triple layer under the thermal vapor deposition mask of FIGS. 5A to 5C, respectively.
FIG. 7 is a view showing an experimental result comparing microscopic images before and after a cleaning process. FIG.
8A to 8E are views sequentially showing another example of forming an organic light emitting diode display device on a mother substrate as shown in FIG.

Hereinafter, preferred embodiments of the present invention will be described with reference to FIGS. 3 to 8E.

FIG. 3 shows an example of a four-chamfered mother substrate in which a plurality of display panels are formed.

Referring to FIG. 3, four unit panels are formed on the mother substrate, which are individually cut along the scribing lines 100. Each unit panel includes an effective display area AA for displaying an image with light generated from the organic light emitting diode device and a pad (pad) 4 on which a driver IC (Integrated Circuit) or a flexible printed circuit (FPC) Area PA.

4A to 4E sequentially illustrate an example of forming an organic light emitting diode display device on a mother substrate as shown in FIG. Figs. 4A to 4E show cut-away planes of I-I 'of Fig. 3 according to the respective process steps.

The steps of forming the organic light emitting diode device 20 and the sacrificial layer 25 are shown in FIG.

Referring to FIG. 4A, the organic light emitting diode elements 20 are formed in the effective display areas AA of the mother substrate 10, respectively. The organic light emitting diode device 20 includes an anode, a cathode, and an organic compound layer formed therebetween. The organic light emitting diode device 20 further includes a capping layer (CPL) formed on the cathode.

The anode is deposited in the effective display area AA by a sputtering process, and is then patterned pixel by pixel through a photolithography process and an etching process. The anode can be contacted with a TFT array (Thin Film Transistor Array) underneath through the contact hole. The TFT array may include a gate line, a data line, a driving TFT, a switching TFT, a storage capacitor, an insulating layer, and the like formed through a photolithography process and an etching process.

The organic compound layer may be a hole injection layer (HIL) sequentially formed on the anode of the effective display area AA by a thermal evaporation process using a thermal evaporation mask of at least one of FIGS. 5A to 5D, A hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL). Between the anode and the organic compound layer, a bank pattern and a spacer for partitioning between neighboring pixels can be formed.

The cathode is deposited by a thermal evaporation process on the organic compound layer in the effective display area AA. A capping layer (CPL) is deposited on the cathode by a thermal deposition process. The capping layer CPL serves to protect the organic light emitting diode device 20 from plasma damage in the process of forming a passivation layer 30 to be described later and to buffer the stress between the passivation layer 30 and the organic light emitting diode device 20 .

A pad portion 40 and a sacrificial layer 25 covering the pad portion 40 are formed in the pad regions PA of the mother substrate 10, respectively. The pad portion 40 may be formed in the manufacturing process of the TFT array. The sacrificial layer 25 is formed together with the organic compound layer in the process of manufacturing the organic compound layer. The sacrificial layer 25 may be formed through a thermal evaporation mask of any one of FIGS. 5A to 5C. By the thermal evaporation process, the hole injection layer, the hole transport layer, the light emitting layer, the electron transport layer, Or more. 5A to 5C can be easily achieved by modification to the conventional thermal evaporation mask as shown in FIG. 5D.

The process of forming the passivation layer 30 is shown in FIG.

4B, a PVD (Physical Vapor Deposition) process such as sputtering or a PECVD (Plasma Enhanced Chemical Vapor Deposition) process such as a sputtering process is performed on the mother substrate 10 on which the organic light emitting diode device 20 and the sacrifice layer 25 are formed A passivation layer 30 of an inorganic material is deposited. The passivation layer 30 is formed in the entire region of the mother substrate 10 so as to cover both the organic light emitting diode device 20 and the sacrificial layer 25. Therefore, the present invention eliminates the conventional metal mask when forming the passivation layer 30, thereby eliminating the conventional problems due to the metal mask.

The deposition density of the passivation layer 30 is much lower on the sacrificial layer 25 compared to other regions and the interface between the passivation layer 30 and the sacrificial layer 25 becomes very unstable. This is because the sacrifice layer 25 is not covered with the capping layer (CPL) or the cathode and is made of only the organic compound layer which is vulnerable to the plasma damage, so that the sacrifice layer 25 is damaged by the plasma during the deposition of the passivation layer 30 to be. As the deposition density of the passivation layer 30 is low or the interface between the passivation layer 30 and the sacrificial layer 25 is unstable, penetration of the stripper in the cleaning process will be facilitated.

The encapsulation and scribing process is shown in Figure 4c.

4C, a temperature is applied to an organic material face sealing film 50 sandwiched between the passivation layer 30 and the sealing substrate 60 to seal the space between the passivation layer 30 and the sealing substrate 60 to the face sealing film 50. [ (6), thereby sealing the display panels on the mother substrate (10). Subsequently, the mother substrate 10 is cut along the scribing lines 100, and individual elements are formed on a panel basis.

The cleaning and lift-off processes are shown in Figs. 4D and 4E, respectively.

Referring to FIG. 4D, a cleaning process is performed using an ultrasonic cleaner or the like. During the cleaning process, the stripper is easily penetrated to the interface of the passivation layer 30 with a lower deposition density on the sacrificial layer 25. [ Such a stripper may be selected as DI water. Alternatively, the stripper may be selected as an organic solvent capable of penetrating the interface of the passivation layer 30 and melting a part or the whole of the sacrificial layer 25 under the passivation layer 30.

Referring to FIG. 4E, a lift-off process is performed by the stripper penetrated into the interface of the passivation layer 30. Due to the lift-off process, the passivation layer 30 'on the sacrificial layer 25 is easily removed to expose the pad portion 40 in the pad region PA.

5A to 5C show examples of a thermal evaporation mask capable of simultaneously forming the sacrificial layer 25 together with the organic compound layer of the organic light emitting diode device 20. [ 5D shows a thermal evaporation mask capable of forming only the organic compound layer of the organic light-emitting diode device 20. Fig. 6A to 6C show cross sections of a sacrificial layer 25 consisting of a triple layer under the thermal vapor deposition mask of FIGS. 5A to 5C, respectively.

As described above, the organic compound layer of the organic light emitting diode device 20 is composed of five layers (HIL, HTL, EML, ETL, EIL) individually deposited through five process chambers. And, the sacrificial layer 25 may include at least one layer that is relatively vulnerable to plasma damage among the five layers. 5A to 5C in the case where the organic compound layer and the sacrifice layer 25 of the organic light emitting diode device 20 are formed at the same time, 5D can be selected. For example, when the material of the sacrifice layer 25 is selected as a triple layer of a hole transport layer (HTL), a light emitting layer (EML) and an electron transport layer (ETL), the triple layer (HTL, EML, ETL) The organic compound layer of the organic light emitting diode device 20 and the sacrifice layer 25 of the organic light emitting diode device 20 are formed at the same time .

The thermal deposition mask of FIG. 5A includes first openings OP1 that are aligned to expose effective display areas AA of the mother substrate 10 and second openings OP2 that expose the pad areas PA of the mother substrate 10 And second openings OP2 aligned so as to be non-overlapping with the scribing lines 100 in the horizontal (X) and vertical (Y) directions of the mother substrate 10. The width X of the second opening OP2 may be substantially equal to or not the same as the width X of the first opening OP1.

The cross section of the sacrificial layer 25 formed by the thermal evaporation mask as shown in FIG. 5A is the same as that of FIG. 6A. The thermal vapor deposition mask as shown in Fig. 5A is advantageous for fabrication. However, since the side surface of the sacrificial layer 25 is not exposed to the outside as shown in FIG. 6A, penetration of the stripper is difficult as compared with FIGS. 5B and 5C.

5B has first openings OP1 aligned to expose the effective display areas AA of the mother substrate 10 and second openings OP2 aligned to expose the pad areas PA of the mother substrate 10 And second openings OP2 aligned so as to overlap with the scribing lines 100 in the vertical (Y) direction of the mother substrate 10. The width X of the second opening OP2 is greater than the width X of the first opening OP1. The second opening OP2 is common to neighboring unit panels in the lateral (X) direction.

The cross section of the sacrificial layer 25 formed by the thermal vapor deposition mask shown in FIG. 5B is the same as FIG. 6B. 5B, since the side surface of the sacrificial layer 25 is exposed to the outside as shown in FIG. 6B, penetration of the stripper is facilitated, and the lift-off process becomes easier. However, since the robustness of the mask is deteriorated, fabrication is not easy.

The thermal vapor deposition mask of FIG. 5C includes two kinds of masks for facilitating mask fabrication and facilitating penetration of the stripper. The mask A is substantially the same as in Fig. 5A. The mask B exposes the first openings OP1 and the pad areas PA of the mother substrate 10 which are aligned to expose the effective display areas AA of the mother substrate 10, And third openings OP3 aligned to overlap with the scribing lines 100 in the vertical (Y) direction of the substrate 10. The width X of the third opening OP3 is smaller than the width X of the first opening OP1. When the mask A and the mask B are overlapped, an effect similar to that of FIG. 5B is created by the second openings OP2 and the third openings OP3.

The cross section of the sacrificial layer 25 formed by the thermal evaporation masks as shown in FIG. 5C is shown in FIG. 6C. 5C, since the sacrificial layer 25 is partially exposed to the outside as shown in FIG. 6C, the penetration of the stripper is facilitated, thereby facilitating the lift-off process, while maintaining the firmness of the mask.

5D contains only the openings OP aligned to expose the effective display areas AA of the mother substrate 10.

Fig. 7 shows experimental results comparing microscopic images before and after the cleaning process.

Referring to FIG. 7, it can be seen that the difference between the sacrificial layer deposition region and the sacrificial layer non-deposition region becomes more conspicuous compared to the cleaning before cleaning as a result of comparing the optical microscope image after cleaning. Through this, it was found that the lift-off process in the sacrificial layer deposition region proceeded smoothly.

Further, when observed with a PL (Photoluminescence) microscope, light emission was observed in the sacrificial layer deposition region before cleaning, but no light emission was observed after cleaning. Through this, it was found that the lift-off process in the sacrificial layer deposition region proceeded smoothly.

8A to 8E sequentially show another example for forming the organic light emitting diode display device on the mother substrate as shown in FIG. Figs. 8A to 8E show cut-away planes of I-I 'in Fig. 3 according to the respective process steps.

8A to 8E, the remaining process steps except for the material of the sacrifice layer 125 and the mask for forming the sacrifice layer 125 are similar to those described in Figs. 4A to 4E.

The sacrificial layer 125 may be formed together with the TFT array in the manufacturing process of the TFT array, unlike in Figs. 4A to 4E. The sacrificial layer 125 may be selected as the photoresist used in the photolithographic process of the TFT array. Then, the mask for forming the sacrifice layer 125 can be easily formed by deforming the mask used in the photolithography process of the TFT array (exposing the pad area without blocking).

As described above, the method for fabricating an organic light emitting diode display device according to the present invention is a method for fabricating an organic light emitting diode display device, such as a penetration film, foreign matter, arc generation, It is possible to greatly improve the yield by eliminating poor quality defects.

Further, the present invention simplifies the passivation equipment configuration through a simple lift-off process, thereby reducing the cost of manufacturing and maintaining the alignment equipment, and significantly enhancing the productivity by simplifying the process.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

10: mother substrate 20: organic light emitting diode element
25, 125: sacrificial layer 30: passivation layer
40: pad part 50: face sealing film
60: sealing substrate

Claims (10)

Preparing a mother substrate if a plurality of unit panels each having a plurality of effective display areas and pad areas are to be formed;
Forming a TFT array and an organic light emitting diode device in each of the effective display areas, and forming a pad part and a sacrificial layer covering the pad part in each of the pad areas;
Forming a passivation layer on the entire surface of the mother substrate so as to cover the organic light emitting diode device and the sacrificial layer;
Filling the passivation layer and the encapsulation substrate with a face sealing film to seal the panels, and separately cutting the unit panels along scribing lines provided on the mother substrate;
Cleaning the stripper to penetrate the sacrificial layer through the passivation layer; And
And partially removing the passivation layer on the passivation layer with the sacrificial layer through a lift-off process to expose the pad portion. The method according to claim 1,
The sacrificial layer is formed together with the organic compound layer in the process of manufacturing the organic light emitting diode device;
Wherein the sacrificial layer includes at least one layer that is relatively vulnerable to plasma damage among the hole injecting layer, the hole transporting layer, the light emitting layer, the electron transporting layer, and the electron injecting layer. 3. The method of claim 2,
Wherein the passivation layer is deposited by a PVD (Physical Vapor Deposition) process or a PECVD (Plasma Enhanced Chemical Vapor Deposition) process. The method of claim 3,
Due to the reaction with the sacrificial layer, the deposition density of the passivation layer is lower on the sacrificial layer than on other regions, or the interface between the passivation layer and the sacrificial layer becomes more unstable;
Wherein the passivation layer has a low deposition density or the interface is unstable so that penetration of the stripper becomes easier. 5. The method of claim 4,
Wherein the organic light emitting diode device further comprises a capping layer formed at an interface with the passivation layer so as to be protected from the plasma damage. The method according to claim 1,
Wherein the stripper is selected from the group consisting of deionized water or an organic solvent capable of penetrating the interface of the passivation layer to dissolve some or all of the sacrificial layer. 3. The method of claim 2,
In the thermal evaporation mask for forming the sacrificial layer,
First openings aligned to expose the effective display areas;
And second openings exposing the pad regions and being aligned so as not to overlap with the scribing lines in the horizontal and vertical directions of the mother substrate. 3. The method of claim 2,
In the thermal evaporation mask for forming the sacrificial layer,
First openings aligned to expose the effective display areas;
And second openings exposing the pad regions and being aligned to overlap the vertical scribing lines of the mother substrate;
Wherein the width of the second openings is greater than the width of the first openings and each of the second openings is shared by neighboring unit panels in the transverse direction. 3. The method of claim 2,
Wherein the thermal deposition mask for forming the sacrificial layer has a first mask and a second mask;
The first mask may include first openings that are aligned to expose the effective display areas, and second openings that expose the pad areas and are aligned so as not to overlap the scribing lines in the horizontal and vertical directions of the mother substrate. The second openings being made of a material selected from the group consisting of:
The second mask may include first openings that are aligned to expose the effective display areas and third openings that are aligned to overlap the vertical scribing lines of the mother substrate, Wherein the width of the third openings is smaller than the width of the first openings. ≪ Desc / Clms Page number 19 > The method according to claim 1,
Wherein the sacrificial layer is formed with the TFT array in the fabrication of the TFT array;
Wherein the sacrificial layer is selected as a photoresist used in a photolithography process for the TFT array.

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