KR20150127627A - 신호 비교 전압 범위를 확장하기 위한 회로 및 방법 - Google Patents

신호 비교 전압 범위를 확장하기 위한 회로 및 방법 Download PDF

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Publication number
KR20150127627A
KR20150127627A KR1020157026136A KR20157026136A KR20150127627A KR 20150127627 A KR20150127627 A KR 20150127627A KR 1020157026136 A KR1020157026136 A KR 1020157026136A KR 20157026136 A KR20157026136 A KR 20157026136A KR 20150127627 A KR20150127627 A KR 20150127627A
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KR
South Korea
Prior art keywords
coupled
transistor
voltage
circuit
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020157026136A
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English (en)
Korean (ko)
Inventor
제레미 마크 골드블랫
Original Assignee
퀄컴 인코포레이티드
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Filing date
Publication date
Application filed by 퀄컴 인코포레이티드 filed Critical 퀄컴 인코포레이티드
Publication of KR20150127627A publication Critical patent/KR20150127627A/ko
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/35613Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/012Modifications of generator to improve response time or to decrease power consumption
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008Arrangements for reducing power consumption
    • H03K19/0016Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • H03K3/35613Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration
    • H03K3/356139Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration with synchronous operation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/2481Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2472Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
    • H03K5/249Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors using clock signals

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
KR1020157026136A 2013-03-12 2014-03-07 신호 비교 전압 범위를 확장하기 위한 회로 및 방법 Withdrawn KR20150127627A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/797,645 2013-03-12
US13/797,645 US9356586B2 (en) 2013-03-12 2013-03-12 Circuit and method to extend a signal comparison voltage range
PCT/US2014/021835 WO2014164311A1 (en) 2013-03-12 2014-03-07 Circuit and method to extend a signal comparison voltage range

Publications (1)

Publication Number Publication Date
KR20150127627A true KR20150127627A (ko) 2015-11-17

Family

ID=50390275

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020157026136A Withdrawn KR20150127627A (ko) 2013-03-12 2014-03-07 신호 비교 전압 범위를 확장하기 위한 회로 및 방법

Country Status (6)

Country Link
US (2) US9356586B2 (enExample)
EP (1) EP2974015B1 (enExample)
JP (1) JP2016510201A (enExample)
KR (1) KR20150127627A (enExample)
CN (1) CN105009451B (enExample)
WO (1) WO2014164311A1 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9356586B2 (en) * 2013-03-12 2016-05-31 Qualcomm Incorporated Circuit and method to extend a signal comparison voltage range
US11115022B2 (en) * 2015-05-07 2021-09-07 Northwestern University System and method for integrated circuit usage tracking circuit with fast tracking time for hardware security and re-configurability
US10181861B1 (en) * 2017-12-29 2019-01-15 Texas Instruments Incorporated Reference voltage control circuit for a two-step flash analog-to-digital converter
CN108345565B (zh) * 2018-01-22 2023-05-23 京微齐力(北京)科技有限公司 一种控制外接电源输出的可编程电路及其方法
US10355693B1 (en) * 2018-03-14 2019-07-16 Qualcomm Incorporated Extended GPIO (eGPIO)
US10969416B2 (en) * 2018-12-13 2021-04-06 Silicon Laboratories Inc. System and method of duplicate circuit block swapping for noise reduction
KR102714233B1 (ko) * 2019-04-05 2024-10-08 에스케이하이닉스 시스템아이씨 (우시) 씨오엘티디 불휘발성 메모리 장치의 동적 전압 공급 회로 및 이를 포함하는 불휘발성 메모리 장치

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4047059A (en) * 1976-05-24 1977-09-06 Rca Corporation Comparator circuit
US5583457A (en) 1992-04-14 1996-12-10 Hitachi, Ltd. Semiconductor integrated circuit device having power reduction mechanism
JP3561012B2 (ja) * 1994-11-07 2004-09-02 株式会社ルネサステクノロジ 半導体集積回路装置
US6181165B1 (en) * 1998-03-09 2001-01-30 Siemens Aktiengesellschaft Reduced voltage input/reduced voltage output tri-state buffers
US6353342B1 (en) * 2000-10-30 2002-03-05 Intel Corporation Integrated circuit bus architecture including a full-swing, clocked, common-gate receiver for fast on-chip signal transmission
JP3874247B2 (ja) 2001-12-25 2007-01-31 株式会社ルネサステクノロジ 半導体集積回路装置
US6593801B1 (en) 2002-06-07 2003-07-15 Pericom Semiconductor Corp. Power down mode signaled by differential transmitter's high-Z state detected by receiver sensing same voltage on differential lines
US20040263213A1 (en) * 2003-06-26 2004-12-30 Oliver Kiehl Current source
US7138825B2 (en) 2004-06-29 2006-11-21 International Business Machines Corporation Charge recycling power gate
WO2006034371A2 (en) 2004-09-20 2006-03-30 The Trustees Of Columbia University In The City Of New York Low voltage operational transconductance amplifier circuits
US7221190B2 (en) 2005-03-14 2007-05-22 Texas Instruments Incorporated Differential comparator with extended common mode voltage range
TWI470939B (zh) * 2009-11-04 2015-01-21 Pixart Imaging Inc 類比至數位轉換器及其相關之校準比較器
JP2012227588A (ja) * 2011-04-15 2012-11-15 Fujitsu Semiconductor Ltd 比較回路及びアナログデジタル変換回路
US9356586B2 (en) 2013-03-12 2016-05-31 Qualcomm Incorporated Circuit and method to extend a signal comparison voltage range

Also Published As

Publication number Publication date
JP2016510201A (ja) 2016-04-04
US20160248407A1 (en) 2016-08-25
WO2014164311A1 (en) 2014-10-09
US9722585B2 (en) 2017-08-01
CN105009451B (zh) 2017-10-24
US9356586B2 (en) 2016-05-31
EP2974015A1 (en) 2016-01-20
US20140266307A1 (en) 2014-09-18
CN105009451A (zh) 2015-10-28
EP2974015B1 (en) 2020-09-02

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Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20150922

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid