CN105009451B - 用于扩展信号比较电压范围的电路和方法 - Google Patents
用于扩展信号比较电压范围的电路和方法 Download PDFInfo
- Publication number
- CN105009451B CN105009451B CN201480012397.4A CN201480012397A CN105009451B CN 105009451 B CN105009451 B CN 105009451B CN 201480012397 A CN201480012397 A CN 201480012397A CN 105009451 B CN105009451 B CN 105009451B
- Authority
- CN
- China
- Prior art keywords
- transistor
- coupled
- voltage
- node
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
- H03K3/35613—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/012—Modifications of generator to improve response time or to decrease power consumption
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
- H03K3/35613—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration
- H03K3/356139—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit the input circuit having a differential configuration with synchronous operation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
- H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
- H03K5/249—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors using clock signals
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Manipulation Of Pulses (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/797,645 | 2013-03-12 | ||
| US13/797,645 US9356586B2 (en) | 2013-03-12 | 2013-03-12 | Circuit and method to extend a signal comparison voltage range |
| PCT/US2014/021835 WO2014164311A1 (en) | 2013-03-12 | 2014-03-07 | Circuit and method to extend a signal comparison voltage range |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105009451A CN105009451A (zh) | 2015-10-28 |
| CN105009451B true CN105009451B (zh) | 2017-10-24 |
Family
ID=50390275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201480012397.4A Expired - Fee Related CN105009451B (zh) | 2013-03-12 | 2014-03-07 | 用于扩展信号比较电压范围的电路和方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US9356586B2 (enExample) |
| EP (1) | EP2974015B1 (enExample) |
| JP (1) | JP2016510201A (enExample) |
| KR (1) | KR20150127627A (enExample) |
| CN (1) | CN105009451B (enExample) |
| WO (1) | WO2014164311A1 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9356586B2 (en) * | 2013-03-12 | 2016-05-31 | Qualcomm Incorporated | Circuit and method to extend a signal comparison voltage range |
| US11115022B2 (en) * | 2015-05-07 | 2021-09-07 | Northwestern University | System and method for integrated circuit usage tracking circuit with fast tracking time for hardware security and re-configurability |
| US10181861B1 (en) * | 2017-12-29 | 2019-01-15 | Texas Instruments Incorporated | Reference voltage control circuit for a two-step flash analog-to-digital converter |
| CN108345565B (zh) * | 2018-01-22 | 2023-05-23 | 京微齐力(北京)科技有限公司 | 一种控制外接电源输出的可编程电路及其方法 |
| US10355693B1 (en) * | 2018-03-14 | 2019-07-16 | Qualcomm Incorporated | Extended GPIO (eGPIO) |
| US10969416B2 (en) * | 2018-12-13 | 2021-04-06 | Silicon Laboratories Inc. | System and method of duplicate circuit block swapping for noise reduction |
| KR102714233B1 (ko) * | 2019-04-05 | 2024-10-08 | 에스케이하이닉스 시스템아이씨 (우시) 씨오엘티디 | 불휘발성 메모리 장치의 동적 전압 공급 회로 및 이를 포함하는 불휘발성 메모리 장치 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010040834A1 (en) * | 1994-11-07 | 2001-11-15 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit device having a hierarchical power source configuration |
| CN1143314C (zh) * | 1998-03-09 | 2004-03-24 | 西门子公司 | 降低输入电压/降低输出电压的三态缓冲器及其方法 |
| US20050285628A1 (en) * | 2004-06-29 | 2005-12-29 | International Business Machines Corporation | Charge recycling power gate |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4047059A (en) * | 1976-05-24 | 1977-09-06 | Rca Corporation | Comparator circuit |
| US5583457A (en) | 1992-04-14 | 1996-12-10 | Hitachi, Ltd. | Semiconductor integrated circuit device having power reduction mechanism |
| US6353342B1 (en) * | 2000-10-30 | 2002-03-05 | Intel Corporation | Integrated circuit bus architecture including a full-swing, clocked, common-gate receiver for fast on-chip signal transmission |
| JP3874247B2 (ja) | 2001-12-25 | 2007-01-31 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| US6593801B1 (en) | 2002-06-07 | 2003-07-15 | Pericom Semiconductor Corp. | Power down mode signaled by differential transmitter's high-Z state detected by receiver sensing same voltage on differential lines |
| US20040263213A1 (en) * | 2003-06-26 | 2004-12-30 | Oliver Kiehl | Current source |
| WO2006034371A2 (en) | 2004-09-20 | 2006-03-30 | The Trustees Of Columbia University In The City Of New York | Low voltage operational transconductance amplifier circuits |
| US7221190B2 (en) | 2005-03-14 | 2007-05-22 | Texas Instruments Incorporated | Differential comparator with extended common mode voltage range |
| TWI470939B (zh) * | 2009-11-04 | 2015-01-21 | Pixart Imaging Inc | 類比至數位轉換器及其相關之校準比較器 |
| JP2012227588A (ja) * | 2011-04-15 | 2012-11-15 | Fujitsu Semiconductor Ltd | 比較回路及びアナログデジタル変換回路 |
| US9356586B2 (en) | 2013-03-12 | 2016-05-31 | Qualcomm Incorporated | Circuit and method to extend a signal comparison voltage range |
-
2013
- 2013-03-12 US US13/797,645 patent/US9356586B2/en not_active Expired - Fee Related
-
2014
- 2014-03-07 KR KR1020157026136A patent/KR20150127627A/ko not_active Withdrawn
- 2014-03-07 JP JP2016500858A patent/JP2016510201A/ja active Pending
- 2014-03-07 EP EP14713717.8A patent/EP2974015B1/en not_active Not-in-force
- 2014-03-07 CN CN201480012397.4A patent/CN105009451B/zh not_active Expired - Fee Related
- 2014-03-07 WO PCT/US2014/021835 patent/WO2014164311A1/en not_active Ceased
-
2016
- 2016-05-03 US US15/144,929 patent/US9722585B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010040834A1 (en) * | 1994-11-07 | 2001-11-15 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit device having a hierarchical power source configuration |
| CN1143314C (zh) * | 1998-03-09 | 2004-03-24 | 西门子公司 | 降低输入电压/降低输出电压的三态缓冲器及其方法 |
| US20050285628A1 (en) * | 2004-06-29 | 2005-12-29 | International Business Machines Corporation | Charge recycling power gate |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2016510201A (ja) | 2016-04-04 |
| US20160248407A1 (en) | 2016-08-25 |
| WO2014164311A1 (en) | 2014-10-09 |
| US9722585B2 (en) | 2017-08-01 |
| US9356586B2 (en) | 2016-05-31 |
| KR20150127627A (ko) | 2015-11-17 |
| EP2974015A1 (en) | 2016-01-20 |
| US20140266307A1 (en) | 2014-09-18 |
| CN105009451A (zh) | 2015-10-28 |
| EP2974015B1 (en) | 2020-09-02 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20171024 Termination date: 20210307 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |