KR20150008441A - 리셋 조건 트레이스 기능들을 갖춘 프로세서 디바이스 - Google Patents

리셋 조건 트레이스 기능들을 갖춘 프로세서 디바이스 Download PDF

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Publication number
KR20150008441A
KR20150008441A KR20147033969A KR20147033969A KR20150008441A KR 20150008441 A KR20150008441 A KR 20150008441A KR 20147033969 A KR20147033969 A KR 20147033969A KR 20147033969 A KR20147033969 A KR 20147033969A KR 20150008441 A KR20150008441 A KR 20150008441A
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KR
South Korea
Prior art keywords
trace
reset
information
reset signal
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
KR20147033969A
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English (en)
Korean (ko)
Inventor
저스틴 밀크스
토마스 에드워드 페르메
순다르 발라수브라마니안
쿠샬라 자바갈
Original Assignee
마이크로칩 테크놀로지 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 마이크로칩 테크놀로지 인코포레이티드 filed Critical 마이크로칩 테크놀로지 인코포레이티드
Publication of KR20150008441A publication Critical patent/KR20150008441A/ko
Abandoned legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3648—Debugging of software using additional hardware
    • G06F11/3656—Debugging of software using additional hardware using a specific debug interface

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)
KR20147033969A 2012-05-07 2013-05-07 리셋 조건 트레이스 기능들을 갖춘 프로세서 디바이스 Abandoned KR20150008441A (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201261643725P 2012-05-07 2012-05-07
US61/643,725 2012-05-07
PCT/US2013/039934 WO2013169766A1 (en) 2012-05-07 2013-05-07 Processor device with reset condition trace capabilities

Publications (1)

Publication Number Publication Date
KR20150008441A true KR20150008441A (ko) 2015-01-22

Family

ID=48570432

Family Applications (1)

Application Number Title Priority Date Filing Date
KR20147033969A Abandoned KR20150008441A (ko) 2012-05-07 2013-05-07 리셋 조건 트레이스 기능들을 갖춘 프로세서 디바이스

Country Status (6)

Country Link
US (1) US9298570B2 (enExample)
EP (1) EP2847682B1 (enExample)
JP (1) JP6220863B2 (enExample)
KR (1) KR20150008441A (enExample)
CN (1) CN104380266B (enExample)
WO (1) WO2013169766A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150019775A1 (en) * 2013-03-14 2015-01-15 Microchip Technology Incorporated Single Wire Programming and Debugging Interface
US20160103722A1 (en) * 2014-10-10 2016-04-14 Qualcomm Incorporated Hardware lockup detection mechanism for user devices
US9690727B2 (en) * 2014-10-31 2017-06-27 Atmel Corporation System internal latency measurements in realtime applications
US10534688B2 (en) * 2016-09-30 2020-01-14 Intel Corporation Trace hub logic with automatic event triggering
US10754759B1 (en) * 2018-02-05 2020-08-25 Xilinx, Inc. Breakpointing circuitry that evaluates breakpoint conditions while running clock to target circuit
US20190370016A1 (en) * 2018-05-31 2019-12-05 Hamilton Sundstrand Corporation Auto detection of jtag debuggers/emulators
CN109117362B (zh) * 2018-06-26 2020-08-25 华东师范大学 一种基于中间语言的plc程序验证系统
EP3661056B1 (en) * 2018-11-27 2022-05-25 STMicroelectronics Application GmbH Processing system, related integrated circuit, device and method
CN110032482A (zh) * 2019-04-11 2019-07-19 盛科网络（苏州）有限公司 片上调试装置和方法
WO2021173230A1 (en) 2020-02-27 2021-09-02 Microchip Technology Incorporated Synchronization of sequence numbers in a network
US11442805B1 (en) * 2021-03-03 2022-09-13 Siliconch Systems Pvt Ltd System and method for debugging microcontroller using low-bandwidth real-time trace
US12393505B2 (en) * 2023-01-17 2025-08-19 Stmicroelectronics International N.V. Reset circuitry providing independent reset signal for trace and debug logic

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0736735A (ja) * 1993-07-22 1995-02-07 Agency Of Ind Science & Technol デバッグ装置
CN1279449C (zh) * 1994-12-28 2006-10-11 株式会社东芝 微处理器
US5825706A (en) * 1997-10-27 1998-10-20 Motorola, Inc. Circuit and method for retaining data in DRAM in a portable electronic device
US6792527B1 (en) * 2000-12-22 2004-09-14 Xilinx, Inc. Method to provide hierarchical reset capabilities for a configurable system on a chip
US7051197B2 (en) * 2002-11-22 2006-05-23 Texas Instruments Incorporated Tracing through reset
US7237151B2 (en) * 2002-12-17 2007-06-26 Texas Instruments Incorporated Apparatus and method for trace stream identification of a processor reset
JP2006011991A (ja) * 2004-06-29 2006-01-12 Meidensha Corp コンピュータ制御装置およびこのソフトウェア実行記録方式
CN100401267C (zh) * 2006-09-01 2008-07-09 上海大学 微处理器的片上动态跟踪方法
JP2008129669A (ja) * 2006-11-17 2008-06-05 Meidensha Corp ハードウェア異常記録装置及びハードウェア異常記録方法
JP2008276324A (ja) * 2007-04-25 2008-11-13 Kyocera Mita Corp リセット装置及び当該リセット装置を備えた画像形成装置
US7681078B2 (en) * 2007-05-18 2010-03-16 Freescale Semiconductor, Inc. Debugging a processor through a reset event
JP5533097B2 (ja) * 2010-03-18 2014-06-25 株式会社リコー 情報処理装置、画像形成装置及び情報処理プログラム

Also Published As

Publication number Publication date
EP2847682B1 (en) 2019-07-03
EP2847682A1 (en) 2015-03-18
JP6220863B2 (ja) 2017-10-25
US9298570B2 (en) 2016-03-29
US20130297974A1 (en) 2013-11-07
JP2015516637A (ja) 2015-06-11
CN104380266B (zh) 2017-07-18
WO2013169766A1 (en) 2013-11-14
CN104380266A (zh) 2015-02-25

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Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20141203

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
A201 Request for examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20180424

Comment text: Request for Examination of Application

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20190926

PC1904 Unpaid initial registration fee