CN104380266B - 具有复位条件跟踪能力的处理器装置 - Google Patents
具有复位条件跟踪能力的处理器装置 Download PDFInfo
- Publication number
- CN104380266B CN104380266B CN201380031912.9A CN201380031912A CN104380266B CN 104380266 B CN104380266 B CN 104380266B CN 201380031912 A CN201380031912 A CN 201380031912A CN 104380266 B CN104380266 B CN 104380266B
- Authority
- CN
- China
- Prior art keywords
- reset
- trace
- module
- processor device
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Prevention of errors by analysis, debugging or testing of software
- G06F11/362—Debugging of software
- G06F11/3636—Debugging of software by tracing the execution of the program
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Prevention of errors by analysis, debugging or testing of software
- G06F11/362—Debugging of software
- G06F11/3648—Debugging of software using additional hardware
- G06F11/3656—Debugging of software using additional hardware using a specific debug interface
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
- Microcomputers (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201261643725P | 2012-05-07 | 2012-05-07 | |
| US61/643,725 | 2012-05-07 | ||
| PCT/US2013/039934 WO2013169766A1 (en) | 2012-05-07 | 2013-05-07 | Processor device with reset condition trace capabilities |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104380266A CN104380266A (zh) | 2015-02-25 |
| CN104380266B true CN104380266B (zh) | 2017-07-18 |
Family
ID=48570432
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201380031912.9A Active CN104380266B (zh) | 2012-05-07 | 2013-05-07 | 具有复位条件跟踪能力的处理器装置 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9298570B2 (enExample) |
| EP (1) | EP2847682B1 (enExample) |
| JP (1) | JP6220863B2 (enExample) |
| KR (1) | KR20150008441A (enExample) |
| CN (1) | CN104380266B (enExample) |
| WO (1) | WO2013169766A1 (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20150019775A1 (en) * | 2013-03-14 | 2015-01-15 | Microchip Technology Incorporated | Single Wire Programming and Debugging Interface |
| US20160103722A1 (en) * | 2014-10-10 | 2016-04-14 | Qualcomm Incorporated | Hardware lockup detection mechanism for user devices |
| US9690727B2 (en) * | 2014-10-31 | 2017-06-27 | Atmel Corporation | System internal latency measurements in realtime applications |
| US10534688B2 (en) * | 2016-09-30 | 2020-01-14 | Intel Corporation | Trace hub logic with automatic event triggering |
| US10754759B1 (en) * | 2018-02-05 | 2020-08-25 | Xilinx, Inc. | Breakpointing circuitry that evaluates breakpoint conditions while running clock to target circuit |
| US20190370016A1 (en) * | 2018-05-31 | 2019-12-05 | Hamilton Sundstrand Corporation | Auto detection of jtag debuggers/emulators |
| CN109117362B (zh) * | 2018-06-26 | 2020-08-25 | 华东师范大学 | 一种基于中间语言的plc程序验证系统 |
| EP3661056B1 (en) * | 2018-11-27 | 2022-05-25 | STMicroelectronics Application GmbH | Processing system, related integrated circuit, device and method |
| CN110032482A (zh) * | 2019-04-11 | 2019-07-19 | 盛科网络(苏州)有限公司 | 片上调试装置和方法 |
| WO2021173230A1 (en) | 2020-02-27 | 2021-09-02 | Microchip Technology Incorporated | Synchronization of sequence numbers in a network |
| US11442805B1 (en) * | 2021-03-03 | 2022-09-13 | Siliconch Systems Pvt Ltd | System and method for debugging microcontroller using low-bandwidth real-time trace |
| US12393505B2 (en) * | 2023-01-17 | 2025-08-19 | Stmicroelectronics International N.V. | Reset circuitry providing independent reset signal for trace and debug logic |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1133455A (zh) * | 1994-12-28 | 1996-10-16 | 株式会社东芝 | 微处理器与调试系统 |
| US20040103271A1 (en) * | 2002-11-22 | 2004-05-27 | Manisha Agarwala | Tracing through reset |
| US20040153814A1 (en) * | 2002-12-17 | 2004-08-05 | Swoboda Gary L. | Apparatus and method for trace stream identification of a processor reset |
| CN1912849A (zh) * | 2006-09-01 | 2007-02-14 | 上海大学 | 微处理器的片上动态跟踪方法 |
| US20080288808A1 (en) * | 2007-05-18 | 2008-11-20 | Moyer William C | Debugging a processor through a reset event |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0736735A (ja) * | 1993-07-22 | 1995-02-07 | Agency Of Ind Science & Technol | デバッグ装置 |
| US5825706A (en) * | 1997-10-27 | 1998-10-20 | Motorola, Inc. | Circuit and method for retaining data in DRAM in a portable electronic device |
| US6792527B1 (en) * | 2000-12-22 | 2004-09-14 | Xilinx, Inc. | Method to provide hierarchical reset capabilities for a configurable system on a chip |
| JP2006011991A (ja) * | 2004-06-29 | 2006-01-12 | Meidensha Corp | コンピュータ制御装置およびこのソフトウェア実行記録方式 |
| JP2008129669A (ja) * | 2006-11-17 | 2008-06-05 | Meidensha Corp | ハードウェア異常記録装置及びハードウェア異常記録方法 |
| JP2008276324A (ja) * | 2007-04-25 | 2008-11-13 | Kyocera Mita Corp | リセット装置及び当該リセット装置を備えた画像形成装置 |
| JP5533097B2 (ja) * | 2010-03-18 | 2014-06-25 | 株式会社リコー | 情報処理装置、画像形成装置及び情報処理プログラム |
-
2013
- 2013-05-07 CN CN201380031912.9A patent/CN104380266B/zh active Active
- 2013-05-07 KR KR20147033969A patent/KR20150008441A/ko not_active Abandoned
- 2013-05-07 JP JP2015511620A patent/JP6220863B2/ja active Active
- 2013-05-07 EP EP13726614.4A patent/EP2847682B1/en active Active
- 2013-05-07 US US13/888,367 patent/US9298570B2/en active Active
- 2013-05-07 WO PCT/US2013/039934 patent/WO2013169766A1/en not_active Ceased
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1133455A (zh) * | 1994-12-28 | 1996-10-16 | 株式会社东芝 | 微处理器与调试系统 |
| US20040103271A1 (en) * | 2002-11-22 | 2004-05-27 | Manisha Agarwala | Tracing through reset |
| US20040153814A1 (en) * | 2002-12-17 | 2004-08-05 | Swoboda Gary L. | Apparatus and method for trace stream identification of a processor reset |
| CN1912849A (zh) * | 2006-09-01 | 2007-02-14 | 上海大学 | 微处理器的片上动态跟踪方法 |
| US20080288808A1 (en) * | 2007-05-18 | 2008-11-20 | Moyer William C | Debugging a processor through a reset event |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2847682B1 (en) | 2019-07-03 |
| EP2847682A1 (en) | 2015-03-18 |
| JP6220863B2 (ja) | 2017-10-25 |
| US9298570B2 (en) | 2016-03-29 |
| US20130297974A1 (en) | 2013-11-07 |
| JP2015516637A (ja) | 2015-06-11 |
| KR20150008441A (ko) | 2015-01-22 |
| WO2013169766A1 (en) | 2013-11-14 |
| CN104380266A (zh) | 2015-02-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104380266B (zh) | 具有复位条件跟踪能力的处理器装置 | |
| US9377507B2 (en) | Processor device with instruction trace capabilities | |
| CN104471545B (zh) | 具有基于中断状态的可配置断点的装置 | |
| US6591369B1 (en) | System and method for communicating with an integrated circuit | |
| US6530047B1 (en) | System and method for communicating with an integrated circuit | |
| US6567932B2 (en) | System and method for communicating with an integrated circuit | |
| US6601189B1 (en) | System and method for communicating with an integrated circuit | |
| KR101365121B1 (ko) | 멀티코어 아키텍쳐의 디버그 | |
| KR20130127477A (ko) | 디버그 상태 기계 및 이를 포함하는 프로세서 | |
| CN103440216A (zh) | 一种通过i2c从设备调试mcu的芯片及方法 | |
| EP1614043B1 (en) | Diagnostic data capture within an integrated circuit | |
| US20030100133A1 (en) | System-on-chip breakpoint synchronization | |
| US7710969B2 (en) | Rapid I/O traffic system | |
| US20060255981A1 (en) | Paced Trace Transmission | |
| US8880958B2 (en) | Interleaved architecture tracing and microarchitecture tracing | |
| US20060256877A1 (en) | Rapid I/O Compliant Message Mapper | |
| US20060268714A1 (en) | Rapid I/O Compliant Congestion Control | |
| US7613951B2 (en) | Scaled time trace |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |