KR20130070857A - Light emitting device and illumination system for using the same - Google Patents

Abstract

PURPOSE: A light emitting device and a lighting system using the same are provided to block magnesium memory effect, by inserting a magnesium barrier layer between a semiconductor layer and a light emitting layer. CONSTITUTION: A light emitting structure (200) is formed on a substrate. A first conduction type semiconductor layer (210) is doped with magnesium. The light emitting structure forms the first conduction type semiconductor layer, a light emitting layer and a second conduction type semiconductor layer in sequence. A magnesium barrier layer (240) is formed between the first conduction type semiconductor layer and the light emitting layer. The magnesium barrier layer includes at least one nitride layer.

Description

LIGHT EMITTING DEVICE AND ILLUMINATION SYSTEM FOR USING THE SAME}

Embodiments relate to a light emitting device and a lighting system using the same.

Light emitting devices, such as light emitting diodes or laser diodes using semiconductors of Group 3-5 or 2-6 compound semiconductor materials, have various colors such as red, green, blue, and ultraviolet light due to the development of thin film growth technology and device materials. It is possible to realize efficient white light by using fluorescent materials or combining colors, and it has low power consumption, semi-permanent life, fast response speed, safety and environmental friendliness compared to conventional light sources such as fluorescent and incandescent lamps. Has an advantage.

Therefore, a transmission module of the optical communication means, a light emitting diode backlight replacing a cold cathode fluorescent lamp (CCFL) constituting a backlight of an LCD (Liquid Crystal Display) display device, a white light emitting element capable of replacing a fluorescent lamp or an incandescent lamp Diode lighting, automotive headlights, and traffic lights.

In such a light emitting diode, when the p-side down structure or the n-side top structure is implemented, a p-type semiconductor layer doped with magnesium (Mg) is positioned under the light emitting layer. The performance of the light emitting layer may be seriously degraded due to the Mg memory effect or the Mg diffusion in which magnesium (Mg) of the p-type semiconductor layer is diffused into the light emitting layer.

Due to these problems, it will be necessary to develop a light emitting device capable of blocking the Mg memory effect or the Mg diffusion to improve luminous efficiency and reliability.

Embodiments provide a light emitting device capable of improving light emission efficiency and reliability by using a nitride layer including indium (In) and an illumination system using the same.

The embodiment includes a substrate, a light emitting structure formed on the substrate, and sequentially formed with a first conductive semiconductor layer, a light emitting layer, and a second conductive semiconductor layer doped with magnesium (Mg), the first conductive semiconductor layer, and the The nitride layer formed between the emission layers and the nitride layer including indium (In) may include a magnesium blocking layer.

Here, the light emitting structure may grow in the Ga-face direction of the substrate.

The magnesium barrier layer is formed by stacking a first nitride layer containing indium (In) having a first content, and a second nitride layer containing indium (In) having a second content, wherein the first content is first. 2 may be more than the content.

In this case, the indium content x of the first nitride layer may be x ≦ 0.05, and the indium content y of the second nitride layer may be x> y.

Subsequently, the first nitride layer and the second nitride layer may be repeatedly stacked several times to several hundred times.

Next, the first nitride layer may be adjacent to the first conductivity type semiconductor layer, and the second nitride layer may be adjacent to the light emitting layer.

An undoped nitride layer may be formed between the first nitride layer and the second nitride layer, wherein the undoped nitride layer is u-In _x Ga _1-x N, 0 ≦ x ≦ 0.05 days. Can be.

Here, the undoped nitride layer may be thinner than at least one of the first nitride layer and the second nitride layer, wherein the ratio of the thickness of the undoped nitride layer and the thickness of the first nitride layer or the second nitride layer is 1: 1. May be between 1.1 and 100.

Subsequently, the undoped nitride layers adjacent to each other may have a different thickness, and the undoped nitride layer may have a nonuniform surface.

Next, the thickness of the first nitride layer and the thickness of the second nitride layer may be different from each other, and the thickness of the first nitride layer may be thicker than the thickness of the second nitride layer.

And, the magnesium blocking layer may be a plurality of layers including In _x Ga _1-x N / In _y Ga _1-y N (x> y, x ≤ 0.05), the magnesium blocking layer is In _x Ga _1-x N ( x ≦ 0.05).

Subsequently, the thickness of the magnesium blocking layer may be 1-50 nm.

In addition, an undoped nitride layer may be formed between at least one of the magnesium blocking layer and the first conductive semiconductor layer and between the magnesium blocking layer and the light emitting layer.

The thickness of the undoped nitride layer formed between the magnesium blocking layer and the first conductive semiconductor layer may be thinner than that of the undoped nitride layer formed between the magnesium blocking layer and the light emitting layer.

On the other hand, an embodiment of the present invention is to form a first conductive semiconductor layer doped with magnesium (Mg) on a substrate, and a magnesium blocking containing at least one nitride layer including indium (In) on the first conductive semiconductor layer Forming a layer, and sequentially forming the light emitting layer and the second conductivity-type semiconductor layer on the magnesium blocking layer.

The forming of the magnesium blocking layer may include forming a first nitride layer including indium (In) having a first content on the first conductivity-type semiconductor layer, and having a second content on the first nitride layer. The method may include forming a second nitride layer including indium (In).

The method may further include forming an undoped nitride layer on the second nitride layer and etching the undoped nitride layer.

At this time, in the step of etching the undoped nitride layer, 50 to 90% of the undoped nitride layer may be etched from the entire thickness of the undoped nitride layer.

In addition, before forming the magnesium blocking layer, the method may further include forming an undoped nitride layer on the first conductivity-type semiconductor layer and etching the undoped nitride layer.

The method may further include forming an undoped nitride layer on the magnesium blocking layer and etching the undoped nitride layer before forming the emission layer.

In an embodiment, a magnesium memory effect (Mg) is inserted by inserting a magnesium blocking layer containing indium (In) between a p-type semiconductor layer and a light emitting layer using characteristics of magnesium (Mg) having high affinity with indium (In). It is possible to improve the luminous efficiency and reliability by blocking the memory effect or Mg diffusion.

In addition, the embodiment repeats the growth and etching of the undoped nitride layer several times between the p-type semiconductor layer and the light emitting layer, thereby accumulating magnesium surface, which is one of the root causes of the Mg memory effect ( Mg surface accumulation) effect can be removed to improve luminous efficiency and reliability.

1 is a cross-sectional view showing a light emitting device according to an embodiment
FIG. 2 is a first embodiment showing the magnesium barrier layer of FIG.
3 is a second embodiment showing the magnesium blocking layer of FIG.
4 is a third embodiment showing the magnesium blocking layer of FIG.
5 is a fourth embodiment showing the magnesium blocking layer of FIG.
6A-6D are cross-sectional views showing the thickness of the undoped nitride layer of FIG.
7 is a fifth embodiment showing the magnesium blocking layer of FIG.
8A-8C illustrate a first embodiment showing the thickness of the undoped nitride layer of FIG.
9A-9C illustrate a second embodiment showing the thickness of the undoped nitride layer of FIG.
10A and 10B show the location of the undoped nitride layer of FIG.
11 is a cross-sectional view showing the surface of an undoped nitride layer
12A and 12B illustrate a first embodiment showing thicknesses of the first and second nitride layers of FIG. 2.
13A and 13B illustrate a second embodiment showing thicknesses of the first and second nitride layers of FIG. 3.
14A-14C show a sixth embodiment showing the magnesium barrier layer of FIG.
15A and 15B are cross-sectional views showing the thickness of the undoped nitride layer of FIG. 14C.
16A to 16G are cross-sectional views illustrating a manufacturing process of a light emitting device according to an embodiment.
17A is a cross-sectional view illustrating a horizontal light emitting device according to the embodiment.
17B is a sectional view showing a vertical light emitting device according to the embodiment;
18 is a cross-sectional view showing a light emitting device package including a light emitting device according to the embodiment
19 is a cross-sectional view illustrating a head lamp in which a light emitting device is disposed, according to an embodiment;
20 is a perspective view illustrating a display device in which a light emitting device package is disposed according to an exemplary embodiment.

Hereinafter, exemplary embodiments will be described with reference to the accompanying drawings.

In the description of the embodiments, it is to be understood that each layer (film), region, pattern or structure is formed "on" or "under" a substrate, each layer The terms " on "and " under " encompass both being formed" directly "or" indirectly " In addition, the criteria for above or below each layer will be described with reference to the drawings.

The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. In addition, the size of each component does not necessarily reflect the actual size.

1 is a cross-sectional view showing a light emitting device according to an embodiment.

As shown in FIG. 1, the light emitting device 10 may include a substrate 100 and a light emitting structure 200.

Here, the substrate 100 may be formed of a material suitable for growing a semiconductor material or a carrier wafer.

In addition, the substrate 100 may be formed of a material having excellent thermal conductivity, and may be a conductive substrate or an insulating substrate. For example, the substrate 100 may include sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, At least one of ZnO, Si, GaP, InP, Ge, and Ga ₂ 0 ₃ may be used.

In some cases, an uneven pattern may be formed on the upper surface of the substrate 100, but is not limited thereto.

In addition, the substrate 100 may optionally remove impurities on the surface through a wet cleaning process.

As such, the light emitting structure 200 may be grown on the prepared substrate 100. When the light emitting structure 200 is directly grown on the substrate 100, the lattice constant between the substrate 100 and the light emitting structure 200 is increased. Due to mismatches and differences in coefficients of thermal expansion, crystal defects such as through dislocations may occur.

Therefore, the buffer layer 300 may be further formed between the substrate 100 and the light emitting structure 200.

The buffer layer 300 may be formed of a group III-V compound semiconductor, for example, at least one of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN.

In some cases, an undoped semiconductor layer may be further formed on the buffer layer 300, but is not limited thereto.

In addition, the buffer layer 300 may be formed of a multilayer structure including a low temperature buffer layer adjacent to the substrate 100 and a high temperature buffer layer adjacent to the light emitting structure 200, but is not limited thereto.

Here, the low temperature buffer layer may be formed at about 500-600 ° C. The low temperature buffer layer may include AlN, GaN, and the like, and may be formed of AlInN / GaN stacked structure, InGaN / GaN stacked structure, AlInGaN / InGaN / GaN stacked structure, or the like. Can be formed.

The high temperature buffer layer may then be formed at about 700-800 ° C., which may include AlN.

On the other hand, the light emitting structure 200 is formed on the buffer layer 300, the light emitting structure 200 is a first conductive semiconductor layer 210, the second conductive semiconductor layer 250, doped with magnesium (Mg) The light emitting layer 230 may be formed between the first and second conductive semiconductor layers 210 and 250, and the magnesium blocking layer 240 may be formed between the first conductive semiconductor layer 210 and the light emitting layer 230. have.

Here, the light emitting structure 200 is a semiconductor layer that grows in the Ga-face direction of the substrate 100, and includes a metal organic chemical vapor deposition (MOCVD) and a chemical vapor deposition (CVD); Chemical Vapor Deposition), Plasma-Enhanced Chemical Vapor Deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE) May be, but is not limited to this.

In addition, a photonic crystal structure may be formed in the light emitting structure 200 to improve light extraction efficiency of the light emitting device 10.

The photonic crystal structure refers to a structure in which two or more dielectrics having different refractive indices are repeated infinitely in a periodic structure having a nano size. By using this periodic refractive index difference, an optical band in which a wavelength of light is a prohibition band in which a medium cannot propagate a medium By forming and adjusting a photonic bandgap, the light reflection efficiency of the light emitting device 10 may be maximized by converting an internal reflection path of light.

Subsequently, the first conductivity type semiconductor layer 210 may be formed of a semiconductor compound. For example, the first conductivity type semiconductor layer 210 may be formed of a nitride compound doped with magnesium (Mg).

In addition, the first conductivity type semiconductor layer 210 is a p-type semiconductor layer, the first conductivity type dopant is a p-type dopant nitrogen (N), phosphorus (P), tin (Sb) lithium (Li), sodium (Na) ), Potassium (K), cesium (Cs), lead (Pb) or arsenic (As), but is not limited thereto.

Next, a magnesium (Mg) blocking layer 240 is formed on the first conductive semiconductor layer 210, and the magnesium blocking layer 240 may include at least one nitride layer including indium (In).

The reason for forming the magnesium blocking layer 240 is that a magnesium memory effect in which magnesium (Mg) of the p-type semiconductor layer is diffused into the light emitting layer is formed by placing the p-type semiconductor layer doped with magnesium (Mg) under the light emitting layer. This is to block the performance of the light emitting layer due to the (Mg memory effect) or magnesium diffusion (Mg diffusion), which can seriously degrade the performance.

The magnesium blocking layer 240 may include a nitride layer containing indium (In) as a single layer, and may include a first nitride layer including indium (In) having a first content, and an indium having a second content. The second nitride layer containing (In) may be formed of a plurality of stacked layers.

Here, when the magnesium blocking layer 240 is a plurality of layers, the first nitride layer and the second nitride layer may be repeatedly stacked several times to several hundred times.

And, the first content of the first nitride layer may be greater than the second content of the second nitride layer.

For example, indium content x of the first nitride layer may be x ≦ 0.05, and indium content y of the second nitride layer may be x> y.

In some cases, the indium content of the first nitride layer 241 and the indium content of the second nitride layer 242 may be the same.

As another case, the indium content of the first nitride layer 241 may be less than the indium content of the second nitride layer 242.

Here, the first nitride layer may be adjacent to the first conductivity type semiconductor layer 210, and the second nitride layer may be adjacent to the light emitting layer 230, and undoped between the first nitride layer and the second nitride layer. A nitride layer may be further formed.

The reason is that by repeating the growth and etching process of the undoped nitride layer several times, the Mg surface accumulation effect, which is one of the root causes of the Mg memory effect, is removed, thereby improving luminous efficiency and reliability. Because you can.

In this case, the undoped nitride layer may be, for example, u-In _x Ga _1-x N and 0 ≦ x ≦ 0.05.

As such, the magnesium blocking layer 240 may be formed to a thickness of about 1 to 50 nm. For example, the magnesium blocking layer 240 may be formed of In _x Ga _1-x N / In _y Ga _1-y N (x>). It may be a multiple layer containing y, x <0.05), or a single layer containing In _x Ga _1-x N (x <0.05).

Next, the emission layer 230 may be formed on the magnesium blocking layer 240.

Here, the light emitting layer 230 is a layer where electrons and holes meet to emit light having energy determined by an energy band inherent to the light emitting layer material.

The light emitting layer 230 may be formed of at least one of a single well structure, a multiple well structure, a quantum-wire structure, and a quantum dot structure.

Here, when the light emitting layer 230 has a single well structure or a multiple well structure, the material used for the barrier layer (not shown) of the light emitting layer is Mg _x Cd _y Zn _1-xy O (0 ≦ x ≦ 1, 0 ≦ y ≤1, 0≤x + y≤1), Mg _x Zn _1-x O (0≤x≤1), Be _x Zn _1-x O (0≤x≤1), Be _x Mg _y Zn _1-xy O (0 ≦ x, y ≦ 1, 0 ≦ x + y ≦ 1).

In addition, the material used for the well layer (not shown) of the emission layer 230 is Mg _x Cd _y Zn _1-xy O (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), Mg _x Zn _1-x O (0≤x≤1), Be _x Zn _1-x O (0≤x≤1), Be _x Mg _y Zn _1-xy O (0≤x, y≤1, 0≤x At least one material selected from + y ≦ 1), Cd _× Zn _1-x O (0 ≦ _x ≦ 1), and ZnO.

If the materials used for the barrier layer (not shown) and the well layer (not shown) are the same, the band gap may increase or decrease according to the size of x or y, and thus the barrier layer (not shown) and the well layer (not shown) may be determined. .

In order to manufacture the two-dimensional quantum structure, the lateral growth must be well formed and the crystallinity must be secured. When the cadmium (Cd) is used as the surfactant, the lateral growth is well formed, and thus the A zinc oxide (ZnO) emission layer 230 may be formed.

In addition, the light emitting layer 230 controls the composition ratio of cadmium (Cd), zinc (Zn), and magnesium (Mg), which are constituent materials, to form magnesium oxide (Mg) from a long wavelength having a band gap (˜2.3 eV) of cadmium oxide (CdO). A device having a short wavelength light emission characteristic having a band gap (˜7.7 eV) of MgO) can be manufactured.

The well layer (not shown) may have a narrower bandgap than the barrier layer (not shown), so that carriers may be collected in the well to improve internal quantum efficiency.

The well layer (not shown) is made of aluminum (Al), gallium (Ga), and indium (In) at any one of the well layer (not shown) and the barrier layer (not shown) in order to improve emission characteristics and lower the forward operating voltage. One or more materials may be doped.

In addition, a conductive clad layer (not shown) may be formed on or under the light emitting layer 230.

The conductive clad layer may be formed of a semiconductor having a band gap wider than the band gap of the barrier layer of the light emitting layer.

In addition, the conductive clad layer may be doped with n-type or p-type.

As such, the second conductivity-type semiconductor layer 250 may be formed on the formed emission layer 230.

Here, the second conductive semiconductor layer 250 may be formed of a semiconductor compound, and the second conductive dopant may be doped.

The second conductivity-type semiconductor layer 250 is an n-type semiconductor layer, and may include, but is not limited to, aluminum (Al), gallium (Ga), or indium (In), which are n-type dopants.

FIG. 2 is a first embodiment showing the magnesium blocking layer of FIG. 1.

As illustrated in FIG. 2, the magnesium blocking layer 240 may be formed between the first conductivity type semiconductor layer 210 and the light emitting layer 230.

Here, the first conductivity type semiconductor layer 210 may be a semiconductor layer doped with magnesium (Mg), and may be a semiconductor layer grown in a Ga-face direction of the substrate.

The magnesium blocking layer 240 has a two-layer structure, and includes a first nitride layer 241 containing indium (In) having a first content and an indium (In) having a second content. The nitride layer 242 may have a stacked structure.

Here, the first nitride layer 241 may be adjacent to the first conductivity type semiconductor layer 210, and the second nitride layer 242 may be adjacent to the emission layer 230.

In addition, the total thickness of the magnesium blocking layer 240 including the first nitride layer 241 and the second nitride layer 242 may be about 1-50 nm.

Also, the indium of the first content may be more than the indium of the second content.

For example, indium content x of the first nitride layer 241 may be x ≦ 0.05, and indium content y of the second nitride layer 242 may be x> y.

In some cases, the indium content of the first nitride layer 241 and the indium content of the second nitride layer 242 may be the same.

As another case, the indium content of the first nitride layer 241 may be less than the indium content of the second nitride layer 242.

As described above, the first embodiment of FIG. 2 is a magnesium barrier layer 240 having a two-layer structure, and has a first nitride layer 241 / second content containing indium (In) having a first content. A second nitride layer 242 including (In), and may be, for example, In _x Ga _1-x N / In _y Ga _1-y N (x> y, x ≦ 0.05).

3 is a second embodiment showing the magnesium blocking layer of FIG.

As shown in FIG. 3, the magnesium blocking layer 240 may be formed between the first conductive semiconductor layer 210 and the light emitting layer 230.

Here, the first conductivity type semiconductor layer 210 may be a semiconductor layer doped with magnesium (Mg), and may be a semiconductor layer grown in a Ga-face direction of the substrate.

The magnesium blocking layer 240 has a multilayer structure, and includes a first nitride layer 241 containing indium (In) having a first content and a second containing indium (In) having a second content. The nitride layer 242 is repeatedly stacked several times to several hundred times.

Here, the first nitride layer 241 may be adjacent to the first conductivity type semiconductor layer 210, and the second nitride layer 242 may be adjacent to the emission layer 230.

In addition, the total thickness of the magnesium blocking layer 240 including the first nitride layer 241 and the second nitride layer 242 may be about 1-50 nm.

Also, the indium of the first content may be more than the indium of the second content.

For example, indium content x of the first nitride layer 241 may be x ≦ 0.05, and indium content y of the second nitride layer 242 may be x> y.

In some cases, the indium content of the first nitride layer 241 and the indium content of the second nitride layer 242 may be the same.

As another case, the indium content of the first nitride layer 241 may be less than the indium content of the second nitride layer 242.

As described above, the second embodiment of FIG. 3 is a magnesium blocking layer 240 having a multi-layer structure, and includes a first nitride layer 241 / indium having a second content of indium (In) having a first content. The stack structure of the second nitride layer 242 including In) is repeated several times to several hundred times. For example, In _x Ga _1-x N / In _y Ga _1-y N / In _x Ga _1-x N / In _y Ga _1-y N .... (x> y, x ≦ 0.05).

4 is a third embodiment showing the magnesium blocking layer of FIG.

As shown in FIG. 4, the magnesium blocking layer 240 may be formed between the first conductivity-type semiconductor layer 210 and the light emitting layer 230.

Here, the first conductivity type semiconductor layer 210 may be a semiconductor layer doped with magnesium (Mg), and may be a semiconductor layer grown in a Ga-face direction of the substrate.

In addition, the magnesium blocking layer 240 has a single layer structure and has a bulk structure including a nitride layer including indium (In).

Here, the magnesium blocking layer 240 may be a single layer including In _x Ga _1-x N (x ≦ 0.05), and the thickness of the magnesium blocking layer 240 may be about 1-50 nm.

FIG. 5 is a fourth embodiment showing the magnesium blocking layer of FIG. 1.

As shown in FIG. 5, the magnesium blocking layer 240 may be formed between the first conductivity-type semiconductor layer 210 and the light emitting layer 230.

Here, the first conductivity type semiconductor layer 210 may be a semiconductor layer doped with magnesium (Mg), and may be a semiconductor layer grown in a Ga-face direction of the substrate.

The magnesium blocking layer 240 has a two-layer structure, and includes a first nitride layer 241 containing indium (In) having a first content and an indium (In) having a second content. The nitride layer 242 may have a stacked structure.

Here, the first nitride layer 241 may be adjacent to the first conductivity type semiconductor layer 210, and the second nitride layer 242 may be adjacent to the emission layer 230.

In addition, an undoped nitride layer 245 may be formed between the first nitride layer 241 and the second nitride layer 242.

Here, the undoped nitride layer 245 may be u-In _x Ga _1-x N and 0 ≦ x ≦ 0.05.

The total thickness of the magnesium blocking layer 240 including the first nitride layer 241, the undoped nitride layer 245, and the second nitride layer 242 may be about 1-50 nm.

Also, the indium of the first content may be more than the indium of the second content.

For example, indium content x of the first nitride layer 241 may be x ≦ 0.05, and indium content y of the second nitride layer 242 may be x> y.

In some cases, the indium content of the first nitride layer 241 and the indium content of the second nitride layer 242 may be the same.

As another case, the indium content of the first nitride layer 241 may be less than the indium content of the second nitride layer 242.

As described above, the fourth embodiment of FIG. 5 is a magnesium barrier layer 240 having a two-layer structure including an undoped nitride layer 245, and includes a first nitride layer including indium (In) having a first content. 241 / undoped nitride layer / second nitride layer 242 including indium (In) having a second content.

6A through 6D are cross-sectional views illustrating thicknesses of the undoped nitride layer of FIG. 5.

6A to 6D, the magnesium blocking layer 240 may be formed between the first conductivity type semiconductor layer 210 and the light emitting layer 230.

Here, the magnesium blocking layer 240 has a two-layer structure, and includes a first nitride layer 241 containing indium (In) having a first content and an indium (In) having a second content. The nitride layer 242 may have a stacked structure.

Here, the first nitride layer 241 may be adjacent to the first conductivity type semiconductor layer 210, and the second nitride layer 242 may be adjacent to the emission layer 230.

In addition, an undoped nitride layer 245 may be formed between the first nitride layer 241 and the second nitride layer 242.

Here, the undoped nitride layer 245 may be u-In _x Ga _1-x N and 0 ≦ x ≦ 0.05.

As illustrated in FIG. 6A, the thickness t1 of the undoped nitride layer 245 may be thinner than the thickness t2 of the first nitride layer 241 and the thickness t3 of the second nitride layer 242.

The thickness t2 of the first nitride layer 241 and the thickness t3 of the second nitride layer 242 may be the same.

Here, the thickness ratio of the thickness t1 of the undoped nitride layer 245 to the thickness t2 of the first nitride layer 241 may be about 1: 1.1-100, and the thickness t1 of the undoped nitride layer 245 and the second The thickness ratio of the nitride layer 242 to the thickness t3 may be about 1: 1.1-100.

6B, the thickness t1 of the undoped nitride layer 245 may be thinner than the thickness t2 of the first nitride layer 241, and may be the same as the thickness t3 of the second nitride layer 242.

The thickness t2 of the first nitride layer 241 may be thicker than the thickness t3 of the second nitride layer 242.

Here, the thickness ratio of the thickness t1 of the undoped nitride layer 245 to the thickness t2 of the first nitride layer 241 may be about 1: 1.1-100.

Next, as illustrated in FIG. 6C, the thickness t1 of the undoped nitride layer 245 may be the same as the thickness t2 of the first nitride layer 241, and may be thinner than the thickness t3 of the second nitride layer 242.

The thickness t2 of the first nitride layer 241 may be thinner than the thickness t3 of the second nitride layer 242.

Here, the thickness ratio of the thickness t1 of the undoped nitride layer 245 to the thickness t3 of the second nitride layer 242 may be about 1: 1.1-100.

6D, the thickness t1 of the undoped nitride layer 245 may be the same as the thickness t2 of the first nitride layer 241 and the thickness t3 of the second nitride layer 242.

As described above, the undoped nitride layer 245 repeats the growth and etching process several times, thereby removing the magnesium surface accumulation effect, which is one of the root causes of the Mg memory effect, and thus the luminous efficiency and Since the reliability can be improved, it can be formed in various thicknesses depending on the process environment.

In some cases, the undoped nitride layer 245 may be completely removed, depending on the processing environment.

FIG. 7 is a fifth embodiment showing the magnesium blocking layer of FIG. 1.

As shown in FIG. 7, the magnesium blocking layer 240 may be formed between the first conductivity-type semiconductor layer 210 and the light emitting layer 230.

Here, the first conductivity type semiconductor layer 210 may be a semiconductor layer doped with magnesium (Mg), and may be a semiconductor layer grown in a Ga-face direction of the substrate.

The magnesium blocking layer 240 has a multilayer structure, and includes a first nitride layer 241 containing indium (In) having a first content and a second containing indium (In) having a second content. The nitride layer 242 is repeatedly stacked several times to several hundred times.

Here, the first nitride layer 241 may be adjacent to the first conductivity type semiconductor layer 210, and the second nitride layer 242 may be adjacent to the emission layer 230.

In addition, an undoped nitride layer 245 may be formed between the first nitride layer 241 and the second nitride layer 242.

Here, the undoped nitride layer 245 may be u-In _x Ga _1-x N and 0 ≦ x ≦ 0.05.

The total thickness of the magnesium blocking layer 240 including the first nitride layer 241, the undoped nitride layer 245, and the second nitride layer 242 may be about 1-50 nm.

Also, the indium of the first content may be more than the indium of the second content.

For example, indium content x of the first nitride layer 241 may be x ≦ 0.05, and indium content y of the second nitride layer 242 may be x> y.

In some cases, the indium content of the first nitride layer 241 and the indium content of the second nitride layer 242 may be the same.

As another case, the indium content of the first nitride layer 241 may be less than the indium content of the second nitride layer 242.

As described above, the fifth embodiment of FIG. 7 is a multi-layered magnesium blocking layer 240 including the undoped nitride layer 245, and includes a first nitride layer including indium (In) having a first content ( 241) / undoped nitride layer / a second nitride layer 242 including indium (In) having a second content is repeatedly stacked several times to several hundred times.

In some cases, the undoped nitride layer 245 does not exist between every first nitride layer 241 and the second nitride layer 242, and the first nitride layer 241 and the second nitride layer 242 are not present. Only some of them may exist.

8A to 8C illustrate a thickness of the undoped nitride layer adjacent to the first conductive semiconductor layer as the first embodiment showing the thickness of the undoped nitride layer of FIG. 7.

As shown in FIGS. 8A to 8C, the magnesium blocking layer 240 may be formed between the first conductivity-type semiconductor layer 210 and the light emitting layer 230.

Here, the magnesium blocking layer 240 has a multilayer structure, and includes a first nitride layer 241 containing indium (In) having a first content and a second containing indium (In) having a second content. The nitride layer 242 is repeatedly stacked several times to several hundred times.

Here, an undoped nitride layer 245 may be formed between the first nitride layer 241 and the second nitride layer 242.

Here, the undoped nitride layer 245 may be u-In _x Ga _1-x N and 0 ≦ x ≦ 0.05.

For example, when the magnesium blocking layer 240 includes the first, second, and third undoped nitride layers 245, the first undoped nitride layer 245 is the first conductivity type semiconductor layer. Closest to 210, the second undoped nitride layer 245 is closest to the light emitting layer 230, and the third undoped nitride layer 245 is disposed between the first and second undoped nitride layers 245. It can be located at

Therefore, as shown in FIG. 8A, the thickness t11 of the first undoped nitride layer 245 closest to the first conductivity-type semiconductor layer 210 is the thickness t12 of the second undoped nitride layer 245 and the third undoped nitride. It may be thinner than the thickness t13 of layer 245.

The thickness t12 of the second undoped nitride layer 245 may be thinner than the thickness t13 of the third undoped nitride layer 245.

8B, the thickness t11 of the first undoped nitride layer 245 closest to the first conductivity-type semiconductor layer 210 is the same as the thickness t12 of the second undoped nitride layer 245, and the third It may be thinner than the thickness t13 of the undoped nitride layer 245.

The thickness t12 of the second undoped nitride layer 245 may be thinner than the thickness t13 of the third undoped nitride layer 245.

Subsequently, as illustrated in FIG. 8C, the thickness t11 of the first undoped nitride layer 245 closest to the first conductivity type semiconductor layer 210 may be the thickness t12 of the second undoped nitride layer 245 and the third undoped nitride. It may be the same as the thickness t13 of the layer 245.

9A to 9C illustrate a thickness of the undoped nitride layer adjacent to the first conductivity type semiconductor layer as a second embodiment showing the thickness of the undoped nitride layer of FIG. 7.

9A to 9C, the magnesium blocking layer 240 may be formed between the first conductive semiconductor layer 210 and the light emitting layer 230.

Here, the magnesium blocking layer 240 has a multilayer structure, and includes a first nitride layer 241 containing indium (In) having a first content and a second containing indium (In) having a second content. The nitride layer 242 is repeatedly stacked several times to several hundred times.

Here, an undoped nitride layer 245 may be formed between the first nitride layer 241 and the second nitride layer 242.

Here, the undoped nitride layer 245 may be u-In _x Ga _1-x N and 0 ≦ x ≦ 0.05.

For example, when the magnesium blocking layer 240 includes the first, second, and third undoped nitride layers 245, the first undoped nitride layer 245 is the first conductivity type semiconductor layer. Closest to 210, the second undoped nitride layer 245 is closest to the light emitting layer 230, and the third undoped nitride layer 245 is disposed between the first and second undoped nitride layers 245. It can be located at

Accordingly, as illustrated in FIG. 9A, the thickness t11 of the first undoped nitride layer 245 closest to the first conductivity type semiconductor layer 210 may be the thickness t12 of the second undoped nitride layer 245 and the third undoped nitride. It may be thicker than the thickness t13 of layer 245.

The thickness t12 of the second undoped nitride layer 245 may be thinner than the thickness t13 of the third undoped nitride layer 245.

Subsequently, as illustrated in FIG. 9B, the thickness t11 of the first undoped nitride layer 245 closest to the first conductivity type semiconductor layer 210 may be the thickness t12 of the second undoped nitride layer 245 and the third undoped nitride. It may be thicker than the thickness t13 of layer 245.

The thickness t12 of the second undoped nitride layer 245 and the thickness t13 of the third undoped nitride layer 245 may be the same.

Subsequently, as illustrated in FIG. 9C, the thickness t11 of the first undoped nitride layer 245 closest to the first conductivity type semiconductor layer 210 may be the thickness t12 of the second undoped nitride layer 245 and the third undoped nitride. It may be the same as the thickness t13 of the layer 245.

10A and 10B illustrate a position of an undoped nitride layer of FIG. 7.

10A and 10B, the magnesium blocking layer 240 may be formed between the first conductive semiconductor layer 210 and the light emitting layer 230.

Here, the magnesium blocking layer 240 has a multilayer structure, and includes a first nitride layer 241 containing indium (In) having a first content and a second containing indium (In) having a second content. The nitride layer 242 is repeatedly stacked several times to several hundred times.

Here, an undoped nitride layer 245 may be formed between the first nitride layer 241 and the second nitride layer 242.

At this time, the undoped nitride layer 245 does not exist between every first nitride layer 241 and the second nitride layer 242, and among all the first nitride layer 241 and the second nitride layer 242. May only be present in some.

For example, in the magnesium blocking layer 240, the undoped nitride layer 245 may be located only in an area adjacent to the first conductivity type semiconductor layer 210, or may be located only in an area adjacent to the emission layer 230. .

That is, as shown in FIG. 10A, the undoped nitride layer 245 may be located between the first nitride layer 241 and the second nitride layer 242 adjacent to the first conductivity type semiconductor layer 210.

As shown in FIG. 10B, the undoped nitride layer 245 may be located between the first nitride layer 241 and the second nitride layer 242 adjacent to the emission layer 230.

11 is a cross-sectional view showing the surface of an undoped nitride layer.

As shown in FIG. 11, an undoped nitride layer 245 may be formed between the first nitride layer 241 and the second nitride layer 242, where the undoped nitride layer 245 is uneven. It can have one surface.

The reason is that in the case of the undoped nitride layer 245, the growth and etching processes are repeated several times in order to remove the magnesium surface accumulation effect, which is one of the root causes of the magnesium memory effect. to be.

Thus, the undoped nitride layer 245 may have a non-uniform surface, such as an uneven pattern.

However, in some cases, the undoped nitride layer 245 may have a smooth and uniform surface, depending on the environment of the etching process.

12A and 12B illustrate a first embodiment showing thicknesses of the first and second nitride layers of FIG. 2.

12A and 12B, the magnesium blocking layer 240 may be formed between the first conductive semiconductor layer 210 and the light emitting layer 230.

Here, the magnesium blocking layer 240 has a two-layer structure, and includes a first nitride layer 241 containing indium (In) having a first content and an indium (In) having a second content. The nitride layer 242 may have a stacked structure.

Here, the indium of the first content may be more than the indium of the second content.

In addition, the first nitride layer 241 may be adjacent to the first conductivity-type semiconductor layer 210, and the second nitride layer 242 may be adjacent to the emission layer 230. The total thickness of the magnesium blocking layer 240 including the second nitride layer 242 may be about 1-50 nm.

12A, the thickness t1 of the first nitride layer 241 and the thickness t2 of the second nitride layer 242 may be different from each other.

Here, the thickness t1 of the first nitride layer 241 may be thicker than the thickness t2 of the second nitride layer 242.

The reason is that since the indium content of the first nitride layer 241 is higher than the indium content of the second nitride layer 242, the thickness t1 of the first nitride layer 241 is the thickness of the second nitride layer 242. If the thickness is thicker than t2, the effect of blocking Mg memory effect or Mg diffusion in which magnesium (Mg) of the p-type semiconductor layer diffuses into the light emitting layer may be better.

In some cases, as shown in FIG. 12B, the thickness t1 of the first nitride layer 241 and the thickness t2 of the second nitride layer 242 may be the same.

13A and 13B are second exemplary embodiments illustrating thicknesses of the first and second nitride layers of FIG. 3.

As shown in FIGS. 13A and 13B, the magnesium blocking layer 240 may be formed between the first conductivity-type semiconductor layer 210 and the light emitting layer 230.

Here, the magnesium blocking layer 240 has a multilayer structure, and includes a first nitride layer 241 containing indium (In) having a first content and a second containing indium (In) having a second content. The nitride layer 242 is repeatedly stacked several times to several hundred times.

Here, the indium of the first content may be more than the indium of the second content.

In addition, the first nitride layer 241 may be adjacent to the first conductivity-type semiconductor layer 210, and the second nitride layer 242 may be adjacent to the emission layer 230. The total thickness of the magnesium blocking layer 240 including the second nitride layer 242 may be about 1-50 nm.

13A, if four first nitride layers 241 are present in the magnesium blocking layer, the thickness of the first nitride layer 241 increases from the first conductive semiconductor layer 210 to the light emitting layer 230. The t31, t32, t33, t34 can be gradually reduced.

Alternatively, as shown in FIG. 13B, if four second nitride layers 242 exist in the magnesium blocking layer, the thickness of the second nitride layer 242 increases from the first conductive semiconductor layer 210 to the light emitting layer 230. The t41, t42, t43, and t44 can be gradually reduced.

14A-14C are sixth embodiments showing the magnesium barrier layer of FIG.

As shown in FIGS. 14A to 14C, the magnesium blocking layer 240 may be formed between the first conductive semiconductor layer 210 and the light emitting layer 230.

Here, the first conductivity type semiconductor layer 210 may be a semiconductor layer doped with magnesium (Mg), and may be a semiconductor layer grown in a Ga-face direction of the substrate.

In addition, the magnesium blocking layer 240 may include a nitride layer including indium (In) as a single layer, and may include a first nitride layer including indium (In) having a first content, and a second content. The second nitride layer including indium (In) may be formed as a plurality of layers stacked.

Here, when the magnesium blocking layer 240 is a plurality of layers, the first nitride layer and the second nitride layer may be repeatedly stacked several times to several hundred times.

And, the first content of the first nitride layer may be greater than the second content of the second nitride layer.

In addition, an undoped nitride layer 245 is formed between at least one of the magnesium blocking layer 240 and the first conductive semiconductor layer 210 and between the magnesium blocking layer 240 and the light emitting layer 230. Can be.

Here, the undoped nitride layer 245 may be u-In _x Ga _1-x N and 0 ≦ x ≦ 0.05.

That is, the undoped nitride layer 245 may be formed between the magnesium blocking layer 240 and the first conductivity-type semiconductor layer 210, as shown in FIG. 14A. It may be formed between the light emitting layer 230, and as shown in Figure 14c, both formed between the magnesium blocking layer 240 and the first conductivity-type semiconductor layer 210, and between the magnesium blocking layer 240 and the light emitting layer 230. May be

As such, the reason for forming the undoped nitride layer 245 is that by repeatedly repeating the growth and etching processes of the undoped nitride layer, magnesium surface accumulation (Mg surface), which is one of the root causes of the Mg memory effect, is obtained. This is because the luminous efficiency and reliability can be improved by removing the accumulation effect.

15A and 15B are cross-sectional views showing thicknesses of the undoped nitride layer of FIG. 14C.

As shown in FIGS. 15A and 15B, the undoped nitride layer 245 may be disposed between the magnesium blocking layer 240 and the first conductive semiconductor layer 210, and between the magnesium blocking layer 240 and the light emitting layer 230. The thickness t51 of the undoped nitride layer 245 adjacent to the first conductivity-type semiconductor layer 210 and the thickness t52 of the undoped nitride layer 245 adjacent to the light emitting layer 230 may be different from each other. .

That is, as shown in FIG. 15A, the thickness t51 of the undoped nitride layer 245 adjacent to the first conductivity-type semiconductor layer 210 may be thinner than the thickness t52 of the undoped nitride layer 245 adjacent to the emission layer 230. .

The reason for this is that the magnesium surface accumulation phenomenon in the region adjacent to the first conductivity type semiconductor layer 210 is larger than the magnesium surface accumulation phenomenon in the region adjacent to the emission layer 230. This is because the etching process is performed to remove more of the undoped nitride layer 245 adjacent to the semiconductor layer 210 than the undoped nitride layer 245 adjacent to the light emitting layer 230.

In some cases, as shown in FIG. 15B, the thickness t51 of the undoped nitride layer 245 adjacent to the first conductivity-type semiconductor layer 210 and the thickness t52 of the undoped nitride layer 245 adjacent to the light emitting layer 230 are the same. You may.

16A to 16G are cross-sectional views illustrating a manufacturing process of a light emitting device according to an embodiment.

First, as shown in FIG. 16A, after loading the substrate 100 into the growth equipment, the buffer layer 300 and the first conductivity-type semiconductor layer 210 are formed on the substrate 100.

Here, the substrate 100 may be formed of a material suitable for growing a semiconductor material or a carrier wafer.

In addition, the substrate 100 may be formed of a material having excellent thermal conductivity, and may be a conductive substrate or an insulating substrate. For example, the substrate 100 may include sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, At least one of ZnO, Si, GaP, InP, Ge, and Ga ₂ 0 ₃ may be used.

In some cases, the substrate 100 may optionally remove impurities on the surface through a wet cleaning process.

Subsequently, the buffer layer 300 may be formed of a group III-V compound semiconductor, for example, at least one of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN.

In some cases, an undoped semiconductor layer may be further formed on the buffer layer 300, but is not limited thereto.

Next, the first conductivity-type semiconductor layer 210 is a semiconductor layer growing in the Ga-face direction of the substrate 100, and is a metal organic chemical vapor deposition (MOCVD), chemical vapor deposition method Chemical Vapor Deposition (CVD), Plasma-Enhanced Chemical Vapor Deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE) It may be formed using, but is not limited thereto.

Here, the first conductivity type semiconductor layer 210 may be formed of a semiconductor compound, for example, may be formed of a nitride compound doped with magnesium (Mg).

In addition, the first conductivity-type semiconductor layer 210 is a p-type semiconductor layer, which is a p-type dopant, nitrogen (N), phosphorus (P), tin (Sb) lithium (Li), sodium (Na), or potassium (K). ), Cesium (Cs), lead (Pb) or arsenic (As), but may not be limited thereto.

Subsequently, as illustrated in FIG. 16B, a first undoped nitride layer 245-1 may be formed on the first conductivity type semiconductor layer 210.

The first undoped nitride layer may be, for example, u-In _x Ga _1-x N and 0 ≦ x ≦ 0.05.

In addition, the first undoped nitride layer 245-1 may be formed to have a first thickness t61.

Next, as shown in FIG. 16C, the first undoped nitride layer 245-1 may be etched.

Here, by the etching process, the first undoped nitride layer 245-1 may be partially left at the second thickness t62, or may be completely removed.

Etching process In one embodiment, the process can go to hydrogen thermal etching (H ₂ thermal etching) method.

As such, the reason for etching the first undoped nitride layer 245-1 is to remove the Mg surface accumulation effect, which is one of the root causes of the Mg memory effect, to remove the luminescence efficiency and reliability. Because it can improve.

As shown in FIG. 16D, a magnesium (Mg) blocking layer in which a first nitride layer 241 and a second nitride layer 242 are sequentially formed is formed on the first undoped nitride layer 245-1. The second undoped nitride layer 245-2 may be formed to have a first thickness t71 on the second nitride layer 242 of the magnesium blocking layer.

Here, the magnesium blocking layer 240 may include at least one nitride layer including indium (In), and the nitride layer including indium (In) may be formed as a single layer, and the indium having a first content may be included. It may be formed from a plurality of layers in which a first nitride layer containing (In) and a second nitride layer containing indium (In) having a second content are laminated.

Here, the first content of the first nitride layer may be greater than the second content of the second nitride layer.

For example, indium content x of the first nitride layer may be x ≦ 0.05, and indium content y of the second nitride layer may be x> y.

In some cases, the indium content of the first nitride layer 241 and the indium content of the second nitride layer 242 may be the same.

As another case, the indium content of the first nitride layer 241 may be less than the indium content of the second nitride layer 242.

Subsequently, as illustrated in FIG. 16E, the second undoped nitride layer 245-2 may be etched.

Here, by the etching process, the second undoped nitride layer 245-2 may be partially left at the second thickness t72, or may be completely removed.

Next, as shown in FIG. 16F, a magnesium (Mg) blocking layer in which the first nitride layer 241 and the second nitride layer 242 are sequentially formed on the second undoped nitride layer 245-2 is formed again. Can be.

In some cases, the manufacturing process of FIGS. 16B to 16F may be repeated several times to several hundred times.

As illustrated in FIG. 16G, the emission layer 230 and the second conductivity-type semiconductor layer 250 may be sequentially formed on the second nitride layer 242 of the magnesium blocking layer.

The light emitting layer 230 may be formed of at least one of a single well structure, a multiple well structure, a quantum-wire structure, and a quantum dot structure.

At this time, when the light emitting layer 230 has a single well structure or multiple well structure, the material used for the barrier layer (not shown) of the light emitting layer is Mg _x Cd _y Zn _1-xy O (0 ≦ x ≦ 1, 0 ≦ y ≤1, 0≤x + y≤1), Mg _x Zn _1-x O (0≤x≤1), Be _x Zn _1-x O (0≤x≤1), Be _x Mg _y Zn _1-xy O (0 ≦ x, y ≦ 1, 0 ≦ x + y ≦ 1).

In addition, the material used for the well layer (not shown) of the emission layer 230 is Mg _x Cd _y Zn _1-xy O (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), Mg _x Zn _1-x O (0≤x≤1), Be _x Zn _1-x O (0≤x≤1), Be _x Mg _y Zn _1-xy O (0≤x, y≤1, 0≤x At least one material selected from + y ≦ 1), Cd _× Zn _1-x O (0 ≦ _x ≦ 1), and ZnO.

If the materials used for the barrier layer (not shown) and the well layer (not shown) are the same, the band gap may increase or decrease according to the size of x or y, and thus the barrier layer (not shown) and the well layer (not shown) may be determined. .

The well layer (not shown) is made of aluminum (Al), gallium (Ga), and indium (In) at any one of the well layer (not shown) and the barrier layer (not shown) in order to improve emission characteristics and lower the forward operating voltage. One or more materials may be doped.

Subsequently, the second conductivity-type semiconductor layer 250 may be formed of a semiconductor compound, and the second conductivity-type dopant may be doped.

The second conductivity-type semiconductor layer 250 is an n-type semiconductor layer, and may include, but is not limited to, aluminum (Al), gallium (Ga), or indium (In), which are n-type dopants.

As described above, the manufactured embodiment is made by inserting a magnesium blocking layer containing indium (In) between the p-type semiconductor layer and the light emitting layer by using the characteristics of magnesium (Mg) having high affinity with indium (In), The light emission efficiency and reliability may be improved by blocking the Mg memory effect or the Mg diffusion.

In addition, the embodiment repeats the growth and etching of the undoped nitride layer several times between the p-type semiconductor layer and the light emitting layer, thereby accumulating magnesium surface, which is one of the root causes of the Mg memory effect ( Mg surface accumulation) effect can be removed to improve luminous efficiency and reliability.

17A is a cross-sectional view illustrating a horizontal light emitting device according to the embodiment.

As shown in FIG. 17A, a buffer layer 300 is formed on a substrate 100, and a first conductive semiconductor layer 210, a light emitting layer 230, and a second conductive semiconductor layer 250 are formed on the buffer layer 300. Growing a light emitting structure 200 comprising a.

Here, the light emitting layer 230 may include a barrier layer, an insulating layer and a protrusion formed on the barrier layer, and a well layer formed on the protrusion.

In addition, the light emitting structure 200 may include, for example, a metal organic chemical vapor deposition (MOCVD), a chemical vapor deposition (CVD), a plasma chemical vapor deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), and the like may be formed using, but are not limited thereto.

Subsequently, a portion of the second conductive semiconductor layer 250, the light emitting layer 230, and the first conductive semiconductor layer 210 may be mesa-etched to expose the first electrode 410 on the exposed first conductive semiconductor layer 210. ).

Here, the first electrode 410 is molybdenum (Mo), chromium (Cr), nickel (Ni), gold (Au), aluminum (Al), titanium (Ti), platinum (Pt), vanadium (V), tungsten It may be made of any one metal selected from (W), lead (Pd), copper (Cu), rhodium (Rh) or iridium (Ir) or an alloy of the metals.

The second electrode 420 is disposed on the second conductivity type semiconductor layer 250.

In addition, an ohmic layer 400 may be formed between the second conductivity-type semiconductor layer 250 and the second electrode 420.

Here, the second conductivity-type semiconductor layer 250 has a low impurity doping concentration and high contact resistance, and therefore, ohmic characteristics with a metal may not be good, and thus the ohmic layer 400 is to improve such ohmic characteristics. It does not have to be formed.

Since the ohmic layer 400 is disposed between the light emitting structure 200 and the second electrode 420, the ohmic layer 400 may be formed as a transparent electrode, or may be formed as a layer or a plurality of patterns.

In addition, the ohmic layer 400 may selectively use a light-transmitting conductive layer and a metal, for example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), and indium aluminum zinc oxide), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZON (IZO Nitride), AGZO (Al Ga ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, or Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, At least one of Rh, Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf may be formed, but is not limited thereto.

17B is a cross-sectional view illustrating a vertical light emitting device according to the embodiment.

As shown in FIG. 17B, a buffer layer 300 is formed on a substrate and includes a first conductive semiconductor layer 210, a light emitting layer 230, and a second conductive semiconductor layer 250 on the buffer layer 300. The light emitting structure 200 is grown.

Here, the light emitting layer 230 may include a barrier layer, an insulating layer and a protrusion formed on the barrier layer, and a well layer formed on the protrusion.

Subsequently, the substrate is separated by laser lift off (LLO) or dry and wet etching.

At this time, during the substrate separation process, not only the substrate but also the buffer layer 300 may be separated together.

Subsequently, the support substrate 110 is disposed on the second conductive semiconductor layer 250 of the light emitting structure 200.

In this case, the ohmic layer 400 and / or the reflective layer 440 may be disposed between the light emitting structure 200 and the support substrate 110.

In addition, since the support substrate 110 may serve as a second electrode, a metal having excellent electrical conductivity may be used, and a metal having high thermal conductivity may be used since it should be able to sufficiently dissipate heat generated during operation of the light emitting device. have.

The support substrate 110 is made of a material selected from the group consisting of molybdenum (Mo), silicon (Si), tungsten (W), copper (Cu), silver (Ag), or aluminum (Al) or alloys thereof. In addition, gold (Au), copper alloy (Cu Alloy), nickel (Ni), copper-tungsten (Cu-W), carrier wafers (e.g. GaN, Si, Ge, GaAs, ZnO, SiGe, SiC) , SiGe, Ga ₂ O _3, etc.) may be optionally included.

In addition, the support substrate 110 has a mechanical strength of sufficient degree to be separated into separate chips through a scribing process and a breaking process without bringing warpage to the light emitting structure including the nitride semiconductor. Can have

The ohmic layer 400 may selectively use a light-transmitting conductive layer and a metal, for example, indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), and indium aluminum zinc oxide (AZO). ), Indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZON (IZO Nitride), AGZO (Al-Ga) ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, or Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, At least one of Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf may be formed, but is not limited thereto.

The reflective layer 440 may be formed of, for example, a material made of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, or a combination thereof, or may be formed of a metal material. It may be formed in multiple layers using a light transmissive conductive material such as IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO.

In addition, the reflective layer 440 may be laminated with IZO / Ni, AZO / Ag, IZO / Ag / Ni, AZO / Ag / Ni, or the like.

Subsequently, when the reflective layer 440 is formed of a material in ohmic contact with the light emitting structure (eg, the second conductivity type semiconductor layer 250), the ohmic layer 400 may not be formed separately, but is not limited thereto. .

The ohmic layer 400 and the reflective layer 440 may be formed by, for example, any one of electron beam (E-beam) deposition, sputtering, and plasma enhanced chemical vapor deposition (PECVD). It is not limited.

The passivation layer 430 may be formed on the surface of the light emitting structure 200.

Here, the passivation layer 430 may be made of an insulating material, and the insulating material may be made of an oxide or nitride that is nonconductive.

As an example, the passivation layer 430 may include a silicon oxide (SiO ₂ ) layer, an oxynitride layer, and an aluminum oxide layer.

18 is a cross-sectional view illustrating a light emitting device package including a light emitting device according to an embodiment.

As shown in FIG. 18, the light emitting device package 500 includes a body 510 having a cavity, a first lead frame 521 and a second lead frame 522 installed on the body 510, and a body 510. The light emitting device 10 according to the above-described embodiments, and the molding unit 540 formed in the cavity are installed on the first lead frame 521 and electrically connected to the second lead frame 522.

Here, the body 510 may be formed including a silicon material, a synthetic resin material, or a metal material.

If the body 510 is made of a conductive material such as a metal material, although not shown, an insulating layer may be coated on the surface of the body 510 to prevent an electrical short between the first and second lead frames 521 and 522. .

The first lead frame 521 and the second lead frame 522 are electrically separated from each other, and supply a current to the light emitting device 10.

In addition, the first lead frame 521 and the second lead frame 522 may increase the light efficiency by reflecting the light generated from the light emitting device 10, the heat generated from the light emitting device 10 to the outside It can also be discharged.

Subsequently, the light emitting device 10 may be installed on the body 510 or may be installed on the first lead frame 521 or the second lead frame 522.

In the embodiment, the first lead frame 521 and the light emitting element 10 are directly energized, and the second lead frame 522 and the light emitting element 10 are connected through a wire 330.

Here, the light emitting device 10 may be connected to the first and second lead frames 521 and 522 by a flip chip method or a die bonding method in addition to the wire bonding method.

In addition, the molding part 540 may surround and protect the light emitting device 10.

In addition, the cavity of the molding part 540 may include a phosphor 550 to change the wavelength of light emitted from the light emitting device 10.

The phosphor 550 may include a garnet-based phosphor, a silicate-based phosphor, a nitride-based phosphor, or an oxynitride-based phosphor.

For example, the garnet-based phosphor may be YAG (Y ₃ Al ₅ O ₁₂ : Ce ³⁺ ) or TAG (Tb ₃ Al ₅ O ₁₂ : Ce ³⁺ ), and the silicate-based phosphor may be (Sr, Ba, Mg, Ca) ₂ SiO ₄ : Eu ²⁺ , the nitride-based phosphor may be CaAlSiN ₃ : Eu ²⁺ including SiN, the oxynitride-based phosphor is Si _6-x Al _x O _x including SiON N _8-x : Eu ²⁺ (0 <x <6).

Then, the light of the first wavelength region emitted from the light emitting element 10 is excited by the phosphor 550 and converted into the light of the second wavelength region, and the light of the second wavelength region passes through the lens (not shown). The optical path can be changed while doing so.

Hereinafter, a head lamp and a backlight unit will be described as an embodiment of a lighting system in which the above-described light emitting device package is disposed.

19 is a cross-sectional view illustrating a head lamp in which a light emitting device is disposed, according to an embodiment.

As shown in FIG. 19, after the light emitted from the light emitting module 610 in which the light emitting device is disposed is reflected by the reflector 620 and the shade 630, the light is transmitted through the lens 640 to provide a vehicle body. It may face forward.

The light emitting device package including the light emitting module 610 may include a plurality of light emitting devices, and the present invention is not limited thereto.

20 is a perspective view illustrating a display device in which a light emitting device package is disposed, according to an exemplary embodiment.

As shown in FIG. 20, the display device 800 includes a light source module including a circuit board 830 and a light emitting device package 835, a reflector 820 on a bottom cover 810, and a reflector 820. A light guide plate 840 disposed in front of the light guide module to guide the light emitted from the light source module to the front of the display device; a first prism sheet 850 and a second prism sheet 860 disposed in front of the light guide plate 840; It includes a panel 870 disposed in front of the second prism sheet 860 and a color filter 880 disposed in the first half of the panel 870.

Here, the light source module comprises a light emitting device package 835 formed on the circuit board 830, the circuit board 830 may be used, such as a PCB, the light emitting device package 835 in the above-described embodiments As described.

In addition, the bottom cover 810 may accommodate components in the display device 800.

Subsequently, the reflective plate 820 may be provided as a separate component as shown in FIG. 20, or may be provided in the form of a material having high reflectivity on the rear surface of the light guide plate 840 or the front surface of the bottom cover 810. It is possible.

Here, the reflection plate 820 can be made of a material having a high reflectance and can be used in an ultra-thin shape, and polyethylene terephthalate (PET) can be used.

The light guide plate 840 scatters the light emitted from the light emitting device package module so that the light is uniformly distributed over the entire area of the screen of the liquid crystal display.

Accordingly, the light guide plate 830 is made of a material having a good refractive index and transmittance. The light guide plate 830 may be formed of polymethyl methacrylate (PMMA), polycarbonate (PC), or polyethylene (PE).

In addition, the light guide plate 830 is omitted, so that the air guide method in which light is transmitted in the space on the reflective sheet 820 is possible.

Next, the first prism sheet 850 is formed of a translucent and elastic polymer material on one surface of the support film, and the polymer may have a prism layer in which a plurality of three-dimensional structures are repeatedly formed.

Here, the plurality of patterns may be provided in a stripe type in which the floor and the valley are repeatedly formed as shown.

In addition, the direction of the floor and the valley of one surface of the support film in the second prism sheet 860 may be perpendicular to the direction of the floor and the valley of one surface of the support film in the first prism sheet 850.

This is to evenly distribute the light transmitted from the light source module and the reflective sheet in the omnidirectional direction of the panel 870.

In an embodiment, the first prism sheet 850 and the second prism sheet 860 form an optical sheet, which may be made of another combination, for example a micro lens array or a combination of a diffusion sheet and a micro lens array, or It may be made of a combination of one prism sheet and a micro lens array.

Subsequently, a liquid crystal display panel may be disposed on the panel 870. In addition to the liquid crystal display panel 860, another type of display device that requires a light source may be provided.

The panel 870 is in a state where the liquid crystal is located between the glass bodies and the polarizing plates are placed on both glass bodies in order to use the polarization of light.

Here, the liquid crystal has an intermediate property between a liquid and a solid, and liquid crystals, which are organic molecules having fluidity like a liquid, are regularly arranged like crystals. The liquid crystal has a structure in which the molecular arrangement is changed by an external electric field And displays an image.

In addition, a liquid crystal display panel used in a display device uses a transistor as a switch for adjusting a voltage supplied to each pixel as an active matrix system.

Subsequently, a color filter 880 is provided on the front surface of the panel 870 to transmit an image of the light projected by the panel 870 so that only the red, green, and blue light is transmitted for each pixel.

Another embodiment may be implemented as a light emitting device including a magnesium blocking layer described in the above embodiments, a light source module including a light emitting device, a display device including a light source module, an indicator device, and an illumination system. For example, the lighting system may include a lamp, a street lamp.

Such a lighting system can be used as an illumination light for collecting light by focusing a plurality of LEDs. In particular, it can be used as an embedded light (down light) to be embedded in a ceiling or a wall of a building so that the opening side of the shade can be exposed. have.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of illustration, It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

100 substrate 200 light emitting structure
210: first conductive semiconductor layer 230: light emitting layer
240: magnesium blocking layer 250: second conductive semiconductor layer

Claims (26)

Board;
A light emitting structure formed on the substrate and sequentially formed with a first conductive semiconductor layer, a light emitting layer, and a second conductive semiconductor layer doped with magnesium (Mg); And,
A light emitting device comprising: a magnesium blocking layer formed between the first conductive semiconductor layer and the light emitting layer, the nitride blocking layer including at least one nitride layer including indium (In). The light emitting device of claim 1, wherein the light emitting structure is grown in a Ga-face direction of the substrate. The method of claim 1, wherein the magnesium blocking layer,
A first nitride layer containing indium (In) having a first content and a second nitride layer containing indium (In) having a second content are laminated, and the first content is greater than the second content. Light emitting element. 4. The light emitting device according to claim 3, wherein indium content x of said first nitride layer is x &lt; 0.05 and indium content y of said second nitride layer is x &gt; y. The light emitting device of claim 3, wherein the first nitride layer and the second nitride layer are repeatedly stacked several times to several hundred times. The light emitting device of claim 3, wherein the first nitride layer is adjacent to the first conductive semiconductor layer, and the second nitride layer is adjacent to the light emitting layer. 4. The light emitting device of claim 3, wherein an undoped nitride layer is formed between the first nitride layer and the second nitride layer. 8. The light emitting device of claim 7, wherein the undoped nitride layer is u-In _x Ga _1-x N, where 0 ≦ x ≦ 0.05. The light emitting device of claim 7, wherein the undoped nitride layer is thinner than at least one of the first nitride layer and the second nitride layer. 10. The light emitting device of claim 9, wherein the ratio of the thickness of the undoped nitride layer and the thickness of the first nitride layer or the second nitride layer is 1: 1.1-100. 8. The light emitting device of claim 7, wherein the undoped nitride layers adjacent to each other have different thicknesses. 8. The light emitting device of claim 7, wherein the undoped nitride layer has a non-uniform surface. The light emitting device of claim 3, wherein a thickness of the first nitride layer and a thickness of the second nitride layer are different from each other. The light emitting device of claim 11, wherein a thickness of the first nitride layer is thicker than a thickness of the second nitride layer. The light emitting device of claim 1, wherein the magnesium blocking layer comprises a plurality of layers including In _x Ga _1-x N / In _y Ga _1-y N (x> y, x ≦ 0.05). The light emitting device of claim 1, wherein the magnesium blocking layer is a single layer including In _x Ga _1-x N (x ≦ 0.05). The light emitting device of claim 1, wherein the magnesium blocking layer has a thickness of 1-50 nm. The light emitting device of claim 1, wherein an undoped nitride layer is formed between at least one of the magnesium blocking layer and the first conductive semiconductor layer and between the magnesium blocking layer and the light emitting layer. 19. The light emitting device of claim 18, wherein a thickness of the undoped nitride layer formed between the magnesium blocking layer and the first conductive semiconductor layer is thinner than a thickness of the undoped nitride layer formed between the magnesium blocking layer and the light emitting layer. device. Forming a first conductivity type semiconductor layer doped with magnesium (Mg) on the substrate;
Forming a magnesium blocking layer including at least one nitride layer including indium (In) on the first conductive semiconductor layer; And,
And sequentially forming a light emitting layer and a second conductive semiconductor layer on the magnesium blocking layer. The method of claim 20, wherein forming the magnesium blocking layer,
Forming a first nitride layer including indium (In) having a first content on the first conductive semiconductor layer;
Forming a second nitride layer including indium (In) having a second content on the first nitride layer. 22. The method of claim 21,
Forming an undoped nitride layer on the second nitride layer;
The method of manufacturing a light emitting device further comprising the step of etching the undoped nitride layer. The method of claim 22, wherein in the etching of the undoped nitride layer,
And the undoped nitride layer is etched from 50 to 90% from the total thickness of the undoped nitride layer. 21. The method of claim 20,
Before forming the magnesium blocking layer, forming an undoped nitride layer on the first conductivity type semiconductor layer;
The method of manufacturing a light emitting device further comprising the step of etching the undoped nitride layer. 21. The method of claim 20,
Before forming the light emitting layer, forming an undoped nitride layer on the magnesium blocking layer;
The method of manufacturing a light emitting device further comprising the step of etching the undoped nitride layer. An illumination system comprising the light emitting element according to any one of claims 1 to 19.

Images