KR20130054034A - Light emitting device - Google Patents

Light emitting device Download PDF

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Publication number
KR20130054034A
KR20130054034A KR1020110119815A KR20110119815A KR20130054034A KR 20130054034 A KR20130054034 A KR 20130054034A KR 1020110119815 A KR1020110119815 A KR 1020110119815A KR 20110119815 A KR20110119815 A KR 20110119815A KR 20130054034 A KR20130054034 A KR 20130054034A
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South Korea
Prior art keywords
light emitting
electrode
semiconductor layer
layer
emitting device
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KR1020110119815A
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Korean (ko)
Inventor
김재훈
이광칠
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엘지이노텍 주식회사
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Priority to KR1020110119815A priority Critical patent/KR20130054034A/en
Publication of KR20130054034A publication Critical patent/KR20130054034A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE: A light emitting device is provided to increase current spread by connecting a first electrode to four light emitting regions at the same time. CONSTITUTION: A light emitting structure(120) includes a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. A first electrode(160) is formed in a part of the first conductive semiconductor layer. A second electrode(170) is arranged in the upper part of the second conductive semiconductor layer. A trench region exposes a part of the first conductive semiconductor layer to a first and a second direction. The first electrode is arranged on the first conductive semiconductor layer.

Description

[0001] LIGHT EMITTING DEVICE [0002]

An embodiment relates to a light emitting element.

Light emitting devices such as light emitting diodes or laser diodes using semiconductors of Group 3-5 or 2-6 compound semiconductor materials of semiconductors have various colors such as red, green, blue, and ultraviolet rays due to the development of thin film growth technology and device materials. By using fluorescent materials or by combining colors, efficient white light can be realized, and low power consumption, semi-permanent life, fast response speed, safety and environmental friendliness compared to conventional light sources such as fluorescent and incandescent lamps can be realized. Has an advantage.

Therefore, it is possible to replace the LED backlight, fluorescent lamp or incandescent bulb which replaces the cold cathode fluorescent lamp (CCFL) constituting the transmission module of the optical communication means, the backlight of the liquid crystal display (LCD). Its application is expanding to white light emitting diode lighting devices, automobile headlights and signals, and the like.

The embodiment provides a light emitting device capable of improving current distribution and heat dissipation.

The light emitting device according to the embodiment includes a substrate, a light emitting structure stacked on the substrate in the order of a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer, and a portion of the first conductive semiconductor layer that is exposed. And a second electrode disposed on the second conductive semiconductor layer, wherein the light emitting structure is a trench for exposing a portion of the first conductive semiconductor layer in a first direction and a second direction. It includes an area.

The first direction and the second direction of the trench region may be perpendicular to each other.

The trench regions in the first and second directions may cross over.

The first electrode may be disposed on the first conductivity type semiconductor layer where the trench regions in the first and second directions cross each other.

The second electrode may be disposed in each of the plurality of second conductive semiconductor layers separated by the trench region.

The trench region may have a width of about 5 μm to about 35 μm.

The width of the trench region of the region crossing in the first and second directions may be 100 μm within 50 μm.

The first electrode and the second electrode may be connected to the first electrode pad and the second electrode pad mounted on the submount, respectively.

The first electrode may be in surface contact with the first electrode pad, and the second electrode may be in surface contact with the second electrode pad.

The first electrode pad and the second electrode pad may be mounted on the submount in a finger structure, respectively.

The fingers of the first electrode pad and the fingers of the second electrode pad may be spaced apart from each other and alternately disposed.

The semiconductor device may further include a reflective ohmic layer and a current spread layer between the second conductive semiconductor layer and the second electrode.

The display device may further include a passivation layer covering a top surface, a side surface, and a portion of the exposed trench region of at least one light emitting structure.

An ohmic layer may be further included between the lower portion of the first electrode and the first conductive semiconductor layer.

The light emitting device according to the embodiment may improve current dispersion and heat dissipation.

1 and 2 are plan views of the light emitting device according to the embodiment;
3 is a cross-sectional view of a light emitting device according to the embodiment;
4 is a perspective view of a light emitting device according to the embodiment;
5 is a cross-sectional view of a portion of a flip chip according to an embodiment;
6 is a partial plan view of a light emitting device according to an embodiment;
7 is a view showing an embodiment of a light emitting device package,
8 is a view showing an embodiment of a head lamp including a light emitting device package,
9 is a diagram illustrating an example embodiment of a display device in which a light emitting device package is disposed.

Hereinafter, embodiments will be described with reference to the accompanying drawings.

In the description of the embodiment according to the present invention, in the case of being described as being formed on the "upper" or "on or under" of each element, on or under includes both elements being directly contacted with each other or one or more other elements being indirectly formed between the two elements. Also, when expressed as "on" or "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. In addition, the size of each component does not necessarily reflect the actual size.

1 and 2 are plan views of the light emitting device according to the embodiment, FIG. 3 is a cross-sectional view of the light emitting device according to the embodiment, FIG. 4 is a perspective view of the light emitting device according to the embodiment, and FIG. 5 is a flip according to the embodiment. 6 is a cross-sectional view of a portion of the chip, and FIG. 6 is a partial plan view of the light emitting device according to the embodiment.

1 to 3, the light emitting device 100 includes a plurality of light emitting regions P: P1 to Pn, n> separated by a trench region T in a single chip unit. 1 natural number).

The light emitting device 100 includes a plurality of first electrodes 160 and a plurality of second electrodes 170 in the plurality of light emitting regions P. Referring to FIG.

The light emitting device 100 may be a 1 mm × 1 mm (1 mm 2 ) class large area chip. For example, it may be a large area chip having an area of 900 μm × 900 μm (810000 μm 2 ) or more.

For example, as illustrated in FIG. 1, nine light emitting regions P1 to P9 having a size of 200 μm × 200 μm to 300 μm × 300 μm are disposed in a chip having a size of 980 μm × 980 μm, or shown in FIG. 2. As illustrated, four light emitting regions P10 to P13 having a size of 400 μm × 400 μm to 500 μm × 500 μm may be disposed in a chip having a size of 980 μm × 980 μm. The sizes of the light emitting regions P may be the same or different from each other, but may not be limited thereto.

The trench region T may be disposed between each of the light emitting regions P and / or around each of the light emitting regions P according to the number of the light emitting devices 100 to be separated into the plurality of light emitting regions P. FIG. Can be. In addition, the trench region T may be formed in a first direction D1 and a second direction D2 perpendicular to each other, and the first direction D1 and the second direction D2 cross over. Can be.

The width T1 of the trench region T disposed between the adjacent emission regions P may be 5 μm to 35 μm. Since the width T1 of the trench region T is formed to be at least 5 μm, electrical interference or physical influence between the light emitting regions P may be prevented. In addition, when the trench region T1 is 35 μm or more, the light emitting efficiency of the light emitting device 100 may decrease due to excessive loss of the light emitting region P. FIG.

The widths T2 and T3 of the trench region T in which the first direction D1 and the second direction D2 overlap are formed to be at least 50 μm to 100 μm, so that the first electrode disposed in the trench area T. Sides of the 160 may be arranged to prevent electrical shorts at a predetermined interval from the adjacent light emitting structure 120.

The first electrode 160 may be shared in adjacent light emitting regions P. Referring to FIG. For example, one first electrode 160 may be simultaneously connected to four light emitting regions P2, P3, P4, and P5. The plurality of first electrodes 160 may be disposed in the light emitting devices 100 separated into the light emitting regions P, thereby increasing the current spread of the light emitting devices 100 as a whole.

The second electrode 170 may be disposed in the emission regions P1 to P9, respectively. The second electrodes 170 may be disposed in the emission regions P1 to P9, respectively, to increase current dispersion in the light emitting device 100 as a whole.

In addition, in the embodiment, a plurality of first electrodes 160 and second electrodes 170 are formed in one chip unit, and thus, a plurality of first electrodes and a second electrode in one chip unit may be formed. The heat dissipation efficiency may be further increased through the first electrode 160 and the second electrode 170.

3 is a cross-sectional view taken along the AA ′ direction of the light emitting device 100 illustrated in FIG. 1, and FIG. 4 is a perspective view taken along the BB ′ direction of the light emitting device 100 illustrated in FIG. 2.

Referring to FIG. 3, a cross section along the AA ′ direction of the light emitting device 100 illustrated in FIG. 1 includes three light emitting regions P1, P5, and P9 separated by a trench T4.

Referring to FIG. 4, a perspective view in the BB ′ direction of the light emitting device 100 illustrated in FIG. 2 includes four light emitting regions P10, P11, P12, and P13 separated by a trench T. Referring to FIG.

3 and 4, the light emitting device 100 includes a buffer layer 115, a light emitting structure 120, a reflective ohmic layer 130, and a current spread layer on a substrate 110. 140, a passivation layer 150, a first electrode 160, an ohmic layer 165, and a second electrode 170.

The substrate 110 may be formed of a carrier wafer, a material suitable for semiconductor material growth. It may be formed of a material having excellent thermal conductivity, and may be a conductive substrate or an insulating substrate. For example, at least one of sapphire (SiO 2 ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga 2 O 3 may be used.

The buffer layer 115 is intended to mitigate the difference in lattice mismatch and thermal expansion coefficient of the material between the substrate 110 and the light emitting structure 120. The material of the buffer layer 115 may be formed of at least one of Group III-V compound semiconductors, for example, GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN.

The first conductivity type semiconductor layer 122 may be formed of a semiconductor compound. The first conductivity-type semiconductor layer 122 may be implemented with compound semiconductors such as Groups 3-5 and 2-6, and may be doped with the first conductivity type dopant. When the first conductive semiconductor layer 122 is an N-type semiconductor layer, the first conductive dopant may be an N-type dopant, and may include Si, Ge, Sn, Se, and Te, but is not limited thereto.

The first conductivity-type semiconductor layer 122 includes a semiconductor material having a composition formula of Al x In y Ga (1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). can do. The first conductive semiconductor layer 122 may be formed of any one or more of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP, InP.

The first conductivity-type semiconductor layer 122 may correspond to a large area chip of 1 mm × 1 mm (1 mm 2 ), for example, an area of 900 μm × 900 μm (810000 μm 2 ) or more.

The active layer 124 has an energy inherent to a material in which electrons injected through the first conductive semiconductor layer 122 and holes injected through the second conductive semiconductor layer 126 formed thereafter meet each other to form the active layer 124. It is a layer that emits light with energy determined by the band.

The active layer 124 may include a double junction structure, a single quantum well structure, a multi quantum well structure (MQW), a quantum-wire structure, or a quantum dot structure. It may be formed of at least one. For example, the active layer 124 may be injected with trimethyl gallium gas (TMGa), ammonia gas (NH 3 ), nitrogen gas (N 2 ), and trimethyl indium gas (TMIn) to form a multi-quantum well structure. It is not limited.

The well layer / barrier layer of the active layer 124 is, for example, any one of InGaN / GaN, InGaN / InGaN, GaN / AlGaN, InAlGaN / GaN, InAlGaN / InAlGaN, GaAs (InGaAs) / AlGaAs, GaP (InGaP) / AlGaP. It may be formed of one or more pair structure, but is not limited thereto. The well layer may be formed of a material having a bandgap narrower than the bandgap of the barrier layer.

A conductive clad layer (not shown) may be formed on and / or below the active layer 124. The conductive clad layer may be formed of a semiconductor having a band gap wider than the band gap of the barrier layer of the active layer. For example, the conductive clad layer may include GaN, AlGaN, InAlGaN, superlattice structure, or the like. In addition, the conductive clad layer may be doped with n-type or p-type.

The second conductive semiconductor layer 126 may be formed of a semiconductor compound. The second conductive semiconductor layer 126 may be implemented with compound semiconductors such as Groups 3-5 and 2-6, and may be doped with the second conductive dopant. For example, it may include a semiconductor material having a compositional formula of In x Al y Ga 1 -x- y N (0≤x≤1, 0≤y≤1, 0≤x + y≤1). When the second conductive semiconductor layer 126 is a P-type semiconductor layer, the second conductive dopant may include Mg, Zn, Ca, Sr, Ba, and the like as a P-type dopant.

The plurality of second conductive semiconductor layers separated by the trench region T may have an area of 90000 μm 2 or more.

Unevenness may be formed on the surface of the light emitting structure 120, that is, the surface of the second conductivity-type semiconductor layer 126 to increase the light extraction effect.

The first conductive semiconductor layer 122 may be a P-type semiconductor layer, and the second conductive semiconductor layer 126 may be an N-type semiconductor layer. In addition, an N-type semiconductor layer (not shown) may be formed on the second conductive semiconductor layer 126 when the semiconductor having a polarity opposite to that of the second conductive type, for example, the second conductive semiconductor layer is a P-type semiconductor layer. Accordingly, the light emitting structure can be implemented by any one of an N-P junction structure, a P-N junction structure, an N-P-N junction structure, and a P-N-P junction structure.

The reflective ohmic layer 130 may be disposed on the second conductivity type semiconductor layer 126. For example, when the second conductivity-type semiconductor layer 126 is a P-type nitride semiconductor layer, a thin translucent metal or a transparent metal to improve the interface property between the second electrode 160 and the second conductivity-type semiconductor layer 126. It can be arranged as an oxide layer.

The reflective ohmic layer 130 is a transparent oxide-based material having a high transmittance with respect to the emission wavelength, for example, indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), and IAZO. (Indium Aluminum Zinc Oxide), IGZO (Indium Gallium Zinc Oxide), IGTO (Indium Gallium Tin Oxide), AZO (Aluminium Zinc Oxide), ATO (Aluminium Tin Oxide), GZO (Gallium Zinc Oxide), IrOx, RuOx, RuOx / One or more of ITO, Ni, Ag, Ni / IrOx / Au or Ni / IrOx / Au / ITO may be used to implement a single layer or multiple layers.

The current spread layer 140 may be disposed on the reflective ohmic layer 130, and when the second conductivity type semiconductor layer 126 is a P type nitride based semiconductor layer, current injection or current spreading may be performed. (current spread) may be disposed to supplement the thin film characteristics of the P-type nitride-based semiconductor layer is relatively poor. The current spread layer 150 is a transparent and electrically conductive semi-transparent conductive material having a good ohmic contact characteristics, for example, a metal such as nickel (Ni) or gold (Au) and then heat-treated at an appropriate temperature and gas atmosphere It may be formed into a thin film.

The passivation layer 150 is formed on top and side surfaces of the current spread layer 140, the reflective ohmic layer 130, and the second conductive semiconductor layer 126, and the active layer 124 and the first conductive semiconductor layer 122. It can be placed on the side. In addition, the passivation layer 140 may cover a portion of the exposed trench region T4. The passivation layer 150 may be made of an insulating material. The insulating material may be made of a nonconductive oxide or nitride. For example, the passivation layer 150 may be formed of a silicon oxide (SiO 2 ) layer, an oxynitride layer, or an aluminum oxide layer. .

 The first electrode 160 may be disposed in the trench region T4 in which a portion of the first conductive semiconductor layer 122 is exposed. The first electrode 160 may be formed in a single layer or a multilayer structure including at least one of aluminum (Al), titanium (Ti), chromium (Cr), nickel (Ni), copper (Cu), and gold (Au). have. Since the first electrode 160 is formed to have a width of at least 50 μm to 100 μm, for example, a negative power may be supplied to the light emitting device 100.

The first electrode 160 may be in contact with the ohmic layer 165 below. The ohmic layer 165 may be disposed on the first conductive semiconductor layer 122 exposed to the trench region T, and may be formed to be wider than the first electrode 160. Ohmic contact with layer 122. The ohmic layer 165 serves to smoothly supply power to the light emitting structure 120 from the first electrode 160. For example, the ohmic layer 165 may include at least one of In, Zn, Ag, Sn, Ni, and Pt.

The second electrode 170 may be disposed on the plurality of second conductive semiconductor layers 126 separated by the trench region T, and may be disposed on the current spread layer 140, for example. The first electrode 160 may be formed in a single layer or a multilayer structure including at least one of aluminum (Al), titanium (Ti), chromium (Cr), nickel (Ni), copper (Cu), and gold (Au). have. Since the second electrode 170 is formed to have a width of at least 50 μm to 100 μm, for example, a positive power may be supplied to the light emitting device 100.

For example, the trench region T4 may be a region where a portion of the first conductivity type semiconductor layer 122 is mesa etched. An exposed surface of the first conductivity-type semiconductor layer 122 exposed by the mesa etching may be lower than a lower surface of the active layer 124.

The width of the trench region T4 in which the first electrode 160 is disposed is at least 10 μm larger than the width of the first electrode 160, and is disposed at least 50 μm to 100 μm, whereby the first electrode 160 is disposed. And damage due to electrical interference and / or physical influence between the adjacent light emitting structures 120 may be prevented.

5 is a partial cross-sectional view of a flip chip structure including a light emitting device 100 according to an embodiment, and FIG. 6 is a partial plan view of a bottom surface of a flip chip according to an embodiment.

5 and 6, the light emitting device 100 includes a substrate 100 mounted on a sub-mount 200, a buffer layer 115, a light emitting structure 120, a reflective ohmic layer 130, and current. The spread layer 140 includes a current spread 140, a passivation layer 150, a first electrode 160, an ohmic layer 165, and a second electrode 170.

The submount 200 is a substrate for flip chip mounting the light emitting device 100 and may include a first electrode pad 180 and a second electrode pad 190.

The plurality of first electrodes 160 may be electrically connected to the first electrode pad 180, and the plurality of second electrodes 190 may be electrically connected to the second electrode pad 190.

The first electrode pad 180 may be connected by surface contact with the plurality of first electrodes 160, and the second electrode pad 190 may be connected by surface contact with the plurality of second electrodes 190. have. Various wafer bonding techniques may be used for the flip chip mounting, for example, metal bond bonds may be employed.

The first electrode pad 180 may be disposed in a finger structure corresponding to the plurality of first electrodes 160, and the second electrode pad 190 may likewise correspond to the plurality of second electrodes 170. It may be arranged in a finger structure.

The fingers of the first electrode pad 180 and the fingers of the second electrode pad 190 may be spaced apart from each other to be electrically insulated from each other. In addition, the fingers of the first electrode pad 180 and the fingers of the second electrode pad 190 may be alternately disposed.

Submount 200 may be formed from many different materials, such as silicon, ceramic, alumina, aluminum nitride, silicon carbide, sapphire, or polymerizable materials such as polyimide and polyester. Submount 200 may include any other suitable material, such as a printed circuit board (PCB), or a T-Clad thermal clad insulated substrate material available from The Bergguist Company (Chanhassen, Minn). For PCB embodiments, various PCB types may be used, such as a standard FR-4 metal core PCB, or any other type of printed circuit board. In addition, the submount 200 may include a high reflectance material, such as a reflective ceramic, a dielectric, or a metal reflector such as silver to enhance light extraction from the light emitting device 100.

7 is a view showing an embodiment of a light emitting device package.

The light emitting device package 300 according to the embodiment may be installed in the package body 310, the first lead frame 321 and the second lead frame 322 installed in the package body 310, and the package body 310. The light emitting device 100 is electrically connected to the first lead frame 321 and the second lead frame 322, and a molding part 340 covering the surface or the side surface of the light emitting device 100.

The package body 310 may include a silicon material, a synthetic resin material, or a metal material. An inclined surface may be formed around the light emitting device 100 to increase light extraction efficiency.

The first lead frame 321 and the second lead frame 322 are electrically separated from each other, and provide power to the light emitting device 100. In addition, the first lead frame 321 and the second lead frame 322 may increase the light efficiency by reflecting the light generated from the light emitting device 100, the heat generated from the light emitting device 100 to the outside It can also play a role.

The light emitting device 100 may be installed on the package body 310 or on the first lead frame 321 or the second lead frame 322. The light emitting device 100 may be electrically connected to the first lead frame 321 and the second lead frame 322 by any one of a flip chip method and a die bonding method.

The molding part 340 may surround and protect the light emitting device 100. In addition, the phosphor 350 may be included in the molding part 340 to change the wavelength of light emitted from the light emitting device 100.

In the light emitting device package 300 according to the embodiment, the light extraction structure is disposed in the light emitting device 100 to improve the light extraction characteristics.

The light emitting device package 300 may be mounted on one or a plurality of light emitting devices according to the embodiments described above, but the present invention is not limited thereto.

A plurality of light emitting device packages according to the embodiment may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, or the like, which is an optical member, may be disposed on an optical path of the light emitting device package. Such a light emitting device package, a substrate, and an optical member can function as a light unit. Another embodiment may be implemented as a display device, an indicator device, or a lighting system including the semiconductor light emitting device or the light emitting device package described in the above embodiments, and for example, the lighting system may include a lamp or a street lamp. . Hereinafter, a head lamp and a backlight unit will be described as an embodiment of an illumination system in which the above-described light emitting device package is disposed.

8 is a diagram illustrating an embodiment of a head lamp including a light emitting device package.

In the head lamp 700 according to the embodiment, after the light emitted from the light emitting device module 710 in which the light emitting device package is disposed is reflected by the reflector 720 and the shade 730, the head lamp 700 passes through the lens 740 to move the front of the vehicle body. Can head.

As described above, since the light extraction efficiency of the light emitting device used in the light emitting device module 710 may be improved, the optical characteristics of the entire head lamp may be improved.

The light emitting device package included in the light emitting device module 710 may include a plurality of the light emitting devices described above, but is not limited thereto.

9 is a diagram illustrating an example embodiment of a display device in which a light emitting device package is disposed.

As shown in FIG. 9, the display device 800 according to the exemplary embodiment is disposed in front of the light source modules 830 and 835, the reflector 820 on the bottom cover 810, and the reflector 820. A light guide plate 840 for guiding light emitted from the light source module to the front of the display device, a first prism sheet 850 and a second prism sheet 860 disposed in front of the light guide plate 840, and the second prism And a panel 870 disposed in front of the sheet 860 and a color filter 880 disposed throughout the panel 870.

The light source module includes the above-described light emitting device package 835 on the circuit board 830. Here, the PCB 830 may be used as the circuit board 830, and the light emitting device package 835 is as described with reference to FIG. 7.

The bottom cover 810 may receive components in the display device 800. The reflective plate 820 may be provided as a separate component as shown in the figure, or may be provided in the form of a high reflective material on the rear surface of the light guide plate 840 or the front surface of the bottom cover 810. Do.

Here, the reflection plate 820 can be made of a material having a high reflectance and can be used in an ultra-thin shape, and polyethylene terephthalate (PET) can be used.

The light guide plate 840 scatters light emitted from the light emitting device package module so that the light is uniformly distributed over the entire screen area of the LCD. Accordingly, the light guide plate 830 is made of a material having a good refractive index and a high transmittance, and may be formed of polymethylmethacrylate (Pmma), polycarbonate (Pc), polyethylene (PE), or the like. In addition, the light guide plate may be omitted, and thus an air guide method in which light is transmitted in the space on the reflective sheet 820 may be possible.

The first prism sheet 850 is formed of a translucent and elastic polymer material on one surface of the support film, and the polymer may have a prism layer in which a plurality of three-dimensional structures are repeatedly formed. Here, the plurality of patterns may be provided in the stripe type and the valley repeatedly as shown.

In the second prism sheet 860, the direction of the floor and the valley of one surface of the support film may be perpendicular to the direction of the floor and the valley of one surface of the support film in the first prism sheet 850. This is to evenly distribute the light transmitted from the light source module and the reflective sheet in all directions of the panel 870.

In the present embodiment, the first prism sheet 850 and the second prism sheet 860 form an optical sheet, which is composed of another combination, for example, a micro lens array or a diffusion sheet and a micro lens array. Or a combination of one prism sheet and a micro lens array.

The liquid crystal display panel (Liquid Crystal Display) may be disposed on the panel 870, in addition to the liquid crystal display panel 860 may be provided with other types of display devices that require a light source.

The panel 870 is a state in which the liquid crystal is located between the glass body and the polarizing plate is placed on both glass bodies in order to use the polarization of light. Here, the liquid crystal has an intermediate property between a liquid and a solid, and liquid crystals, which are organic molecules having fluidity like a liquid, are regularly arranged like crystals. The liquid crystal has a structure in which the molecular arrangement is changed by an external electric field And displays an image.

The liquid crystal display panel used in the display device uses a transistor as a switch for regulating the voltage supplied to each pixel as an active matrix method.

The front surface of the panel 870 is provided with a color filter 880 to transmit the light projected from the panel 870, only the red, green and blue light for each pixel can represent an image.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

100: light emitting element, 110: substrate,
115: buffer layer, 120: light emitting structure,
130: reflective ohmic layer, 140: current spread layer,
150: passivation layer, 160: first electrode,
170: second electrode, 180: first electrode pad,
190: a second electrode pad.

Claims (15)

Board;
A light emitting structure stacked on the substrate in order of a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer;
A first electrode formed on a portion of the first conductive semiconductor layer that is exposed;
And a second electrode disposed on the second conductive semiconductor layer.
The light emitting structure includes a trench region exposing a portion of the first conductivity type semiconductor layer in a first direction and a second direction. The method according to claim 1,
The first electrode is disposed on the first conductivity type semiconductor layer in which the trench regions in the first and second directions cross each other. The method of claim 2,
The width of the trench region of the region crossing in the first and second directions is 50㎛ to 100㎛. The method according to claim 1,
The first conductive semiconductor layer has an area of 810000 μm 2 or more. The method according to claim 1,
And a plurality of the second conductivity type semiconductor layers separated by the trenches have an area of 90000 µm 2 or more. The method according to claim 1,
The second electrode is disposed in each of the plurality of second conductive semiconductor layers separated by the trench region. The method according to claim 1,
The first and second directions of the trench region are perpendicular to each other. The method according to claim 1,
A light emitting device in which the trench regions in the first and second directions cross over. The method according to claim 1,
The first electrode and the second electrode is connected to the first electrode pad and the second electrode pad mounted on the submount, respectively. The method of claim 8,
The first electrode is in surface contact with the first electrode pad, and the second electrode is in surface contact with the second electrode pad. The method according to claim 1,
The first electrode pad and the second electrode pad are respectively mounted on the submount in a finger structure (finger) structure. The method of claim 10,
The finger of the first electrode pad and the finger of the second electrode pad are spaced apart from each other, the light emitting device is disposed alternately. The method according to claim 1,
And a reflective ohmic layer and a current spreading layer between the second conductive semiconductor layer and the second electrode. The method according to claim 1,
And a passivation layer covering at least one top, side, and part of the exposed trench region of at least one light emitting structure. The method according to claim 1,
The light emitting device further comprises an ohmic layer between the lower portion of the first electrode and the first conductive semiconductor layer.




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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180109270A (en) * 2017-03-27 2018-10-08 엘지이노텍 주식회사 Semiconductor device
WO2018190618A1 (en) * 2017-04-10 2018-10-18 엘지이노텍 주식회사 Semiconductor device
CN111863853A (en) * 2019-04-24 2020-10-30 深圳第三代半导体研究院 Vertical integrated unit diode chip
US11329097B2 (en) 2017-03-27 2022-05-10 Suzhou Lekin Semiconductor Co., Ltd. Semiconductor device having a first pad not overlapping first connection electrodes and a second pad not overlapping second connection electrodes in a thickness direction

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20180109270A (en) * 2017-03-27 2018-10-08 엘지이노텍 주식회사 Semiconductor device
US11329097B2 (en) 2017-03-27 2022-05-10 Suzhou Lekin Semiconductor Co., Ltd. Semiconductor device having a first pad not overlapping first connection electrodes and a second pad not overlapping second connection electrodes in a thickness direction
WO2018190618A1 (en) * 2017-04-10 2018-10-18 엘지이노텍 주식회사 Semiconductor device
CN111863853A (en) * 2019-04-24 2020-10-30 深圳第三代半导体研究院 Vertical integrated unit diode chip

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