KR20130051115A - Device for treating wafer - Google Patents

Device for treating wafer Download PDF

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Publication number
KR20130051115A
KR20130051115A KR1020110116277A KR20110116277A KR20130051115A KR 20130051115 A KR20130051115 A KR 20130051115A KR 1020110116277 A KR1020110116277 A KR 1020110116277A KR 20110116277 A KR20110116277 A KR 20110116277A KR 20130051115 A KR20130051115 A KR 20130051115A
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KR
South Korea
Prior art keywords
wafer
alignment
unit
sensor unit
optical sensor
Prior art date
Application number
KR1020110116277A
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Korean (ko)
Inventor
이영호
문영희
오민용
Original Assignee
주식회사 엘지실트론
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Application filed by 주식회사 엘지실트론 filed Critical 주식회사 엘지실트론
Priority to KR1020110116277A priority Critical patent/KR20130051115A/en
Publication of KR20130051115A publication Critical patent/KR20130051115A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67259Position monitoring, e.g. misposition detection or presence detection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/68Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The wafer processing apparatus of the embodiment includes a first alignment portion for aligning a flat surface of a wafer, a processing portion including a processing stage for processing a wafer, and a center of a wafer for which the flat surface is aligned. It includes a second alignment portion to align to the center of the.

Description

Wafer processing device {Device for treating wafer}

Embodiments relate to a wafer processing apparatus.

Generally, a wafer processing apparatus for manufacturing a semiconductor device performs alignment of a wafer before loading the wafer into a processing stage where each process is performed.

The alignment is a first pre-alignment for aligning a reference point such as a flat zone before loading the wafer into a machining stage, and a centering unit centering the center of the wafer transferred to the machining stage. (centering unit) to include a second alignment (fine-alignment) to align the centering.

1 is a view showing a conventional primary aligning device 10, FIG. 2 is a top view of the primary aligning device 10 on which the wafers W: W1 and W2 are seated. 3 shows a conventional secondary alignment apparatus 1.

Referring to FIG. 1, if the first alignment is not recognized by the optical sensors 15 and 16 arranged on two straight lines, the flat surface of the wafer seated on the stage 11 is flat. Use the method to determine that the part is in place.

However, in the related art, since the two optical sensors 15 and 16 are used as shown in FIG. 1, the sensor member 14 is disassembled and decomposed every time the wafers W1 and W2 having different diameters are aligned. There was an inconvenience in that the positions of the sensors 15 and 16 had to be readjusted to the size of the wafer. Specifically, in order to detect the 6-inch wafer W2 by the optical sensors 15 and 16 that were detecting the 4-inch wafer W1, it is inconvenient to reposition the optical sensors 15 and 16 in the direction of the arrow. .

The secondary alignment will be referred to as a process of centering the center of the wafer W and a processing stage (not shown), hereinafter, a centering process. Referring to FIG. 3, the centering unit 1 is used to center the wafer W and the processing stage.

The centering unit 1 is a wafer stopper for centering the wafer W and the machining stage while pushing the sides of the wafer W by a distance set by micrometers 3, 5, and 7 at three points. (4, 6, 8). However, in the related art, the calculation is complicated because the position must be calculated diagonally to adjust the centering at three point points.

Embodiments provide a wafer processing apparatus capable of increasing the efficiency of wafer processing and improving productivity by increasing the accuracy of wafer alignment prior to loading a wafer into a processing stage.

The wafer processing apparatus of the embodiment includes a first alignment portion for aligning a flat surface of a wafer, a processing portion including a processing stage for seating the wafer and processing the wafer, and the flat surface is frozen. And a second alignment portion for aligning the center of the wafer to the center of the processing stage.

The first alignment portion includes a stage on which the wafer is seated, a rotation portion for rotating the stage, a sensor portion disposed below the wafer and generating a signal regarding a state of the wafer, and the sensor portion applied from the sensor portion. It may include a control unit for controlling the rotation of the rotating unit based on the signal.

The sensor unit includes a wafer detection sensor unit for determining whether the wafer is seated on the processing stage and a wafer alignment sensor unit for detecting a flat surface alignment of the wafer due to a signal of the wafer presence sensor unit. can do.

The wafer detection sensor unit may be configured of at least one optical sensor.

The optical sensor emits light and detects reflected light to generate a signal regarding the presence or absence of the wafer.

The wafer alignment sensor unit may include a first optical sensor unit and a second optical sensor unit for detecting a flat surface alignment of at least two different size wafers.

The first optical sensor unit and the second optical sensor unit may be disposed on mounting members having different distances from the center of the wafer in a plane.

The first and second photosensors may emit light on the edge of the wafer and generate an alignment signal or a misalignment signal by sensing the reflected light.

The controller may control the rotation of the rotating unit due to the alignment signal or the misalignment signal of the first or second optical sensor unit.

The second alignment unit may include a wafer buffer unit and a plurality of wafer guides mounted around the processing unit.

The wafer buffer unit may be disposed at a position corresponding to the flat surface of the wafer, and the plurality of wafer guides and the wafer buffer unit may be spaced apart at equal intervals.

The plurality of wafer guides comprise a micrometer that generates a signal about the distance the wafer should move so that the center of the wafer is aligned with the center of the stage and the wafer based on the signal about the distance applied from the micrometer. It may include a first wafer stopper for moving the wafer by pushing the circumferential surface of the.

The wafer buffer unit may include a second wafer stopper pushed by the wafer moved by the wafer guide and a spring connected to the second wafer stopper to elastically absorb the pressure applied to the wafer from the wafer guide.

The first wafer stopper may move at the same time by driving one motor.

The plurality of wafer guides may include a first wafer guide, a second wafer guide, and a third wafer guide disposed at equal intervals.

1 to 3 is a view showing a conventional wafer processing apparatus,
4 is a partial block diagram of a wafer processing apparatus according to an embodiment;
5 is a view showing a first alignment unit according to an embodiment;
FIG. 6 is a top view of the first alignment unit 200 on which the 4 inch wafer is seated.
FIG. 7 is a top view of the first alignment unit 200 on which the 6-inch wafer is seated.
FIG. 8 is a diagram for describing a first alignment of the first alignment unit 200.
9 is a view illustrating a second alignment unit of the embodiment;
FIG. 10 is a view including a wafer W seated on a second alignment portion.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

In the description of the embodiment according to the present invention, when described as being formed on the "on or under" of each element, the (up) or down (on) or under) includes both two elements being directly contacted with each other or one or more other elements are formed indirectly between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. In addition, the size of each component does not necessarily reflect the actual size.

4 is a partial block diagram of a wafer processing apparatus according to an embodiment.

Referring to FIG. 4, the wafer processing apparatus 100 according to the embodiment includes a first alignment unit 200, a processing unit 400, and a second alignment unit 300.

The first alignment unit 200 allows the flat direction of the wafer to always be aligned at the same position before loading the wafer into the processing stage of the processing unit 400.

 The wafer that is first aligned by the first alignment unit 200 is transferred to a later processing stage and subjected to a second alignment, wherein the wafer is aligned through the first alignment. Since it is fixed in a fixed direction, the second alignment can finally improve the accuracy of the wafer alignment.

The processing unit 400 includes a processing stage for horizontally supporting a wafer and processing the wafer.

The second aligning unit 400 performs a second aligning of the center C of the wafer transferred from the first aligning unit 200 to the processing unit 400 with the center of the processing stage. Use a centering unit. The centering unit centers the wafer and the processing stage, thereby preventing the wafer from being lost.

5 is a diagram illustrating the first alignment unit 200 according to an embodiment.

Referring to FIG. 5, the first alignment unit 200 may include a stage 110, a rotating unit 120, a controller 130, and a sensor unit 135.

The stage 110 may support the wafers W: W1 and W2 by vacuum suction.

The rotating unit 120 rotates the stage 110 at an angle within 360 ° so that the flat surfaces of the wafers W: W1 and W2 are aligned in a predetermined direction.

The sensor unit 135 may be disposed on the mounting member 50 fixed to a lower portion spaced apart from the wafer W1 / W2 by a predetermined distance. The sensor unit 135 is a wafer detection sensor unit 150 for detecting the presence of wafers and a wafer alignment sensor for detecting a flat alignment of wafers W1 / W2 of different sizes. It is composed of a unit (160).

The wafer detection sensor unit 150 may check whether the wafers W1 / W2 are seated on the stage 110. The wafer detection sensor unit 150 may be configured of at least one optical sensor 51.

The optical sensor 51 may emit light toward the stage 110, and detect light reflected and returned to determine whether the wafer is seated on the stage 110. When the light emitted to the stage 110 is reflected and returned, the wafer W1 / W2 is seated on the stage 110. The wafer presence sensor 51 displays an ON signal and emits light. If the light does not return, the wafer W1 / W2 is not seated on the stage 110, and the wafer presence sensor 51 may display an OFF signal.

The wafer alignment sensor unit 160 may include first and second optical sensor units 52 and 54 and second and second optical sensor units 62 and 64 that detect at least two or more wafers W1 and W2 of different sizes. have. In the embodiment, the first and second optical sensor units 52, 54, 62, and 64 for sensing the flat surface alignment of two wafers W1 / W2 having different sizes are illustrated. As the number increases, the light sensor unit may be further included.

Since the first and second optical sensor units 52 and 54 detect edge surfaces of the wafers W1 and W2 having different sizes, respectively, the first and second optical sensor units 52 and 54 detect the edges of the wafers W1 and W2. It is preferable that the distance spaced on the plane is disposed on different mounting members 50.

Here, referring to FIG. 6, the edge of the wafer W corresponds between a radius from the center C of the wafer to the flat surface and a radius from the center C to the circumferential surface of the wafer. We will define it as a part.

The first optical sensor units 52 and 54 and the second optical sensor units 62 and 64 may be turned on or turned off depending on the size of the wafer to be detected. In this case, the turn-on or turn-off of the first optical sensor units 52 and 54 and the second optical sensor units 62 and 64 may be selected by a switch (not shown).

FIG. 6 is a top view of the first alignment unit 200 on which the wafer W1 of the first size is seated, and FIG. 7 is a first alignment unit 200 on which the wafer W2 of the second size is mounted. 8 is a top view from above, and FIG. 8 is an exemplary view for explaining driving of the alignment unit 200.

Hereinafter, the operation of the first alignment unit 200 will be described with reference to FIGS. 5 to 8.

When the wafer W1 of the first size is seated on the stage 110 of the first alignment unit 200, the rotating unit 120 may rotate the first size wafer W1 within 360 ° while rotating.

At this time, the second optical sensor units 62 and 64 are turned off by the switch (not shown), and the first optical sensor units 52 and 54 are turned on. The turned on first photosensors 52 and 54 emit light vertically toward the edge of the rotating wafer W1 of the first size, and detect the reflected light to return the first photosensors 52,. It is possible to determine whether the edge of the wafer W1 of the first size located vertically above 54 is a circumferential surface portion or a flat surface portion.

That is, when the circumferential surface portion Round is positioned above the first optical sensor units 52 and 54, the light emitted from the first optical sensor units 52 and 54 contacts the edge of the wafer W1. By reflecting to the first optical sensor units 52 and 54, it is sensed that the circumferential surface portion Round of the wafer W1 is located above the first optical sensor units 52 and 54.

Since the state where the flat surface portion Flat of the wafer W1 is positioned vertically above the first optical sensor units 52 and 54 is detected as an aligned state, the above-mentioned example is mis-aligned. Is recognized.

When the wafer W1 is recognized as a misaligned state, the first photosensors 52 and 54 transmit a misalignment signal to the controller 130, and the controller 130 rotates based on the misalignment signal. By rotating the 120, the wafer W1 seated on the stage 110 is rotated at an angle within 360 °.

When the wafer W1 is rotated by the rotating unit 120, the flat surface portion Flat of the wafer W1 is a point perpendicular to the two optical sensors of the first optical sensor units 52 and 54.

At this time, the light emitted vertically upward from the first optical sensor units 52 and 54 does not touch the edge of the wafer W1, so that the light emitted from the first optical sensor units 52 and 54 is not reflected back. . This state in which the two optical sensors constituting the first optical sensor units 52 and 54 do not simultaneously recognize the wafer W1 can be recognized as a state in which the flat surface of the wafer W1 is aligned.

Here, the first optical sensor units 52 and 54 or the second optical sensor units 62 and 64 may operate only when the wafer presence sensor 51 displays the ON signal. The first optical sensor unit 52, 54 or the second optical sensor unit 62, 64 may emit light only when the wafer W1 / W2 is seated on the stage 110 due to the wafer presence sensor unit 51. It is possible to accurately determine that the flat surface of the wafers W1 / W2 is aligned when the light is not reflected. That is, when the wafer presence sensor 51 displays the OFF signal, even if the first photosensor 52, 54 or the second photosensor 62, 64 does not reflect light, the wafer ( W1 / W2) may not be mistaken to determine that the flat surface is aligned.

When the first photosensors 52 and 54 detect an alignment state in which the flat surface portion Flat of the wafer W1 is disposed in parallel in the vertical direction, the first photosensors 52 and 54 transmit an alignment signal to the controller 130 and the controller 130. ) Stops the rotation of the rotating unit 120 based on the alignment signal to stop the rotation of the wafer (W1).

Subsequently, when the wafer W2 of the second size having a diameter different from that of the first size wafer W1 is seated on the stage 110, the first light is switched by a switch (not shown) as shown in FIG. 7. The sensor sections 52 and 54 are turned off, and the second optical sensor sections 62 and 64 are turned on.

Similar to the method in which the first optical sensor units 52 and 54 detect the flat surface of the wafer W1 of the first size, the second optical sensor units 62 and 64 are the wafer W2 of the second size. The flat surface of can be detected.

Referring to FIGS. 5 and 8, the driving of the first alignment unit 200 will be described in detail. The flat surface of the wafer W2 is perpendicular to the second optical sensor units 62 and 64 so that only one optical sensor is driven. If it overlaps and does not overlap with another optical sensor, it may be recognized as a misaligned state.

That is, the first alignment unit 200 has a straight line in which two light sensors 62 and 64 are arranged in a straight line on the flat surface of the wafer W2 constituting the second light sensor units 62 and 64. Since the state parallel to the line is defined as an alignment state, the two light beams are not parallel to the straight line of the two optical sensors 62 and 64 at a predetermined angle and are not parallel to each other. If the sensing response of the sensors 62 and 64 is different from each other, it is recognized as a misaligned state.

Since one optical sensor 62 recognizes the edge surface of the wafer W2 and the other optical sensor 64 detects the flat surface of the wafer W2, the second optical sensor portions 62 and 64 This is detected as a misaligned state, and transmits a misaligned signal to the controller 130. The controller 130 rotates the rotating unit 120 based on the miss alignment signal.

The wafer W2 seated on the stage 110 is rotated by the rotating unit 120. When the wafer W2 is rotated and both optical sensors 62 and 64 fail to detect the wafer W2, the flat surface Flat of the wafer W2 freezes on the target alignment line D. In the closed state, the second photosensors 62 and 64 transmit an alignment signal to the controller 130. The rotation unit 120 may finish the primary alignment for fixing the flat surface Flat of the wafer W2 to the target alignment line D by stopping the rotation unit 120 based on the alignment signal.

FIG. 9 is a view illustrating a second alignment unit 300 according to an embodiment, and FIG. 10 is a view including a wafer W seated on the second alignment unit 300.

9 and 10, the second alignment unit 300 includes a wafer buffer unit A and a wafer guide unit B. As shown in FIG. The wafer buffer portion A and the wafer guide portion B of the embodiment take a structure in which four positions are arbitrarily set around a machining portion (not shown).

The wafer buffer portion A is disposed at a point corresponding to the flat surface of the wafer to be seated, and the wafer guide portion B is disposed at a predetermined distance from the circumferential surface of the wafer.

The wafer guide portion B includes a plurality of wafer guide portions 420, 430, and 440, and the plurality of wafer guide portions 420, 430, and 440 are micrometers 70, 72, and 74, respectively. Stoppers 34, 36, 38.

Micrometers 70, 72, and 74 generate a signal regarding the distance the wafer must travel so that the center of the wafer W is aligned with the center (not shown) of the stage.

The first wafer stoppers 34, 36, 38 move in the direction of the center of the wafer W based on the signal regarding the distance that the applied wafer W from the micrometers 70, 72, 74 should move. The center C of the wafer W is aligned with the center of the stage while pushing the circumferential surface (Round) of the wafer.

The wafer buffer portion A includes the second wafer stoppers 30 and 32 and the springs 40 and 42.

Since the second wafer stoppers 30 and 32 are not fixed but connected to the springs 40 and 42, they are pushed by the wafer moving by the plurality of wafer guide portions 420, 430, and 440. In this case, stress applied to the wafer from the wafer guides 420, 430, and 440 may be alleviated by the elasticity of the springs 40 and 42.

That is, the wafer buffer portion A may reduce mechanical stress caused by the contact between the wafer and the wafer guide portions 420, 430, and 440.

When the wafer guides 420, 430, and 440 at three points push simultaneously the circumferential surface (Round) of the wafer W in the center direction, the impact of the wafer guides 420, 430, and 440 is caused by the wafer W ), But because the wafer buffer portion A pushed by the flat surface of the wafer is not fixed and has fluidity by the springs 40 and 42, the impact of the wafer W is caused by the wafer buffer portion A. Can be alleviated.

Here, the first wafer stoppers 34, 36, and 38 may be simultaneously moved by driving one motor 20.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

110: stage, 120: rotating part
130: sensor portion 52, 54: first optical sensor portion
62, 64: second optical sensor unit, 34, 36, 38: first wafer stopper
30, 32: second wafer stopper, 40, 42: spring

Claims (15)

A first alignment portion for aligning a flat surface of the wafer;
A processing unit on which the wafer is seated and including a processing stage for processing the wafer; And
And a second alignment portion for aligning the center of the wafer whose flat surface is aligned with the center of the processing stage.
The method of claim 1, wherein the first alignment portion
A stage on which the wafer is seated;
A rotating unit rotating the stage;
A sensor unit disposed under the wafer and generating a signal relating to a state of the wafer; And
And a controller for controlling rotation of the rotating unit based on the signal applied from the sensor unit.
The method of claim 2, wherein the sensor unit
A wafer detection sensor unit for determining whether or not the wafer is seated on the processing stage; And
And a wafer alignment sensor unit configured to detect a flat surface alignment of the wafer due to a signal of the wafer presence sensor unit.
The wafer processing apparatus of claim 3, wherein the wafer detection sensor unit comprises at least one optical sensor. The wafer processing apparatus of claim 4, wherein the optical sensor emits light and detects reflected light to generate a signal regarding the presence or absence of the wafer. 4. The wafer processing apparatus of claim 3, wherein the wafer alignment sensor unit comprises a first optical sensor unit and a second optical sensor unit configured to sense flat surface alignment of at least two different size wafers. The method of claim 6,
And the first optical sensor unit and the second optical sensor unit are disposed on mounting members having different distances from the center of the wafer in a plane.
The method of claim 7, wherein
The first and second optical sensor unit emits light on the edge surface of the wafer, and detects the reflected light to generate an alignment signal or a misalignment signal.
The method according to claim 2 or 8,
And the controller controls the rotation of the rotating unit due to the alignment signal or the misalignment signal of the first or second optical sensor unit.
The wafer processing apparatus of claim 1, wherein the second alignment unit comprises a wafer buffer unit and a plurality of wafer guides mounted around the processing unit. The wafer processing apparatus of claim 10, wherein the wafer buffer units are disposed at positions corresponding to the flat surface of the wafer, and the plurality of wafer guides and the wafer buffer units are spaced apart at equal intervals. The method of claim 11, wherein the plurality of wafer guides
A micrometer for generating a signal relating to the distance the wafer should move so that the center of the wafer is aligned with the center of the stage; And
And a first wafer stopper for moving the wafer by pushing a circumferential surface of the wafer based on the signal relating to the distance applied from the micrometer.
The method of claim 12,
The wafer buffer unit
A second wafer stopper pushed by the wafer moved by the wafer guide; And
And a spring connected to the second wafer stopper to elastically absorb the pressure applied to the wafer from the wafer guide.
The method of claim 12,
And the first wafer stopper moves simultaneously by one motor drive.
The method of claim 10,
The plurality of wafer guides include a first wafer guide, a second wafer guide and a third wafer guide disposed at equal intervals from each other.
KR1020110116277A 2011-11-09 2011-11-09 Device for treating wafer KR20130051115A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160112242A (en) * 2015-03-18 2016-09-28 세메스 주식회사 Inspecting method and Apparatus for treating a substrate
KR20170068419A (en) * 2017-06-01 2017-06-19 세메스 주식회사 Inspecting method and Apparatus for treating a substrate
KR102088270B1 (en) * 2018-10-04 2020-04-24 주식회사 디에스티시스템 Second alignment device for marking

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160112242A (en) * 2015-03-18 2016-09-28 세메스 주식회사 Inspecting method and Apparatus for treating a substrate
KR20170068419A (en) * 2017-06-01 2017-06-19 세메스 주식회사 Inspecting method and Apparatus for treating a substrate
KR102088270B1 (en) * 2018-10-04 2020-04-24 주식회사 디에스티시스템 Second alignment device for marking

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