KR20130051115A - Device for treating wafer - Google Patents
Device for treating wafer Download PDFInfo
- Publication number
- KR20130051115A KR20130051115A KR1020110116277A KR20110116277A KR20130051115A KR 20130051115 A KR20130051115 A KR 20130051115A KR 1020110116277 A KR1020110116277 A KR 1020110116277A KR 20110116277 A KR20110116277 A KR 20110116277A KR 20130051115 A KR20130051115 A KR 20130051115A
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- South Korea
- Prior art keywords
- wafer
- alignment
- unit
- sensor unit
- optical sensor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67259—Position monitoring, e.g. misposition detection or presence detection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The wafer processing apparatus of the embodiment includes a first alignment portion for aligning a flat surface of a wafer, a processing portion including a processing stage for processing a wafer, and a center of a wafer for which the flat surface is aligned. It includes a second alignment portion to align to the center of the.
Description
Embodiments relate to a wafer processing apparatus.
Generally, a wafer processing apparatus for manufacturing a semiconductor device performs alignment of a wafer before loading the wafer into a processing stage where each process is performed.
The alignment is a first pre-alignment for aligning a reference point such as a flat zone before loading the wafer into a machining stage, and a centering unit centering the center of the wafer transferred to the machining stage. (centering unit) to include a second alignment (fine-alignment) to align the centering.
1 is a view showing a conventional
Referring to FIG. 1, if the first alignment is not recognized by the
However, in the related art, since the two
The secondary alignment will be referred to as a process of centering the center of the wafer W and a processing stage (not shown), hereinafter, a centering process. Referring to FIG. 3, the centering unit 1 is used to center the wafer W and the processing stage.
The centering unit 1 is a wafer stopper for centering the wafer W and the machining stage while pushing the sides of the wafer W by a distance set by
Embodiments provide a wafer processing apparatus capable of increasing the efficiency of wafer processing and improving productivity by increasing the accuracy of wafer alignment prior to loading a wafer into a processing stage.
The wafer processing apparatus of the embodiment includes a first alignment portion for aligning a flat surface of a wafer, a processing portion including a processing stage for seating the wafer and processing the wafer, and the flat surface is frozen. And a second alignment portion for aligning the center of the wafer to the center of the processing stage.
The first alignment portion includes a stage on which the wafer is seated, a rotation portion for rotating the stage, a sensor portion disposed below the wafer and generating a signal regarding a state of the wafer, and the sensor portion applied from the sensor portion. It may include a control unit for controlling the rotation of the rotating unit based on the signal.
The sensor unit includes a wafer detection sensor unit for determining whether the wafer is seated on the processing stage and a wafer alignment sensor unit for detecting a flat surface alignment of the wafer due to a signal of the wafer presence sensor unit. can do.
The wafer detection sensor unit may be configured of at least one optical sensor.
The optical sensor emits light and detects reflected light to generate a signal regarding the presence or absence of the wafer.
The wafer alignment sensor unit may include a first optical sensor unit and a second optical sensor unit for detecting a flat surface alignment of at least two different size wafers.
The first optical sensor unit and the second optical sensor unit may be disposed on mounting members having different distances from the center of the wafer in a plane.
The first and second photosensors may emit light on the edge of the wafer and generate an alignment signal or a misalignment signal by sensing the reflected light.
The controller may control the rotation of the rotating unit due to the alignment signal or the misalignment signal of the first or second optical sensor unit.
The second alignment unit may include a wafer buffer unit and a plurality of wafer guides mounted around the processing unit.
The wafer buffer unit may be disposed at a position corresponding to the flat surface of the wafer, and the plurality of wafer guides and the wafer buffer unit may be spaced apart at equal intervals.
The plurality of wafer guides comprise a micrometer that generates a signal about the distance the wafer should move so that the center of the wafer is aligned with the center of the stage and the wafer based on the signal about the distance applied from the micrometer. It may include a first wafer stopper for moving the wafer by pushing the circumferential surface of the.
The wafer buffer unit may include a second wafer stopper pushed by the wafer moved by the wafer guide and a spring connected to the second wafer stopper to elastically absorb the pressure applied to the wafer from the wafer guide.
The first wafer stopper may move at the same time by driving one motor.
The plurality of wafer guides may include a first wafer guide, a second wafer guide, and a third wafer guide disposed at equal intervals.
1 to 3 is a view showing a conventional wafer processing apparatus,
4 is a partial block diagram of a wafer processing apparatus according to an embodiment;
5 is a view showing a first alignment unit according to an embodiment;
FIG. 6 is a top view of the
FIG. 7 is a top view of the
FIG. 8 is a diagram for describing a first alignment of the
9 is a view illustrating a second alignment unit of the embodiment;
FIG. 10 is a view including a wafer W seated on a second alignment portion.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.
In the description of the embodiment according to the present invention, when described as being formed on the "on or under" of each element, the (up) or down (on) or under) includes both two elements being directly contacted with each other or one or more other elements are formed indirectly between the two elements. Also, when expressed as "on or under", it may include not only an upward direction but also a downward direction with respect to one element.
The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. In addition, the size of each component does not necessarily reflect the actual size.
4 is a partial block diagram of a wafer processing apparatus according to an embodiment.
Referring to FIG. 4, the
The
The wafer that is first aligned by the
The
The
5 is a diagram illustrating the
Referring to FIG. 5, the
The
The rotating
The
The wafer
The optical sensor 51 may emit light toward the
The wafer
Since the first and second
Here, referring to FIG. 6, the edge of the wafer W corresponds between a radius from the center C of the wafer to the flat surface and a radius from the center C to the circumferential surface of the wafer. We will define it as a part.
The first
FIG. 6 is a top view of the
Hereinafter, the operation of the
When the wafer W1 of the first size is seated on the
At this time, the second
That is, when the circumferential surface portion Round is positioned above the first
Since the state where the flat surface portion Flat of the wafer W1 is positioned vertically above the first
When the wafer W1 is recognized as a misaligned state, the
When the wafer W1 is rotated by the
At this time, the light emitted vertically upward from the first
Here, the first
When the
Subsequently, when the wafer W2 of the second size having a diameter different from that of the first size wafer W1 is seated on the
Similar to the method in which the first
Referring to FIGS. 5 and 8, the driving of the
That is, the
Since one
The wafer W2 seated on the
FIG. 9 is a view illustrating a
9 and 10, the
The wafer buffer portion A is disposed at a point corresponding to the flat surface of the wafer to be seated, and the wafer guide portion B is disposed at a predetermined distance from the circumferential surface of the wafer.
The wafer guide portion B includes a plurality of
The
The wafer buffer portion A includes the
Since the
That is, the wafer buffer portion A may reduce mechanical stress caused by the contact between the wafer and the
When the wafer guides 420, 430, and 440 at three points push simultaneously the circumferential surface (Round) of the wafer W in the center direction, the impact of the wafer guides 420, 430, and 440 is caused by the wafer W ), But because the wafer buffer portion A pushed by the flat surface of the wafer is not fixed and has fluidity by the
Here, the
While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
110: stage, 120: rotating part
130:
62, 64: second optical sensor unit, 34, 36, 38: first wafer stopper
30, 32: second wafer stopper, 40, 42: spring
Claims (15)
A processing unit on which the wafer is seated and including a processing stage for processing the wafer; And
And a second alignment portion for aligning the center of the wafer whose flat surface is aligned with the center of the processing stage.
A stage on which the wafer is seated;
A rotating unit rotating the stage;
A sensor unit disposed under the wafer and generating a signal relating to a state of the wafer; And
And a controller for controlling rotation of the rotating unit based on the signal applied from the sensor unit.
A wafer detection sensor unit for determining whether or not the wafer is seated on the processing stage; And
And a wafer alignment sensor unit configured to detect a flat surface alignment of the wafer due to a signal of the wafer presence sensor unit.
And the first optical sensor unit and the second optical sensor unit are disposed on mounting members having different distances from the center of the wafer in a plane.
The first and second optical sensor unit emits light on the edge surface of the wafer, and detects the reflected light to generate an alignment signal or a misalignment signal.
And the controller controls the rotation of the rotating unit due to the alignment signal or the misalignment signal of the first or second optical sensor unit.
A micrometer for generating a signal relating to the distance the wafer should move so that the center of the wafer is aligned with the center of the stage; And
And a first wafer stopper for moving the wafer by pushing a circumferential surface of the wafer based on the signal relating to the distance applied from the micrometer.
The wafer buffer unit
A second wafer stopper pushed by the wafer moved by the wafer guide; And
And a spring connected to the second wafer stopper to elastically absorb the pressure applied to the wafer from the wafer guide.
And the first wafer stopper moves simultaneously by one motor drive.
The plurality of wafer guides include a first wafer guide, a second wafer guide and a third wafer guide disposed at equal intervals from each other.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110116277A KR20130051115A (en) | 2011-11-09 | 2011-11-09 | Device for treating wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110116277A KR20130051115A (en) | 2011-11-09 | 2011-11-09 | Device for treating wafer |
Publications (1)
Publication Number | Publication Date |
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KR20130051115A true KR20130051115A (en) | 2013-05-20 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020110116277A KR20130051115A (en) | 2011-11-09 | 2011-11-09 | Device for treating wafer |
Country Status (1)
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KR (1) | KR20130051115A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160112242A (en) * | 2015-03-18 | 2016-09-28 | 세메스 주식회사 | Inspecting method and Apparatus for treating a substrate |
KR20170068419A (en) * | 2017-06-01 | 2017-06-19 | 세메스 주식회사 | Inspecting method and Apparatus for treating a substrate |
KR102088270B1 (en) * | 2018-10-04 | 2020-04-24 | 주식회사 디에스티시스템 | Second alignment device for marking |
-
2011
- 2011-11-09 KR KR1020110116277A patent/KR20130051115A/en not_active Application Discontinuation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160112242A (en) * | 2015-03-18 | 2016-09-28 | 세메스 주식회사 | Inspecting method and Apparatus for treating a substrate |
KR20170068419A (en) * | 2017-06-01 | 2017-06-19 | 세메스 주식회사 | Inspecting method and Apparatus for treating a substrate |
KR102088270B1 (en) * | 2018-10-04 | 2020-04-24 | 주식회사 디에스티시스템 | Second alignment device for marking |
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