KR20120012074A - A light emitting Device, and a method of fabricating the light emitting device - Google Patents

Abstract

PURPOSE: A light emitting device and a manufacturing method thereof are provided to arrange a light extraction structure which has a dual pattern structure on the surface of a light emitting structure, thereby improving the light extraction efficiency of the light emitting device. CONSTITUTION: A light emitting structure(120) comprises a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer on a substrate. An electrode(130) is arranged on the light emitting structure. One or more components of the substrate and the second conductive semiconductor layer include a light extraction structure. The light extraction structure comprises a second unevenness pattern(150) which has a second period and a first unevenness pattern(140) which has a first period. The second unevenness pattern is arranged on a concave region of the first unevenness pattern.

Description

A light emitting device, and a manufacturing method thereof {A light emitting device, and a method of fabricating the light emitting device}

The present invention relates to a light emitting device, a manufacturing method thereof and a light emitting device package.

Based on the development of gallium nitride (GaN) metal organic chemical vapor deposition method and molecular beam growth method, red, green, and blue light emitting diodes (LEDs) capable of high luminance and white light have been developed.

These LEDs do not contain environmentally harmful substances such as mercury (Hg) used in existing lighting equipment such as incandescent lamps and fluorescent lamps, so they have excellent eco-friendliness and have advantages such as long life and low power consumption. It is replacing. A key competitive factor of such LED devices is high brightness and high brightness by high efficiency and high power chip and packaging technology.

In order to realize high brightness, it is important to increase light extraction efficiency. Flip-chip structure, surface texturing, patterned sapphire substrate (PSS), photonic crystal technology, and anti-reflection to improve light extraction efficiency Various methods have been studied using the layer structure.

Embodiments provide a light emitting device, a method of manufacturing the same, and a light emitting device package capable of improving external light extraction efficiency and manufacturing efficiency.

The light emitting device according to the embodiment includes a substrate, a light emission including an active layer between the first conductive semiconductor layer, the second conductive semiconductor layer, and the first conductive semiconductor layer and the second conductive semiconductor layer on the substrate. And a light extraction structure including an electrode on the light emitting structure, wherein at least one of the substrate and the second conductive semiconductor layer includes two or more uneven patterns having different periods. Includes a first uneven pattern having a first period and a second uneven pattern having a second period, wherein the second uneven pattern is disposed in a recessed area of the first uneven pattern.

The method of manufacturing a light emitting device according to the embodiment may include forming a first uneven pattern including grooves spaced apart from each other on a surface of a substrate, filling at least one nanoparticle in each of the grooves, and in the grooves. Etching the filled nanoparticles to reduce the size, etching the substrate having the grooves formed using the given nanoparticles as a mask to form a second uneven pattern inside the grooves, and then forming the second uneven pattern Removing the remaining nanoparticles, and forming a light emitting structure in which a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are sequentially stacked on a substrate on which the first uneven pattern and the second uneven pattern are formed. It includes a step.

In another embodiment, a method of manufacturing a light emitting device includes forming a light emitting structure in which a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are sequentially stacked on a substrate, and forming a light emitting structure on a surface of the second conductive semiconductor layer. Forming a first uneven pattern including grooves spaced apart from each other, filling at least one nanoparticle in each of the grooves, reducing the size by etching nanoparticles filled in the grooves, Etching the second conductive semiconductor layer on which the grooves are formed using the nanoparticles as a mask to form a second uneven pattern in the grooves, removing the nanoparticles remaining after the formation of the second uneven pattern, and And forming a conductive layer on the second conductive semiconductor layer having the first uneven pattern and the second uneven pattern formed thereon.

The embodiment can improve external light extraction efficiency and manufacturing efficiency.

1 shows a light emitting device according to an embodiment.
2 shows a light emitting device according to another embodiment.
3 illustrates a light emitting device package according to an embodiment.
4A to 4K illustrate a light emitting device manufacturing method according to an embodiment.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other features and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. In the drawings, dimensions are exaggerated, omitted, or schematically illustrated for convenience and clarity of illustration. In addition, the size of each component does not necessarily reflect the actual size. The same reference numerals denote the same elements throughout the description of the drawings. Hereinafter, a light emitting device, a method of manufacturing the same, and a light emitting device package will be described with reference to the accompanying drawings.

1 shows a light emitting device according to an embodiment. Referring to FIG. 1, the light emitting device includes a substrate 110, a light emitting structure 120, and a first electrode 130.

The substrate 110 may be any one of a sapphire substrate, a silicon (Si) substrate, a zinc oxide (ZnO) substrate, and a nitride semiconductor substrate, or a template substrate on which at least one of GaN, InGaN, AlGaN, and AlInGaN is stacked. have. In addition, the substrate 110 may be a metal substrate made of a metal material such as Cu, Cr, Ni, Ag, Au, Mo, Pd, W, or Al.

A light extraction structure is formed on the surface of the substrate 110 to increase light extraction efficiency. The light extraction structure includes uneven patterns having at least two or more periods different from each other.

The light extraction structure is a double pattern structure including a first uneven pattern 140 and a second uneven pattern 150 having different periods, and the second uneven pattern 150 is a recess of the first uneven pattern 140. It is placed in the subregion.

The first uneven pattern 140 may have a first period A, and the second uneven pattern 150 may have a second period B smaller than the first period A. FIG. For example, the first period may be 10um to 100um, and the second period may be 500 to 600nm. In addition, the height C of the first uneven pattern 140 is different from the height D of the second uneven pattern 150. For example, the height C of the convex portion of the first concave-convex pattern 140 may be greater than the height of the convex portion of the second concave-convex pattern 150.

The light emitting structure 120 is formed on a substrate on which the light extraction structure is formed. The light emitting structure 120 has a structure in which multiple semiconductor layers are stacked and generates light.

The light emitting structure 120 may have a structure in which the first conductive semiconductor layer 122, the active layer 124, and the second conductive semiconductor layer 126 are sequentially stacked. In this case, the first conductivity type may be P type or N type, and the second conductivity type may be N type or P type.

In the case of the vertical light emitting device, the first conductivity type may be P type and the second conductivity type may be N type. In the case of the horizontal light emitting device, the first conductive type is N type, the second conductive type is P type, and although not shown, the light emitting structure 120 is exposed so that a part of the first conductive type semiconductor layer 122 is exposed. A second electrode (not shown) may be formed in the etched and etched region.

The first conductive semiconductor layer 122 is formed on the substrate 110 on which the light extraction structure is formed, and is a nitride based semiconductor layer selected from a nitride based semiconductor layer, for example, InAlGaN, GaN, AlGaN, InGaN, AlN, InN, or AlInN. Can be.

The active layer 124 is positioned on the first conductivity type semiconductor layer 122, and the recombination process of holes and electrons provided from the first conductivity type semiconductor layer 122 and the second conductivity type semiconductor layer 126. Light can be generated by the energy generated by the.

The active layer 124 is a GaN-based material, such as GaN or InGaN, for _{example, In x Al y Ga 1 -x-} y N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) And a semiconductor material having a compositional formula, and include at least one of a quantum wire structure, a quantum dot structure, a single quantum well structure, or a multi quantum well structure (MQW). Can be.

The second conductivity type semiconductor layer 126 is positioned on the active layer 124 and may be selected from a nitride based semiconductor layer, for example, InAlGaN, GaN, AlGaN, InGaN, AlN, InN, or AlInN.

In the case where the first conductive semiconductor layer 122 or the second conductive semiconductor layer 126 is a P-type semiconductor layer, p-type dopants such as Mg, Zn, Ca, Sr, and Ba are doped. N-type dopants such as Si, Ge, Sn, and the like may be doped.

The first electrode 130 is formed on the light emitting structure 120. The first electrode 130 may include a conductive layer (not shown) positioned on the second conductive semiconductor layer 126 and an electrode pad (not shown) disposed on the conductive layer.

In the embodiment of FIG. 1, the vertical chip structure is described, but the present invention is not limited thereto, and may be applied to chips such as a horizontal type, flip chip structure, and via hole structure.

2 shows a light emitting device according to another embodiment. Referring to FIG. 2, the light emitting device includes a substrate 210, a light emitting structure 220, and a first electrode 250.

The substrate 210 may be made of a material as described with reference to FIG. 1. The light emitting structure 220 may have a structure in which the first conductive semiconductor layer 222, the active layer 224, and the second conductive semiconductor layer 226 are sequentially stacked. In this case, the first conductivity type may be P type or N type, and the second conductivity type may be N type or P type.

The second conductive semiconductor layer 226 has a light extraction structure formed on its surface. The light extraction structure formed on the second conductivity type banobody layer 226 has the same shape as the light extraction structure formed on the substrate surface described with reference to FIG. 1. In the following description is omitted to avoid duplication.

The first electrode 250 may include a conductive layer 230 positioned on the second conductive semiconductor layer 226 and an electrode pad 240 positioned on the conductive layer 230.

The conductive layer 235 is formed on the second conductive semiconductor layer 226 in which the light extraction structure is formed. The conductive layer 235 not only reduces total reflection but also serves as an ohmic contact layer. For example, the conductive layer 235 may be made of at least one of indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), and zinc oxide (ZnO). have.

The conductive layer 235 may be formed to have a light extraction structure having the same profile as the light extraction structure formed in the second conductive semiconductor layer 226. For example, the conductive layer 235 has the same profile, but the recess of the second uneven pattern of the conductive layer 235 corresponding to the second uneven pattern 150 is higher than the convex portion of the second uneven pattern 150. 1 may be formed lower than the convex portion of the uneven pattern 140.

2 exemplarily illustrates that the conductive layer 235 under the electrode pad 240 includes a pattern, but is not limited thereto. The conductive layer 235 corresponding to the area under the electrode pad 240 may be provided. The top surface of may not include a pattern.

4A to 4K illustrate a light emitting device manufacturing method according to an embodiment. 4G and 4K show cross-sectional views in the AA ′ direction shown in FIG. 4F.

First, as shown in FIG. 4A, an object 410 of a light emitting device for forming a light extraction structure on a surface is prepared.

In this case, the object 410 may be a substrate or a light emitting structure of the light emitting device. For example, the object 410 may be the substrate 110 described with reference to FIG. 1 or the light emitting structure 220 described with reference to FIG. 2. In addition, the object may be a light extraction surface included in an optical element such as a template, a beam splitter, an optical filter, and a photonic crystal.

If the object is a light emitting structure 220, the first conductive semiconductor layer (not shown), the active layer (not shown), and the second conductive semiconductor layer (not shown) on the substrate before performing the process shown in FIG. (Not shown) forms a light emitting structure that is sequentially stacked.

In this case, the first conductive type may be an N type or a P type, and the second conductive type may be a conductive type opposite to the first conductive type, and the first conductive type semiconductor layer, the active layer, and the second conductive type semiconductor layer are shown in FIG. 1. And may be the same as described in FIG. 2.

Next, as shown in FIG. 4B, a photoresist 420 is coated on the object 410. A photolithography process is performed on the applied photoresist 420 to form a photoresist pattern 425 as shown in FIG. 4C.

In this case, the photoresist pattern 425 is formed with grooves 427 having a first size exposing some regions of the object. For example, each of the grooves 427 may have a rectangular structure having a length and width of several tens of micrometers.

Next, as shown in FIG. 4D, some regions of the exposed object are etched using the photoresist pattern 425 as a mask. In this case, reactive ion etching (RIE) or inductively coupled plasma (ICP) etching may be used as an etching process.

Next, as shown in FIG. 4E, a cleaning process is performed to remove the photoresist pattern. When the photoresist pattern is removed, grooves 429 are formed on the surface of the object 410 to be spaced apart from each other by the etching of FIG. 4E. As the grooves 429 are formed, a first period is formed on the surface of the object 410. The first uneven pattern 430 may be formed. In this case, the first period may be 10um to 100um.

Next, as shown in FIG. 4F, at least one nanoparticle 435 is filled in the grooves 429 formed on the surface of the object 410.

For example, the nanoparticles 435 filled in each of the grooves 429 may be uniformly filled. In FIG. 4F, the nanoparticles 440 filled in the grooves 429 are formed in a single layer arranged adjacent to each other, but are not limited thereto. For example, the nanoparticles 440 may be arranged spaced apart from each other inside the grooves 429, and two or more layers may be filled in a stacked form.

The nanoparticles 435 may be a metal cluster, silica nanoparticles, or polystyrene beads.

The nanoparticles 435 may be filled into the grooves 429 using a spin coating or sol-gel method.

Next, as shown in FIGS. 4G and 4H, the nanoparticles 440 filled in the grooves 429 are etched to reduce the size. For example, the size of the nanoparticles 440 filled in the grooves 429 may be reduced by using O ₂ reactive ion etching.

Next, as illustrated in FIG. 4I, the object 410 in which the grooves 429 are formed is etched using the nanoparticles 445 having the size filled in the grooves 429 as a mask. At this time, the area of the object 410 located under the given nanoparticles 445 is not etched. That is, the object 410 is etched except for a region located below the nanoparticles 445 having a size.

As a result, a second uneven pattern 455 having a second period may be formed in the grooves 429 by a region of the non-etched object 410 positioned below the nanoparticles 445 having a size. In this case, the second uneven pattern 455 may be formed in the grooves 429 which are recessed regions of the first uneven pattern 430. For example, the second period may be 500 to 600 nm.

Next, as shown in FIG. 4J, the nanoparticles 445 remaining after etching are removed from the object 410, and the object from which the nanoparticles have been removed is washed with a cleaning liquid (eg, deionized water).

When the nanoparticles 445 remaining after etching are removed, the first uneven pattern 450 and the nanoparticles are formed on the surface of the object 410 based on an etching process using the first photoresist pattern 425 as a mask. A light extraction structure having a double pattern structure including a second uneven pattern 455 formed based on an etching process using 445 as a mask is formed.

At this time, the height of the convex portion of the second uneven pattern 455 is smaller than the height of the convex portion of the first uneven pattern 450. The concave portions of each of the first uneven pattern 450 and the second uneven pattern 455 may be coplanar.

Next, as shown in FIG. 4K, a semiconductor layer or a conductive layer is formed on the object 410 on which the light extraction structure is formed.

For example, as described with reference to FIG. 1, the first conductivity-type semiconductor layer 122 of the light emitting structure 120 may be formed on the substrate 110 on which the light extraction structure is formed.

In addition, as described with reference to FIG. 2, the conductive layer 235 may be formed on the second conductive semiconductor layer 230 having the light extraction structure. In this case, unlike FIG. 4K, the conductive layer 235 may be formed to have a light extraction structure having the same profile as the light extraction structure formed in the second conductive semiconductor layer 230.

A light extraction structure having a double pattern structure on the surface of the substrate 110 of the light emitting device shown in FIG. 1 or the surface of the light emitting structure 220 of the light emitting device shown in FIG. 2 according to the method described with reference to FIGS. 4A to 4K. By forming the light extraction efficiency of the light emitting device can be improved.

In general, the photolithography process itself is difficult to form a nano-sized pattern, and it is not easy to self-align the nanoparticles in a large area in the process.

However, the embodiment forms a light extraction structure including a nano-sized pattern through a two-step patterning process.

In a first step, a first uneven pattern including micro-sized grooves is formed on an object surface through a photolithography process. In the second step, the nanoparticles are filled in the micro-sized grooves, and the nano-particles are used as a mask to etch the object on which the first unevenness is formed to form the nanosized second uneven pattern.

Through the two-step pattern process, it is possible to solve a process difficulty for forming a light extraction structure having a general nano-size, and thereby increase the manufacturing efficiency of the light emitting device.

3 illustrates a light emitting device package according to an embodiment. Referring to FIG. 3, the light emitting device package may include a package body 310, a first metal layer 312, a second metal layer 314, a light emitting device 320, a reflective plate 325, a wire 330, and an encapsulation layer ( 340).

The package body 310 is a structure in which a cavity is formed in one region. At this time, the side wall of the cavity may be formed to be inclined. The package body 310 may be formed of a substrate having good insulating or thermal conductivity, such as a silicon-based wafer level package, a silicon substrate, silicon carbide (SiC), aluminum nitride (AlN), or the like. It may have a structure in which a plurality of substrates are stacked. Embodiment is not limited to the material, structure, and shape of the body described above.

The first metal layer 312 and the second metal layer 314 are disposed on the surface 310 of the package body 310 to be electrically separated from each other in consideration of heat dissipation or mounting of the light emitting device. The light emitting device 320 is electrically connected to the first metal layer 312 and the second metal layer 314 through wires 330. In FIG. 3, only one wire is illustrated, but is not limited thereto.

The reflective plate 325 is formed on the side wall of the cavity of the package body 310 to direct light emitted from the light emitting element in a predetermined direction. The reflector plate 325 is made of a light reflective material, and may be, for example, a metal coating or a metal flake.

The encapsulation layer 340 surrounds the light emitting device 320 positioned in the cavity of the package body 310 to protect the light emitting device 320 from the external environment. The encapsulation layer 340 is made of a colorless transparent polymer resin material such as epoxy or silicon. The encapsulation layer 340 may include a phosphor to change the wavelength of light emitted from the light emitting device 320. The light emitting device package may include at least one of the light emitting devices of the embodiments disclosed in FIGS. 1 and 2, but is not limited thereto.

A plurality of light emitting device packages according to the embodiment may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, or the like, which is an optical member, may be disposed on an optical path of the light emitting device package. The light emitting device package, the substrate, and the optical member may function as a backlight unit.

Another embodiment may be implemented as a display device, an indicator device, and an illumination system including the light emitting device or the light emitting device package described in the above embodiments.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

110,210 substrate, 120,220 light emitting structure, 130 and first electrode, 235 conductive layer
310: package body, 312: first metal layer, 314: second metal layer, 320: light emitting device,
325: reflector, 330: wire, 340: encapsulation layer, 420: photoresist, 410: the object,
425: photoresist pattern, 429: grooves, 435: nanoparticles,
445: Nanoparticles given size.

Claims (14)

Board;
A light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first conductive semiconductor layer and the second conductive semiconductor layer on the substrate; And
An electrode on the light emitting structure,
At least one of the substrate and the second conductive semiconductor layer includes a light extraction structure including two or more uneven patterns having different periods,
The light extraction structure,
And a second uneven pattern having a first period and a second uneven pattern having a second period, wherein the second uneven pattern is disposed in a recessed area of the first uneven pattern. The method of claim 1,
The recess of the first uneven pattern and the recess of the second uneven pattern are positioned on the same plane. The method of claim 1,
The height of the convex portion of the first uneven pattern is greater than the height of the convex portion of the second uneven pattern. The method of claim 1,
The first period is 10um ~ 100um, the second period is 500 ~ 600nm light emitting device. The method of claim 1,
The light extraction structure is formed on the surface of the second conductivity type semiconductor layer,
The electrode
A conductive layer positioned on the second conductive semiconductor layer and an electrode pad positioned on the conductive layer,
The conductive layer,
A light emitting device comprising a light extraction structure having the same profile as the light extraction structure. The method of claim 5,
The concave portion of the light extraction structure of the conductive layer is positioned higher than the convex portion of the second uneven pattern of the light extraction structure. The method of claim 5,
The electrode pad is disposed on the light extraction structure of the conductive layer. Forming a first uneven pattern including grooves spaced apart from each other on a surface of the substrate;
Filling at least one nanoparticle into each of the grooves;
Reducing the size by etching the nanoparticles filled in the grooves;
Etching the substrate on which the grooves are formed by using the nanoparticles having the size as a mask to form a second uneven pattern in the grooves;
Removing the nanoparticles remaining after the formation of the second uneven pattern; And
Forming a light emitting structure in which a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are sequentially stacked on a substrate on which the first uneven pattern and the second uneven pattern are formed. . Forming a light emitting structure in which a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer are sequentially stacked on a substrate;
Forming a first uneven pattern including grooves spaced apart from each other on a surface of the second conductive semiconductor layer;
Filling at least one nanoparticle into each of the grooves;
Reducing the size by etching the nanoparticles filled in the grooves;
Forming a second uneven pattern inside the grooves by etching the second conductive semiconductor layer having the grooves formed using the nanoparticles having the size as a mask;
Removing the nanoparticles remaining after the formation of the second uneven pattern; And
Forming a conductive layer on the second conductive semiconductor layer having the first uneven pattern and the second uneven pattern formed thereon. The method of claim 8 or 9, wherein forming the first uneven pattern,
A method of manufacturing a light emitting device to form the first uneven pattern by using a photolithography process and an etching process. The method according to claim 8 or 9,
The at least one nanoparticles are metal clusters, silica nanoparticles, or polystyrene beads. The method of claim 8 or 9, wherein the filling of the at least one nanoparticle,
A method of manufacturing a light emitting device in which nanoparticles are filled in grooves by using a spin coating or sol-gel method. The method of claim 9, wherein the forming of the conductive layer,
And forming the conductive layer so as to have the same profile as the surface of the second conductive semiconductor layer on which the first uneven pattern and the second uneven pattern are formed. 10. The method of claim 8 or 9, wherein filling the at least one nanoparticles inside each of the grooves,
The method of manufacturing a light emitting device to fill at least one nanoparticle in each of the grooves in a single layer.

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