KR20110081942A - 기판 전체에 걸쳐 향상된 균일성을 지닌 임베딩된 ｓｉ／ｇｅ물질을 구비한 트랜지스터 - Google Patents

기판 전체에 걸쳐 향상된 균일성을 지닌 임베딩된 ｓｉ／ｇｅ물질을 구비한 트랜지스터 Download PDF

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KR20110081942A
KR20110081942A KR1020117005498A KR20117005498A KR20110081942A KR 20110081942 A KR20110081942 A KR 20110081942A KR 1020117005498 A KR1020117005498 A KR 1020117005498A KR 20117005498 A KR20117005498 A KR 20117005498A KR 20110081942 A KR20110081942 A KR 20110081942A
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South Korea
Prior art keywords
forming
gate electrode
transistor
semiconductor
cavities
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KR1020117005498A
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English (en)
Korean (ko)
Inventor
로버트 멀핑거
앤디 웨이
잔 호엔트셀
카세이 스콧
Original Assignee
어드밴스드 마이크로 디바이시즈, 인코포레이티드
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Publication of KR20110081942A publication Critical patent/KR20110081942A/ko
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40—Crystalline structures
    • H10D62/405—Orientations of crystalline planes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1020117005498A 2008-09-30 2009-09-29 기판 전체에 걸쳐 향상된 균일성을 지닌 임베딩된 ｓｉ／ｇｅ물질을 구비한 트랜지스터 Withdrawn KR20110081942A (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE102008049723A DE102008049723B4 (de) 2008-09-30 2008-09-30 Transistor mit eingebettetem Si/Ge-Material mit einer besseren substratüberspannenden Gleichmäßigkeit
DE102008049723.1 2008-09-30
US12/562,437 US8183100B2 (en) 2008-09-30 2009-09-18 Transistor with embedded SI/GE material having enhanced across-substrate uniformity
US12/562,437 2009-09-18

Publications (1)

Publication Number Publication Date
KR20110081942A true KR20110081942A (ko) 2011-07-15

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020117005498A Withdrawn KR20110081942A (ko) 2008-09-30 2009-09-29 기판 전체에 걸쳐 향상된 균일성을 지닌 임베딩된 ｓｉ／ｇｅ물질을 구비한 트랜지스터

Country Status (6)

Country Link
US (2) US8183100B2 (enExample)
JP (1) JP5798923B2 (enExample)
KR (1) KR20110081942A (enExample)
CN (1) CN102160159A (enExample)
DE (1) DE102008049723B4 (enExample)
WO (1) WO2010037522A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
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DE102008049723B4 (de) * 2008-09-30 2012-01-26 Advanced Micro Devices, Inc. Transistor mit eingebettetem Si/Ge-Material mit einer besseren substratüberspannenden Gleichmäßigkeit
US8492234B2 (en) 2010-06-29 2013-07-23 International Business Machines Corporation Field effect transistor device
US9006052B2 (en) 2010-10-11 2015-04-14 International Business Machines Corporation Self aligned device with enhanced stress and methods of manufacture
DE102010064282B4 (de) * 2010-12-28 2012-09-06 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG Transistor mit eingebetteten sigma-förmigen sequenziell hergestellten Halbleiterlegierungen
US9018065B2 (en) * 2012-05-08 2015-04-28 Globalfoundries Inc. Horizontal epitaxy furnace for channel SiGe formation
US9054217B2 (en) 2013-09-17 2015-06-09 Samsung Electronics Co., Ltd. Method for fabricating semiconductor device having an embedded source/drain
CN105161406B (zh) * 2014-06-12 2019-04-26 中芯国际集成电路制造(上海)有限公司 晶体管及其形成方法
US11217486B2 (en) * 2018-10-31 2022-01-04 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method

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JPS6376481A (ja) * 1986-09-19 1988-04-06 Hitachi Ltd 半導体装置及びその製造方法
US5716218A (en) * 1991-06-04 1998-02-10 Micron Technology, Inc. Process for manufacturing an interconnect for testing a semiconductor die
US5414276A (en) * 1993-10-18 1995-05-09 The Regents Of The University Of California Transistors using crystalline silicon devices on glass
US6372618B2 (en) * 2000-01-06 2002-04-16 Micron Technology, Inc. Methods of forming semiconductor structures
JP4355807B2 (ja) * 2002-08-28 2009-11-04 独立行政法人産業技術総合研究所 二重ゲート型ｍｏｓ電界効果トランジスタ及びその作製方法
JP4046014B2 (ja) * 2003-05-30 2008-02-13 株式会社デンソー 構造体の製造方法
US7045407B2 (en) * 2003-12-30 2006-05-16 Intel Corporation Amorphous etch stop for the anisotropic etching of substrates
US6946350B2 (en) * 2003-12-31 2005-09-20 Intel Corporation Controlled faceting of source/drain regions
JP4837902B2 (ja) * 2004-06-24 2011-12-14 富士通セミコンダクター株式会社 半導体装置
US20060091483A1 (en) * 2004-11-02 2006-05-04 Doczy Mark L Method for making a semiconductor device with a high-k gate dielectric layer and a silicide gate electrode
JP4369359B2 (ja) * 2004-12-28 2009-11-18 富士通マイクロエレクトロニクス株式会社 半導体装置
US7494858B2 (en) * 2005-06-30 2009-02-24 Intel Corporation Transistor with improved tip profile and method of manufacture thereof
JP2007019129A (ja) * 2005-07-06 2007-01-25 Renesas Technology Corp 半導体装置の製造方法及び半導体装置
DE102005051994B4 (de) * 2005-10-31 2011-12-01 Globalfoundries Inc. Verformungsverfahrenstechnik in Transistoren auf Siliziumbasis unter Anwendung eingebetteter Halbleiterschichten mit Atomen mit einem großen kovalenten Radius
JP2007157788A (ja) * 2005-11-30 2007-06-21 Toshiba Corp 半導体装置
US7691752B2 (en) * 2007-03-30 2010-04-06 Intel Corporation Methods of forming improved EPI fill on narrow isolation bounded source/drain regions and structures formed thereby
DE102008049723B4 (de) * 2008-09-30 2012-01-26 Advanced Micro Devices, Inc. Transistor mit eingebettetem Si/Ge-Material mit einer besseren substratüberspannenden Gleichmäßigkeit

Also Published As

Publication number Publication date
DE102008049723B4 (de) 2012-01-26
JP2012504326A (ja) 2012-02-16
CN102160159A (zh) 2011-08-17
DE102008049723A1 (de) 2010-04-08
US20100078691A1 (en) 2010-04-01
JP5798923B2 (ja) 2015-10-21
US8334569B2 (en) 2012-12-18
WO2010037522A1 (en) 2010-04-08
US20120211810A1 (en) 2012-08-23
US8183100B2 (en) 2012-05-22

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PA0105 International application

Patent event date: 20110308

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid