KR20090052591A - Array substrate for liquid crystal display device and method of fabricating the same - Google Patents

Abstract

The present invention provides a semiconductor device comprising: a gate line and a data line intersecting each other on a substrate to define a pixel region and respectively formed under and over a gate insulating film; A common wiring spaced apart from the gate wiring and formed in the same layer; A thin film transistor connected to the gate line and the data line; A color filter layer formed in each pixel area over the thin film transistor, and removed from the common wiring to form a transmission hole; A plurality of pixel electrodes formed on the color filter layer in the pixel area and electrically connected to the drain electrode of the thin film transistor and spaced apart from each other in parallel with the data line; A plurality of central common electrodes formed to be alternately spaced apart from the plurality of pixel electrodes on the color filter layer and electrically connected to the common wiring; A first patterned spacer formed on the color filter layer and having a first height from the substrate; An array substrate for a liquid crystal display device and a method of manufacturing the same include a second patterned spacer having a second height smaller than the first height in the transmission hole in which the color filter layer is removed.

Patterned Spacer, Opening Ratio, Pressed, Touch, Double Height, COT, Transverse Field Type

Description

Array substrate for liquid crystal display device and method for manufacturing the same {Array substrate for liquid crystal display device and method of fabricating the same}

The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device having a patterned spacer having a double height and a method of manufacturing the same.

Recently, liquid crystal displays have been spotlighted as next generation advanced display devices having low power consumption, good portability, high technology value, and high added value.

Among the liquid crystal display devices, an active matrix liquid crystal display device having a thin film transistor, which is a switching element that can control voltage on / off for each pixel, has the best resolution and video performance. It is attracting attention.

In general, an LCD device forms an array substrate and a color filter substrate through an array substrate manufacturing process for forming a thin film transistor and a pixel electrode, and a color filter substrate manufacturing process for forming a color filter and a common electrode, respectively. It is completed through the liquid crystal cell process through the liquid crystal in between.

In more detail, referring to FIG. 1, which is an exploded perspective view of a general liquid crystal display device, as illustrated, the array substrate 10 and the color filter substrate 20 face each other with the liquid crystal layer 30 interposed therebetween. The array substrate 10 of the lower part includes a plurality of gate lines 14 and data lines 16 arranged vertically and horizontally on the upper surface of the transparent substrate 12 to define a plurality of pixel regions P. Thin film transistors T are provided at the intersections of the two wires 14 and 16 so as to correspond one-to-one with the pixel electrodes 18 provided in the pixel regions P. FIG.

In addition, the upper color filter substrate 20 facing the array substrate 10 is a rear surface of the transparent substrate 22, and the non-display of the gate wiring 14, the data wiring 16, the thin film transistor T, and the like. A grid-like black matrix 25 is formed around the pixel region P so as to cover the region, and red (R) and green are sequentially arranged in order to correspond to the pixel region (P) in the grid. A color filter layer 26 including (G) and blue (B) color filter patterns 26a, 26b, and 26c is formed, and is transparent over the entire surface of the black matrix 25 and the color filter layer 26. The common electrode 28 is provided.

The liquid crystal display device having the above-described configuration has a disadvantage in that the viewing angle characteristic is not excellent because the liquid crystal is driven by the vertical electric field generated by the upper and lower electrodes. Accordingly, in order to overcome the above disadvantages, a transverse field type liquid crystal display device having excellent viewing angle characteristics has been proposed, in which a common electrode formed on the color filter substrate is formed on the array substrate.

On the other hand, in the configuration of the liquid crystal display device for driving the transverse electric field, in order to maintain a constant cell gap between the array substrate and the color filter, the seal pattern is formed on the edges of the two substrates, the inside of these two substrates having a constant diameter A ball spacer is provided. The ball spacers generally form spherical materials having a predetermined size on the entire surface of the array substrate or the color filter substrate through a scattering process, but agglomeration of spacers caused by not evenly spreading on the entire surface of the substrate during the spreading process is performed. Problems such as defects caused by the defects and coatings in the pixel areas to cause light leakage defects, and the like.

Accordingly, recently, a patterned spacer has been proposed that can be patterned on an array substrate or a color filter substrate to form a uniform distribution in order to solve the problem caused by the ball spacer. .

However, in the transverse type liquid crystal display device having a patterned spacer, when the surface of the liquid crystal display device is pressed at a predetermined pressure, there is little force to restore the original cell gap from the pressed portion, resulting in a press failure or touch failure. There is. This is because the elasticity of the patterned spacer is relatively lower than that of the silica ball spacer, and the patterned spacer is not easily restored by the frictional force with the substrate.

On the other hand, in a transverse electric field type liquid crystal display device, a black matrix is formed on an upper color filter substrate corresponding to an array substrate, and the black matrix corresponds to a thin film transistor which is a data wiring, a gate wiring, and a switching element of the array substrate. Is formed. In this case, the black matrix is formed to have a width in which the error range is added to the actual required width in consideration of the bonding error when the array substrate and the color filter substrate are bonded together.

Therefore, the transverse electric field type liquid crystal display device having such a configuration should take into account the bonding error of the black matrix and should be formed to have a larger width than the actual design value.

In order to solve the above problems, the present invention provides a patterned spacer having different first and second heights, so that the patterned spacer having the first height is in contact with both the array substrate and the color filter substrate to maintain the cell gap. The patterned spacer of a second height lower than the first height and to serve as a patterned spacer is formed to contact only one substrate to prevent agglomeration and restoration of the cell gap retention patterned spacer when pressed or touched. SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal display device which serves as a pressing prevention patterned spacer for quickly performing a pressing and a touch failure prevention.

In addition, in the manufacture of a substrate for a transverse electric field type liquid crystal display device having first and second patterned spacers having different heights, no additional process or a very expensive slit or halftone type exposure mask is used. Another object is to provide a method of manufacturing the patterned spacers having the first and second heights without using the same.

In addition, another object of the present invention is to provide a transverse electric field type liquid crystal display that can improve the aperture ratio.

In order to achieve the above object, an array substrate for a liquid crystal display device according to the present invention includes: a gate line and a data line intersecting each other on a substrate to define a pixel area, and formed on and under a gate insulating film, respectively; A common wiring spaced apart from the gate wiring and formed in the same layer; A thin film transistor connected to the gate line and the data line; A color filter layer formed in each pixel area over the thin film transistor, and removed from the common wiring to form a transmission hole; A plurality of pixel electrodes formed on the color filter layer in the pixel area and electrically connected to the drain electrode of the thin film transistor and spaced apart from each other in parallel with the data line; A plurality of central common electrodes formed to be alternately spaced apart from the plurality of pixel electrodes on the color filter layer and electrically connected to the common wiring; A first patterned spacer formed on the color filter layer and having a first height from the substrate; And a second patterned spacer having a second height smaller than the first height from the substrate in the transmission hole from which the color filter layer is removed.

The thin film transistor includes a gate electrode sequentially stacked, the gate insulating layer, a semiconductor layer, and source and drain electrodes spaced apart from each other, and the drain electrode is formed to overlap the common wiring with the gate insulating layer interposed therebetween. Is characteristic.

A first protective layer covering the thin film transistor and formed on an entire surface of the substrate under the color filter layer; A second protective layer covering the color filter layer and formed on an entire surface of the substrate, wherein the second and first protective layers are removed from the inside of the transmission hole to expose the drain electrode; And a common contact hole through which the protective layer and the gate insulating layer are removed to expose the common wiring, and in the pixel region, in the outermost side of the pixel region, in the same layer as the central common electrode, in the same layer. An auxiliary common electrode formed in contact with the common wiring through the common contact hole; An auxiliary common pattern is formed to connect one end of the auxiliary common electrode and the plurality of central common electrodes. In this case, the one end of the plurality of pixel electrodes are connected to each other and contact the drain contact hole, and the outermost common electrode is branched from the common wiring to overlap with the auxiliary common electrode at the outermost portion of the pixel region. It is characterized by being formed.

The first and second protective layers are both made of an inorganic insulating material, and black matrices are formed corresponding to the gate lines, data lines, and thin film transistors.

The data line, the plurality of central common electrodes, and the plurality of pixel electrodes have a structure that is symmetrically bent with respect to the central portion of the pixel area.

According to an aspect of the present invention, there is provided a method of manufacturing an array substrate for a liquid crystal display device, the method including: forming a common wiring parallel to a gate wiring extending in one direction and spaced apart from the substrate; Forming a gate insulating film on the entire surface of the substrate over the gate wiring and the common wiring; Forming a data line on the gate insulating layer to cross the gate line and define a pixel area; Forming a thin film transistor connected to the gate line and the data line; Forming a color filter layer on the thin film transistor, wherein portions of the common wiring formed in each pixel area are removed to have transmission holes; Forming a plurality of common electrodes and pixel electrodes in the pixel area on the color filter layer, the plurality of common electrodes alternately arranged in parallel with the data lines; Forming first and second patterned spacers having different heights through one patterning of the same material corresponding to each of the upper portion of the color filter layer and the transmission hole.

The drain electrode of the thin film transistor may be formed to overlap the common wiring so that the overlapped common wiring and the drain electrode and the gate insulating layer interposed therebetween form a storage capacitor.

Forming a first protective layer of an inorganic insulating material on the entire surface of the substrate above the thin film transistor before the color filter layer is formed; And forming a second passivation layer on the entire surface of the substrate over the color filter layer. After forming the color filter layer, patterning is performed to remove the second and first passivation layers and the gate insulating layer in the transmission hole, respectively. Forming a drain contact hole exposing the drain electrode and a common contact hole exposing the common wiring. The forming of the plurality of common electrodes and the pixel electrode may include contacting the common wiring through the common contact hole and forming an auxiliary common electrode, the auxiliary common electrode, and the plurality of common electrodes at the outermost portion of the pixel region. Forming an auxiliary common pattern connecting the ends of the second common pattern; And forming a plurality of pixel electrodes at one end thereof to be in contact with the drain electrode through the drain contact hole, wherein the forming of the gate and the common wiring is the same as the gate and the common wiring. Forming an outermost common electrode overlapping the auxiliary common electrode with the same material in a layer and branching from the common wiring.

In this case, the data line, the plurality of common electrodes, and the plurality of pixel electrodes may be formed to have a structure symmetrically bent with respect to the central portion of the pixel area.

The liquid crystal display according to the exemplary embodiment of the present invention has the effect of improving touch failure and depression by providing first and second patterned spacers having different heights on the array substrate.

In addition, by forming both the color filter layer and the black matrix on the array substrate, there is an effect of improving the aperture ratio by removing the width increasing element of the black matrix due to the bonding margin.

In addition, in the manufacture of the array substrate, a plurality of agents having different heights by performing a single mask process using a general exposure mask having only a light transmissive area and a blocking area, without using an expensive mask having expensive transflective areas. Providing a method for forming the 1, 2 patterned spacers has the effect of reducing the manufacturing cost.

In addition, since the common electrode and the pixel electrode are formed on one substrate and configured to drive the lateral electric field, there is an effect of improving the viewing angle.

Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings.

At this time, in the transverse electric field type liquid crystal display device according to the present invention, the characteristic part is located in the array substrate provided with both the thin film transistor and the color filter layer, and the description will be given mainly on the array substrate.

FIG. 2 is a plan view of one pixel area of an array substrate of a transverse field type liquid crystal display device having a patterned spacer according to an embodiment of the present invention, and FIG. 3 is a view taken along line III-III of FIG. It is sectional drawing about a part, and FIG. 4 is sectional drawing about the part which cut | disconnected FIG. 2 along the cutting line IV-IV.

First, referring to FIG. 2, a planar structure will be described. As shown in FIG. 2, the array substrate 101 for a transverse electric field type liquid crystal display device according to the present invention crosses each other on a transparent insulating substrate 101. The data line 135 and the gate line 103 are defined to define P), and the common line 109 is formed to be spaced apart from the gate line 103.

In addition, at the intersection of the gate wiring 103 and the data wiring 135, the two wirings 103 and 135 are connected to each other, and the gate electrode 106, the gate insulating film (not shown), the semiconductor layer (not shown), The thin film transistor Tr, which is a switching element composed of the source and drain electrodes 138 and 141, is formed. In this case, although the thin film transistor Tr is formed on the gate wiring 103 by forming the gate wiring 103 as the gate electrode 106 itself, the thin film transistor Tr is formed in the pixel region P. May be In addition, the drain electrode 141 of the thin film transistor Tr is formed to overlap the common wiring 109 by extending to a portion where the common wiring 109 is formed in the pixel region P. In this case, the drain electrode 141 of the thin film transistor Tr overlaps the common wiring 109. The common wiring 109 and the drain electrode 141 form the first and second storage electrodes 114 and 143, respectively, so that a gate insulating film (not shown) interposed between the two electrodes 114 and 143 is used as the dielectric layer. To form a storage capacitor (StgC).

In the pixel area P, a plurality of common electrodes 111 and 173 are connected to the common line 109 and are parallel to the data line 135. In this case, the outermost common electrode 111 located at the outermost portion of the pixel region P among the plurality of common electrodes 111 and 173 is spaced apart from the data line 135 by a predetermined interval, and the common wiring 109 is disposed. Branched at and formed in the same layer. In addition, a plurality of central common electrodes 173 are formed in the center portion of the pixel region P to be spaced apart from each other, and are formed on the same layer as the plurality of central common electrodes 173 on both sides of the data line 135 using the same material. The auxiliary common electrode 175 overlaps with the outermost common wiring 111 positioned. In this case, the auxiliary common electrode 175 is electrically connected through the common wiring 109 and the common contact hole 167, and the auxiliary common electrode 175 and the electrical connection that are electrically connected to the common wiring 109. One end of the plurality of central common electrodes 173 is connected to the common connection pattern 177.

Meanwhile, a plurality of pixel electrodes 170 are formed in the pixel region P so as to alternate with the plurality of central common electrodes 173 in parallel with each other, and the pixel electrode 170 is formed of the thin film transistor Tr. The drain electrode 141 extends and is electrically connected to the second storage electrode 143 through the drain contact hole 165.

In the pixel area P of the substrate 101 having the above-described configuration, the drain contact hole 165, the common contact hole 167, and the two contact holes 165 of the portion where the common wiring 109 is formed. , A color filter layer (not shown) including red, green, and blue color filter patterns (red, green, and blue) forming the transmission hole TH is formed by removing the color resin. In this case, the color filter layer (not shown) is formed such that the color filter patterns (not shown) of red, green, and blue are sequentially and sequentially corresponded to each pixel area P.

In this case, as will be described in the description of the cross-sectional structure, the plurality of pixel electrodes 170, the central common electrode 173 and the auxiliary common electrode 175 are located on the color filter layer (not shown). .

In addition, as one of the most characteristic features of the present invention, patterned spacers 181 and 183 having different heights are formed corresponding to the common wiring 109 in each pixel region P. FIG. In this case, the first patterned spacer 181 having a first height from the substrate 101 is formed outside the transmission hole TH, and has a second patterned spacer having a second height smaller than the first height. 183 is formed inside the through hole TH. This configuration is for realizing the simplification of the manufacturing method, which will be mentioned later in the description of the manufacturing method.

On the other hand, in the array substrate 101 for a transverse electric field type liquid crystal display device according to the present invention having the above-described configuration, all of the data line 135, the pixel electrode 170 and the common electrodes 111 and 173 have a straight bar ( bar) is shown as an example, but as a modified example it may be formed to have a dual domain configuration by being configured to have a structure symmetrical with respect to the central portion of each pixel region (P). In this case, the plurality of common electrodes 111 and 173 and the pixel electrode 170 formed in parallel with the data line 135 and the data line 135 are bent in the center and linearly symmetric in the pixel area P. By configuring to achieve the color difference can be reduced according to the viewing angle.

Next, a cross-sectional structure of an array substrate for a transverse electric field type liquid crystal display device according to the present invention will be described with reference to FIGS. 3 and 4. For convenience of description, a region in which the thin film transistor Tr, which is a switching element, is formed is defined as a switching region TrA and a region in which the transmission hole TH is to be formed as a transmission hole region THA.

As shown, a gate wiring (not shown) is formed on the transparent insulating substrate 101 and forms a gate electrode 106 in itself and extends in one direction. The common wiring 109 is formed on the same layer side by side with the same material as the gate wiring (not shown), and branched from the common wiring 109 to be parallel to the data wiring 135. The outermost common electrode 111 is formed at the outermost part of P).

A gate insulating layer 117 made of an inorganic insulating material is formed on the entire surface of the gate wiring (not shown) including the gate electrode 106, the common wiring 109, and the outermost common electrode 111. In addition, a data line 135 is formed on the gate insulating layer 117 to define the pixel region P while crossing the gate line (not shown). An active layer 120a is formed in the switching region TrA. And a semiconductor layer 120 formed of an ohmic contact layer 120b spaced apart from each other, and source and drain electrodes 138 and 141 spaced apart from each other are formed on the semiconductor layer 120. In this case, the drain electrode 141 extends to the portion where the common wiring 109 is formed in the pixel region P, and overlaps the drain electrode 141. In this case, the overlapped common wiring 109 and the drain electrode 141 are formed. ) The first storage electrode 114 and the second storage electrode 143, respectively, and the storage capacitor StgC is formed using the gate insulating layer 117 interposed between the two electrodes 114 and 143 as a dielectric layer. Forming. In the drawing, an active layer 120a and an ohmic contact layer 120b are further formed between the first and second storage electrodes 114 and 143, and they form a dielectric layer together with the gate insulating layer 117. However, the active layer 120a and the ohmic contact layer 120b formed between the first and second storage electrodes 114 and 143 may not be formed by different manufacturing methods.

In addition, a first pattern 121a of pure amorphous silicon and impurity amorphous silicon, each formed of the same material forming the active layer 120a and the ohmic contact layer 120b, between the data line 135 and the gate insulating layer 117. ) And the semiconductor pattern 121 formed of the second pattern 121b is formed, but the semiconductor pattern 121 may not be formed.

Next, a first passivation layer 147 is formed on an entire surface of the data line 135 and the source and drain electrodes 138 and 141 as an inorganic insulating material, and the gate line is formed on the first passivation layer 147. The black matrix 150 made of black resin is formed to correspond to the data line 135 and the switching region TrA. In this case, the black matrix 150 is formed to have a smaller width than that of the black matrix formed on the color filter substrate in the conventional transverse electric field type liquid crystal display device. This is because the bonding margin does not have to be considered. That is, in the related art, the black matrix is formed on a different substrate from the gate and data lines, so that the black matrix has to have a wider width so as to have a margin that can accommodate the error required for bonding. However, according to the present invention, since all are formed on one substrate, a margin due to a bonding error is not required.

Next, red, green, and blue are sequentially repeated on the black matrix 150 and the first passivation layer 147 for each pixel area P, and the color resin is removed for the transmission hole forming area THA. The color filter layer 155 including the red, green, and blue color filter patterns 155a, 155b, and 155c having holes TH is formed.

Next, a second protective layer 163 formed of an inorganic insulating material is formed on the front surface of the substrate 101 above the color filter layer 155. In this case, a drain contact hole 165 exposing the second storage electrode 143 to the inside of the through hole TH is formed in the second passivation layer 163 and the first passivation layer 147 below. The common contact hole 167 exposing the common wiring 109 is formed in the first and second protective layers 147 and 163 and the gate insulating layer 117.

Next, the second protective layer 163 provided with the drain contact hole and the common contact hole 165 and 167 is formed of a transparent conductive material through the drain contact hole 165 and the second storage electrode 143. A plurality of pixel electrodes 170 are electrically connected to the drain electrode 141 and disposed to be parallel to the data line 135 and spaced apart from each other in the pixel region P by contact. In addition, in each of the pixel areas P, a plurality of central common electrodes 173 are alternately arranged in parallel with the plurality of pixel electrodes 170 on the second passivation layer 163, and the pixel areas P are formed. ) And an auxiliary common electrode 175 overlapping the outermost common electrode 111 and contacting through the common wiring 109 and the common contact hole 167 at the outermost angle of the auxiliary common electrode ( 175 and the plurality of central common electrodes 173 are all connected to one end thereof by an auxiliary common pattern (177 of FIG. 2).

Next, a first patterned spacer 181 having a first height h1 is disposed on the pixel electrode 170 outside the transmission hole TH in response to the common wiring 109 in each pixel area P. Referring to FIG. The second patterned spacer 183 having a second height h2 smaller than the first height h1 is formed on the second protective layer 163 in the transmission hole forming region THA. have. In this case, the first patterned spacer 181 faces the array substrate 101 having the above-described structure and an opposite substrate (not shown), interposes a liquid crystal layer, and then configures a transverse electric field type liquid crystal display device. It serves to maintain the gap between the substrate 101 and the opposing substrate (not shown), and the second patterned spacer 183 is the opposite when pressed or touched from the outside The contact with the substrate (not shown) prevents defects such as agglomeration of the first patterned spacer 181 against excessive pressing, and minimizes frictional force due to the pressing or touch, thereby increasing the restoring force, thereby increasing the restoring force. It acts as a deterrent to reduce pressure.

 Next, a method of manufacturing an array substrate for a transverse electric field type liquid crystal display device according to the present invention having the above-described structure will be described with reference to the drawings.

FIGS. 5A to 5H are cross-sectional views illustrating manufacturing steps taken along the cutting line III-III of FIG. 2, and FIGS. 6A to 6H are cross-sectional manufacturing steps taken along the cutting line IV-IV of FIG. 2. It is a cross section.

First, as shown in FIGS. 5A and 6A, the first metal material is deposited on the front surface of the transparent insulating substrate 101 to form a first metal layer, and patterned to form the gate as the gate itself. A gate wiring (not shown) constituting the electrode 106 and extending in one direction and a common wiring 109 extending side by side at a predetermined interval from the gate wiring (not shown) are formed, and at the same time, each pixel region P is formed. ), The outermost common electrode 111 is formed in a form branched from the common wiring 109. In this case, the outermost common electrode 111 may be formed such that its central portion is bent and symmetrical up and down in each pixel region P. FIG.

Next, as shown in FIGS. 5B and 6B, an inorganic insulating material, for example, silicon oxide, is disposed on the gate electrode 106, the gate wiring (not shown), the common wiring 109, and the outermost common electrode 111. The gate insulating film 117 is formed on the entire surface by depositing SiO ₂ ) or silicon nitride (SiNx).

Subsequently, pure amorphous silicon, impurity amorphous silicon, and a second metal material are sequentially deposited on the entire surface of the gate insulating layer 117 and patterned by performing a mask process to cross the gate wiring (not shown) to form the pixel region ( A data line 135 defining P) is formed, and at the same time, in the switching region TrA, the active layer 120a of pure amorphous silicon and the active layer 120a are spaced apart from each other in correspondence with the gate electrode 106. In an embodiment, source and drain electrodes 138 and 141 may be formed to form an ohmic contact layer 120b of impurity amorphous silicon and an upper portion of the ohmic contact layer 120b. In this case, the data line 135 may be formed to have a line symmetrical structure by bending at a central portion of the pixel region P, and having a zigzag shape on the entire array substrate 101.

The source electrode 138 is branched from the data line 135 to be electrically connected to the data line 135, and the drain electrode 141 is connected to the common line 109. The overlapping common wiring 109 is formed in the pixel region P to form the first storage electrode 114 and the drain electrode 141 overlapping the second storage electrode 143. do. In this case, the storage capacitor StgC is formed by using the first and first storage electrodes 114 and 143 and the gate insulating layer 117 interposed between the two electrodes 114 and 143 as a dielectric layer.

Meanwhile, in the drawing, the first pattern 121a of pure amorphous silicon forming the active layer 120a and the second pattern of impurity amorphous silicon forming the ohmic contact layer 120b (below the data line 135). The semiconductor pattern 121 formed of 121b is formed in the same shape as the data line 135. Furthermore, the active layer 120a and the ohmic contact layer 120b are also disposed under the second storage electrode 143. It is showing that this was formed. This is because the present invention is intended to form a data line 135 including the source and drain electrodes 138 and 141 through one mask process with the semiconductor layer 120. ), And the source and drain electrodes 138 and 141 and the data line 135 are dualized to form two mask processes, respectively, under the data line 135 and the second storage electrode 143. The semiconductor layer 120 and the semiconductor pattern 121 are not formed.

Next, as shown in FIGS. 5C and 6C, an inorganic insulating material of silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is deposited on the data line 135 and the source and drain electrodes 138 and 141. 1 Protective layer 147 is formed. In this case, the first passivation layer 147 may include a black matrix 150 or a color filter layer (155 of FIGS. 5D and 6D) in which the active layer 120a exposed between the source and drain electrodes 138 and 141 is an organic material. In order to reduce the characteristics of the thin film transistor Tr by contacting the substrate, the first protective layer 147 may be omitted.

Thereafter, a black resin is coated on the entire surface of the first passivation layer 147 and patterned to form a black matrix corresponding to the gate line (not shown), the data line 135 and the switching region TrA. 150). In this case, the bonding margin does not need to be considered, and thus, in the conventional transverse field type liquid crystal display device having the same pixel area P, it may be formed to have a width smaller than that of the black matrix formed on the color filter substrate.

Next, as shown in FIGS. 5D and 6D, a red resist is coated on the entire surface of the substrate 101 over the black matrix 150, exposed using a mask (not shown), and developed at a predetermined interval by developing the red resist. The red color filter pattern 155a is repeated. In this case, the red color filter pattern 155a removes the red resist from the transparent hole forming region THA corresponding to a part of the common wiring 109 of each pixel region P, thereby forming the first protective layer 147. The through hole TH is formed to be exposed.

Thereafter, the red, green, and blue color filters are formed by forming the green and blue color filter patterns 155b and 155c having the transmission holes TH in the manner that the red color filter pattern 155a having the transmission holes TH is formed. The color filter layer 155 of the patterns 155a, 155b, and 155c is formed. In this case, each of the red, green, and blue color filter patterns 155a, 155b, and 155c may be sequentially formed for each pixel region P defined by the gate line (not shown) and the data line 135 intersecting with each other. .

Next, as shown in FIGS. 5E and 6E, an inorganic material is formed on the entire surface of the substrate 101 over the color filter layer 155 including the red, green, and blue color patterns 155a, 155b, and 155c having the transmission holes TH. An insulating material, for example, silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is deposited to form the second protective layer 163. The second protective layer 163 is formed to prevent the color filter layer 155, which is an organic material, from reacting with the liquid crystal layer (not shown) to interfere with driving of the liquid crystal.

Subsequently, the second protective layer 163, the first protective layer 147 and the gate insulating layer 117 are patterned at the same time or continuously, so that the second protective layer 163 and the gate insulating layer 117 are patterned at the same time. A drain contact hole 165 exposing the second storage electrode 143 and a common contact hole 167 exposing the common wiring 109 are formed.

Next, as shown in FIGS. 5F and 6F, by depositing and patterning a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) over the second protective layer 163. Each pixel area P contacts the second storage electrode 143 connected to the drain electrode 141 through the drain contact hole 165 and is parallel to the data line 135 in the pixel area P. A plurality of pixel electrodes 170 are formed to be spaced apart from each other, and a plurality of central common electrodes 173 parallel to and alternate with the plurality of pixel electrodes 170 and the plurality of central common electrodes 173. Auxiliary common pattern 177 for connecting the ends of the first and second common patterns 177 and overlapping with the outermost common electrode 111 and the common wiring 109 through the common contact hole 167. The auxiliary common electrode 175 is formed to be in contact with the substrate.

Next, as shown in FIGS. 5G and 6G, a colorless transparent photosensitive organic insulating material is formed on the entire surface of the substrate 101 over the plurality of pixel electrodes 170 and the plurality of central common electrodes 173. The resin is applied to form the organic material layer 180. In this case, the organic material layer 180 reflects this for a large step of 1 micro (μm) or more below by adjusting its viscosity and the like so that the surface is convex or concave than other regions, and 1 micro (μm) For the step of less than the size does not reflect this, the surface can be formed flat, taking advantage of this characteristic, the color filter layer 155 or black matrix 150 having a thickness of 1㎛ or more formed and the transmission The surface of the hole TH is formed to have a step.

Thereafter, 1 using the exposure mask 191 having the general transmission area TA and the blocking area BA with respect to the organic material layer 180 having a lower surface than other areas with respect to the above-mentioned transmission hole TH. After the masking process is performed, the developing process is performed, and as shown in FIGS. 5H and 6H, in each pixel region P, the upper portion of the color filter layer 155 is more precisely located outside the transmission hole TH. Formed on the pixel electrode 170 corresponding to the common wiring 109 to form a first patterned spacer 181 having a first height h1 from the substrate 101 and at the same time inside the transmission hole TH. An array substrate for a transverse field type liquid crystal display device according to the present invention is formed by forming a second patterned spacer 183 having a second height h2 smaller than the first height h1 on the second protective layer 163. Complete 101.

1 is an exploded perspective view of a general liquid crystal display device.

2 is a plan view of one pixel region of an array substrate of a transverse field type liquid crystal display device having a patterned spacer according to an embodiment of the present invention;

3 is a cross-sectional view of a portion cut along the cutting line III-III of FIG.

4 is a cross-sectional view of a portion taken along the line IV-IV of FIG. 2.

  Figures 5a to 5h is a cross-sectional view of the manufacturing step for the part cut along the cutting line III-III of FIG.

6A to 6H are cross-sectional views of manufacturing steps for the portion cut along the cutting line IV-IV of FIG. 2;

<Description of Symbols for Main Parts of Drawings>

101 (array) substrate 106: gate electrode

109: common wiring 114: first storage electrode

117: gate insulating film 120 (120a, 120b): semiconductor layer

120a: active layer 120b: ohmic contact layer

121 (121a, 121b): semiconductor pattern 121a: first pattern

121b: second pattern 135: data wiring

138: source electrode 141: drain electrode

143: second storage electrode 147: first protective layer

150: black matrix 155 (155a, 155b, 155c): color filter layer

155a, 155b, 155c: Red, Green, Blue Color Filter Pattern

163: second protective layer 165: drain contact hole

167: common contact hole 170: pixel electrode

175: auxiliary common electrode 181: first patterned spacer

183: second patterned spacer P: pixel region

StgC: Storage Capacitor TH: Through Hole

THA: Through Hole Formation Area

Claims (17)

Gate wirings and data wirings intersecting each other on the substrate to define pixel regions, and formed on and under the gate insulating film, respectively; A common wiring spaced apart from the gate wiring and formed in the same layer; A thin film transistor connected to the gate line and the data line; A color filter layer formed in each pixel area over the thin film transistor, and removed from the common wiring to form a transmission hole; A plurality of pixel electrodes formed on the color filter layer in the pixel area and electrically connected to the drain electrode of the thin film transistor and spaced apart from each other in parallel with the data line; A plurality of central common electrodes formed to be alternately spaced apart from the plurality of pixel electrodes on the color filter layer and electrically connected to the common wiring; A first patterned spacer formed on the color filter layer and having a first height from the substrate; A second patterned spacer having a second height smaller than the first height in the transmission hole from which the color filter layer is removed; Array substrate for a liquid crystal display device comprising a. The method of claim 1, The thin film transistor includes a gate electrode sequentially stacked, the gate insulating layer, a semiconductor layer, and source and drain electrodes spaced apart from each other, and the drain electrode is formed to overlap the common wiring with the gate insulating layer interposed therebetween. An array substrate for liquid crystal display devices. The method of claim 1, A first protective layer covering the thin film transistor and formed on an entire surface of the substrate under the color filter layer; A second protective layer covering the color filter layer and formed on the entire surface of the substrate; Array substrate for a liquid crystal display device comprising a. The method of claim 3, wherein A common contact inside the transmission hole to remove the second and first protective layers to expose the drain electrode, and to remove the second and first protective layers and the gate insulating layer to expose the common wiring. Array substrate for a liquid crystal display device, characterized in that provided with a hole. The method of claim 4, wherein In the pixel area, An auxiliary common electrode formed on the outermost side of the same layer in the same layer as the central common electrode and contacting the common wiring through the common contact hole; An auxiliary common pattern connecting one end of the auxiliary common electrode and the plurality of central common electrodes; An array substrate for a liquid crystal display device formed thereon. The method of claim 5, wherein And one end of each of the plurality of pixel electrodes is in contact with the drain contact hole. The method of claim 5, wherein And an outermost common electrode formed at the outermost portion of the pixel area and overlapping the auxiliary common electrode by branching from the common wiring. The method of claim 3, wherein And the first and second protective layers are both made of an inorganic insulating material. The method of claim 1, And an array of black matrices corresponding to the gate lines, data lines, and thin film transistors. The method of claim 1, And the data lines, the plurality of central common electrodes, and the plurality of pixel electrodes are symmetrically bent with respect to the central portion of the pixel area. Forming a common wiring parallel to the gate wiring extending in one direction and spaced apart from the gate wiring on the substrate; Forming a gate insulating film on the entire surface of the substrate over the gate wiring and the common wiring; Forming a data line on the gate insulating layer to cross the gate line and define a pixel area; Forming a thin film transistor connected to the gate line and the data line; Forming a color filter layer on the thin film transistor, wherein portions of the common wiring formed in each pixel area are removed to have transmission holes; Forming a plurality of common electrodes and pixel electrodes in the pixel area on the color filter layer, the plurality of common electrodes alternately arranged in parallel with the data lines; Forming first and second patterned spacers having different heights through one patterning of the same material corresponding to each of the upper portion of the color filter layer and the transmission hole. Method of manufacturing an array substrate for a liquid crystal display device comprising a. The method of claim 11, The drain electrode of the thin film transistor is formed to overlap the common wiring, so that the overlapped common wiring and the drain electrode and the gate insulating film interposed therebetween form a storage capacitor. The method of claim 12, Forming a first protective layer of an inorganic insulating material on the entire surface of the substrate above the thin film transistor before the color filter layer is formed; Forming a second passivation layer on the entire surface of the substrate above the color filter layer; Method of manufacturing an array substrate for a liquid crystal display device comprising a. The method of claim 13, After forming the color filter layer, patterning is performed to remove the second and first protective layers and the gate insulating layer in the transmission hole, respectively, to expose the drain electrode and the common contact hole to expose the common wiring. Method of manufacturing an array substrate for a liquid crystal display device comprising the step of forming a. The method of claim 14, Forming the plurality of common electrodes and pixel electrodes may include: Forming an auxiliary common pattern contacting the common wiring through the common contact hole and connecting an auxiliary common electrode, an auxiliary common electrode, and ends of the plurality of common electrodes at an outermost portion of the pixel region; Forming a plurality of pixel electrodes at one end thereof to be in contact with the drain electrode through the drain contact hole; Method of manufacturing an array substrate for a liquid crystal display device comprising a. The method of claim 15, Forming the gate and the common wiring, And forming an outermost common electrode overlapping the auxiliary common electrode with the same material on the same layer on which the gate and the common wiring are formed, and branching from the common wiring. The method of claim 11, And the data lines, the plurality of common electrodes, and the plurality of pixel electrodes have a structure symmetrically bent with respect to a central portion of the pixel area.

Images