KR20080065334A - Liquid crystal display and menufacturing method thereof0 - Google Patents

Abstract

An LCD(Liquid Crystal Display) and a manufacturing method thereof are provided to achieve low charge voltage and quick charge speed by using a storage capacitor comprising an active layer doped with impurities, a gate insulating layer and a storage electrode. A TFT(Thin Film Transistor)(10) is formed on a substrate at an intersection portion between a gate line(2) and a data line(4), and has a first active layer(18) made from poly silicon. A pixel electrode(15) is connected with the TFT. A storage capacitor comprises a second active layer and a storage electrode(24). The second active layer is prolonged from the first active layer and doped with impurities. The storage electrode is overlapped with a part of the second active layer as leaving a space for an insulating layer. In the storage electrode, at least one doping hole(23) for doping the impurities on the second active layer is formed.

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY AND MENUFACTURING METHOD THEREOF0}

1 is a plan view illustrating one sub-pixel in a thin film transistor substrate of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along a line II ′ of the thin film transistor substrate of FIG. 1.

3 is a plan view illustrating a storage capacitor of the thin film transistor substrate illustrated in FIG. 1.

4A and 4B are a plan view and a cross-sectional view for describing a first mask process in a method of manufacturing a liquid crystal display according to an exemplary embodiment of the present invention.

5A and 5B are plan and cross-sectional views illustrating a second mask process in the method of manufacturing the liquid crystal display according to the exemplary embodiment of the present invention.

6 is a cross-sectional view for describing an impurity doping process in a method of manufacturing a liquid crystal display according to an exemplary embodiment of the present invention.

7A and 7B are plan views and cross-sectional views illustrating a third mask process in the method of manufacturing the liquid crystal display according to the exemplary embodiment of the present invention.

8A and 8B are a plan view and a cross-sectional view for describing a fourth mask process in a method of manufacturing a liquid crystal display according to an exemplary embodiment of the present invention.

9A and 9B are plan views and cross-sectional views illustrating a fifth mask process in the method of manufacturing the liquid crystal display according to the exemplary embodiment of the present invention.

<Brief Description of Drawings>

1: substrate 2: gate line

3: buffer film 4: data line

5: gate insulating film 6: gate electrode

10: thin film transistor 11; Interlayer insulation film

12: source electrode 13: source contact hole

14 drain drain hole 15 pixel electrode

16: drain electrode 17: pixel contact hole

18: first active layer 20: storage capacitor

22: second active layer 23: doping hole

24: storage electrode 25: storage line

30: Shield

The present invention relates to a method for manufacturing a liquid crystal display using low temperature polysilicon, and in particular, comprising a storage capacitor comprising an active layer, a gate insulating film, and a storage electrode, and doping the active layer at a high concentration, so that the charging speed of the storage capacitor is high and the charging voltage is high. A method for manufacturing a low liquid crystal display device is disclosed.

In a liquid crystal display (LCD), each of the liquid crystal subpixels arranged in a matrix form on a liquid crystal display substrate displays an image by adjusting the light transmittance of the liquid crystal according to a video signal. The liquid crystal display uses a thin film transistor (TFT) as a switch element for driving an active matrix. The TFT uses an amorphous silicon thin film or a low temperature poly silicon (LTPS) thin film as an active layer. The LTPS thin film is a thin film obtained by crystallizing an amorphous silicon thin film by a laser annealing method, so the electron mobility is very high, and the circuit is highly integrated, and thus, the driving circuit of the image display unit may be embedded on the substrate. The driving circuit incorporated in the liquid crystal panel using LTPS includes a plurality of PMOS TFTs, NMOS TFTs, and CMOS TFTs.

Each of the liquid crystal subpixels arranged in a matrix form in the image display portion of the liquid crystal panel includes a TFT connected to the gate line and the data line, and a liquid crystal capacitor and a storage capacitor connected in parallel with the TFT. The liquid crystal capacitor is connected to the TFT so that the pixel electrode formed on the TFT substrate overlaps with the common electrode formed on the color filter substrate with the liquid crystal interposed therebetween, and the storage capacitor has an active layer extending from the active layer of the TFT between the insulating film. It overlaps with the storage electrode of the storage line and is formed in the TFT substrate. The active layer constituting the storage capacitor becomes conductive by doping with impurities.

At this time, the storage electrode formed on the upper portion is used as a mask during the doping of the active layer. Therefore, only portions of the active layer that do not overlap with the storage electrodes are doped. In the case where the doped region is only the outer region of the active layer, since a large region in the center is not doped, a higher voltage must be used than when a metal is used. In practice, there is a problem in that a high voltage of about 12 to 15V should be applied to the storage capacitor used by doping the active layer.

In addition, since charging starts from the outer region of the active layer, it takes a long time for the entire storage capacitor to be charged, thereby causing a long charging time.

Accordingly, a technical object of the present invention is to provide a method of manufacturing a liquid crystal display device having a storage capacitor including an active layer, a gate insulating layer, and a storage electrode, and doping the active layer at a high concentration, with a fast charge rate of the storage capacitor and a low charge voltage. To provide.

In order to solve the above technical problem, the present invention is a thin film transistor formed on the intersection of the gate line and the data line on the substrate to provide a first active layer made of polysilicon; And a second active layer including a pixel electrode connected to the thin film transistor and extending from the first active layer and doped with impurities. And a storage capacitor including a storage electrode overlapping a portion of the second active layer with an insulating layer interposed therebetween, and a storage electrode having at least one doping hole formed in the second active layer to dope the impurity. .

Here, the insulating film is characterized in that the gate insulating film.

The impurity may be any one of an n + material and a p + material.

In addition, the doping hole is characterized in that formed in a width of 1 to 3㎛.

In this case, the storage electrode is formed on the same layer of the same metal as the gate electrode of the thin film transistor.

And in order to solve the above technical problem, the present invention comprises the steps of forming a polysilicon thin film on the substrate; Patterning the polysilicon thin film to form first and second active layers; Forming an insulating film on the first and second active layers; Forming a gate metal layer on the insulating film; Patterning the gate metal layer to form a gate electrode overlapping a portion of the first active layer and a storage electrode overlapping a portion of the second active layer and having at least one doping hole for impurity doping; Doping the impurity into the doping hole; A method of manufacturing a liquid crystal display device comprising forming a source electrode, a drain electrode, and a pixel electrode is provided.

The forming of the storage electrode may further include forming the doping hole in a width of 1 to 3 μm.

And doping the dopant includes doping any one of an n + material and a p + material.

And after the doping of the impurity, heating the second active layer to diffuse the impurity into the second active layer.

Other objects and advantages of the present invention in addition to the above object will be apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a plan view illustrating a thin film transistor substrate of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a cross-sectional view illustrating a cross section taken along line II ′ of the thin film transistor substrate of FIG. 1. .

1 and 2, a thin film transistor substrate according to the present invention is formed on an intersection of a gate line 2 and a data line 4 on a substrate 1 to form a first active layer 18 made of polysilicon. A second active layer 22 including a thin film transistor 10 and a pixel electrode 15 connected to the thin film transistor 10, extending from the first active layer 18 and doped with impurities. The storage electrode 24 overlaps a portion of the second active layer 22 with the gate insulating layer 5 interposed therebetween, and at least one doping hole 23 is formed in the second active layer 22 to dope impurities. It includes a storage capacitor 20 made up.

Specifically, the gate line 2 and the data line 4 are formed to cross each other with the gate insulating film 5 interposed therebetween. The gate line 2 turns on the thin film transistor 10 by sequentially supplying a gate-on voltage supplied from a gate driver (not shown) to the thin film transistor 10. The data line 4 supplies the data voltage whenever the gate-on voltage is supplied to the gate line 2.

The thin film transistor 10 supplies the data voltage supplied from the data line 4 to the pixel electrode 15 in response to the gate-on voltage supplied from the gate line 2. The thin film transistor 10 includes a gate electrode 6 connected to the gate line 2, a source electrode 12 connected to the data line 4, a drain electrode 16 connected to the pixel electrode 15, and a source. The first active layer 18 forms a channel between the electrode 12 and the drain electrode 16.

The first active layer 18 is formed on the substrate 1 with the buffer film 3 interposed therebetween. The first active layer 18 may include the source region 18S and the drain region doped with impurities, with the channel region 18C and the channel region 18C overlapping the gate electrode 6 formed on the gate insulating layer 5 interposed therebetween. 18D).

The source electrode 12 and the drain electrode 16 formed on the interlayer insulating layer 11 are formed through the source contact hole 13 and the drain contact hole 14 penetrating the interlayer insulating layer 11 and the gate insulating layer 5, respectively. 1 is connected to the source region 18S and the drain region 18D of the active layer 18, respectively. The drain electrode 16 is connected to the pixel electrode 15 through the pixel contact hole 17 penetrating the protective film 30 formed thereon.

The pixel electrode 15 overlaps the common electrode of the color filter substrate with the liquid crystal interposed therebetween to form a liquid crystal cell, that is, a liquid crystal capacitor, in a sub pixel unit. The liquid crystal capacitor charges the pixel voltage which is a difference voltage between the data signal supplied to the pixel electrode 15 and the common voltage supplied to the common electrode through the turned-on thin film transistor 10 to drive the liquid crystal.

3 is a plan view illustrating a storage capacitor of a thin film transistor substrate according to an exemplary embodiment of the present invention.

Referring to FIG. 3, the storage capacitor 20 allows the pixel voltage charged in the liquid crystal capacitor to be stably maintained even during the turn-off period of the thin film transistor. To this end, the storage capacitor 20 is formed by overlapping the storage electrode 24 with the second active layer 22 which is extended from the first active layer 18 and doped with an impurity doped with the gate insulating film 5 therebetween. The storage electrode 24 is formed to be connected to the storage line 25 to receive a storage voltage from the storage line 25.

As illustrated in FIG. 3, the storage electrode 24 is formed with a doping hole 23 for doping impurities in the second active layer 22. The doping hole 23 is preferably formed to have a width within 3 μm, more preferably 1 to 3 μm in width. Herein, when the doping hole 23 is formed to be 1 μm or less, it is difficult to inject impurities. When the doping hole 23 is formed to be 3 μm or more, doping of impurities is easy, but the area of the storage electrode 24 is reduced, resulting in a decrease in storage capacitor capacity.

The second active layer 22 is heated after the impurities are doped by the doping holes 23, and the impurities are diffused through the entire second active layer 22. Accordingly, the second active layer 22 has a very good electrical conduction properties, such as metal, including the entirety of the impurity. Accordingly, the storage capacitor 20 including the second active layer 22, the storage electrode 24, and the gate insulating layer 5 reduces the charging voltage to about 3 to 4 V and shortens the charging time.

Here, the doping hole 23 may also be formed in a region in which the storage line 25 supplying the storage voltage to the storage electrode 24 overlaps with the second active layer 22. Accordingly, the capacity of the storage capacitor 20 can be further increased.

The doped region may be doped with n + material or doped with p + material. As such, the second active layer 22 is doped with n + or p + material so that the doped region behaves like a metal and functions as an electrode.

In the non-display area, a driving circuit connected to the gate line 2 and the data line 4 may be embedded. The driving circuit inputs a power signal, a control signal, and a data signal through an input pad to drive the gate line 2 and the data line 4.

Hereinafter, a method of manufacturing a liquid crystal display substrate according to an exemplary embodiment of the present invention will be described in detail.

4A and 4B are plan and cross-sectional views illustrating a first mask process in the method of manufacturing a liquid crystal display substrate according to an exemplary embodiment of the present invention.

4A and 4B, a buffer film 3 is formed on an insulating substrate 1, and first and second active layers 18 and 22 are formed on the buffer film 3 by a first mask process. . The first active layer 18 serves as a channel of the thin film transistor, and the second active layer 22 serves as a lower electrode of the storage capacitor 20. In this case, the first active layer 18 and the second active layer 22 are connected to each other.

Specifically, the buffer film 3 and the polysilicon thin film are laminated on the insulating substrate 1. The buffer film 3 is formed by depositing an inorganic insulating material such as silicon oxide on the insulating substrate 1 by a deposition method such as plasma enhanced chemical vapor deposition (PECVD). The buffer film 3 prevents impurities present in the insulating substrate 1 from penetrating into the polysilicon thin film. The polysilicon thin film is formed by forming an amorphous silicon thin film on the buffer film 3 by PECVD or the like and then crystallizing by laser annealing or the like. Dehydrogenation may be further performed to remove hydrogen atoms present in the amorphous silicon thin film before laser crystallization. In addition, the polysilicon thin film may be formed by a process of forming polysilicon through a laser annealing process or a heating process after the amorphous silicon thin film is formed.

Subsequently, a photoresist pattern is formed on the polysilicon thin film by a photolithography process using a first mask. By patterning the polysilicon thin film by an etching process using the photoresist pattern as a mask, the first and second active layers 18 and 22 are formed as shown in FIG. 4B.

5A and 5B are plan and cross-sectional views illustrating a second mask process in the method of manufacturing the thin film transistor substrate according to the exemplary embodiment of the present invention.

Referring to FIGS. 5A and 5B, the gate insulating layer 5 and the gate metal layer are successively deposited on the substrate 1 on which the first active layer 18 and the second active layer 22 are formed. The gate insulating film 5 is formed by depositing an inorganic insulating material such as silicon oxide on the entire surface of the buffer film 3 on which the first active layer 18 and the second active layer 22 are formed by PECVD. Subsequently, a gate metal layer is formed on the gate insulating film 5 through a deposition method such as a sputtering method. As the gate metal layer, molybdenum (Mo), aluminum (Al), chromium (Cr), and the like and alloys thereof are laminated and used in a single layer or a multilayer structure. Next, the gate metal layer is patterned to form the gate line 2, the gate electrode 6, the storage line 25, and the storage electrode 24. That is, the gate metal pattern including the gate line 2, the gate electrode 6, the storage line 25, and the storage electrode 24 is formed in the second mask process. In this case, the gate electrode 6 is formed to overlap the center of the first active layer 18, and the storage electrode 24 is formed to overlap a portion of the second active layer 22.

In particular, the storage electrode 24 is formed to have a smaller area than the second active layer 22.

In addition, as illustrated in FIGS. 5A and 5B, the storage electrode 24 has a doping hole 23 formed through the storage electrode 24. The doping hole 23 may be formed in the entirety of the storage electrode 24, and may also be formed in the storage line 25. As the doping holes 23 are formed as described above, impurities may be injected into the second active layer 22. At this time, the doping hole 23 is to have a width of 1 to 3㎛.

6 is a cross-sectional view illustrating an impurity doping process in a method of manufacturing a thin film transistor substrate according to an exemplary embodiment of the present invention.

As shown in FIG. 6, n + is applied to the first and second active layers 18 and 22 that are not overlapped with the gate pattern by using a gate metal pattern including the gate electrode 6 and the storage electrode 24 as a mask. By doping the impurities, the source region 18S, the drain region 18D, and the second active layer 22 of the first active layer 18 doped with n + impurities are formed. Of course, p + impurities can also be doped.

Thus, in the present invention, since the doping the impurities using the gate pattern as a mask, there is an advantage that no additional mask is required. In the actual process, if the shape regarding the storage electrode is slightly modified among the conventional second mask shapes, the present invention can be applied as it is.

7A and 7B are plan views and cross-sectional views illustrating a third mask process in a method of manufacturing a liquid crystal display substrate according to an exemplary embodiment of the present invention.

7A and 7B, an interlayer insulating layer 11 including source and drain contact holes 13 and 14 is formed in a third mask process. The interlayer insulating film 11 is formed by depositing an inorganic insulating material such as silicon oxide, silicon nitride, or the like on the gate insulating film 5 having the gate metal pattern formed thereon by a deposition method such as PECVD. Subsequently, the source region 18S and the drain region 18D of the first active layer 18 are exposed through the interlayer insulating layer 11 and the gate insulating layer 5 by a photolithography process and an etching process using a third mask. Source and drain contact holes 13 and 14 are formed.

8A and 8B are plan and cross-sectional views illustrating a fourth mask process in the method of manufacturing the liquid crystal display substrate according to the exemplary embodiment of the present invention.

8A and 8B, a source / drain metal pattern including a data line 4, a source electrode 12, and a drain electrode 16 is formed on the interlayer insulating layer 11 by a fourth mask process. . The source / drain metal pattern is formed by forming a source / drain metal layer on the interlayer insulating film 11 by a deposition method such as sputtering, and then patterning the source / drain metal layer by a photolithography process and an etching process using a fourth mask. The source electrode 12 and the drain electrode 16 are connected to the source region 18S and the drain region 18D of the first active layer 18 through the source and drain contact holes 13S and 13D, respectively, to form a thin film transistor ( 10) form.

9A and 9B are plan and cross-sectional views illustrating a fifth mask process in the method of manufacturing the liquid crystal display substrate according to the exemplary embodiment of the present invention.

9A and 9B, the organic passivation layer 30 including the pixel contact hole 17 is formed on the interlayer insulating layer 11 on which the source / drain metal pattern is formed in the fifth mask process. The organic passivation layer 30 is formed by coating an organic insulating material such as an acryl-based organic compound, BCB, or PFCB by a spin coating method, a spinless coating method, or the like. Subsequently, the pixel contact hole 17 penetrating the organic passivation layer 30 is formed by a photolithography process and an etching process using a fifth mask. In this case, an inorganic passivation layer may be further formed on and / or under the organic passivation layer 30, and the pixel contact hole 17 may pass through the added inorganic passivation layer.

Then, the pixel electrode 15 is formed. 9A and 9B, the pixel electrode 15 is connected to the drain electrode 16 through the pixel contact hole 17 to receive a pixel voltage. The pixel electrode 15 is formed in each sub pixel region by forming a transparent conductive layer on the organic passivation layer 30 and the gate insulating layer 5 by a deposition method such as sputtering and then patterning the photolithography and etching processes using a mask. . As the transparent conductive layer, indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), or ITZO are used.

As described above, the liquid crystal display device and the method of manufacturing the same according to the present invention, as described above, the liquid crystal display device and the method of manufacturing the same according to the present invention comprises a storage capacitor consisting of an impurity doped active layer, a gate insulating film and a storage electrode Use has the advantage of low charging voltage, fast charging speed.

In addition, according to the method of manufacturing the liquid crystal display according to the present invention, a doping hole is formed in the storage electrode without adding a separate mask process, thereby doping impurities into the active layer, thereby reducing the process cost.

Claims (9)

A thin film transistor formed on an intersection of a gate line and a data line on the substrate and having a first active layer made of polysilicon; And A pixel electrode connected to the thin film transistor, A second active layer extending from the first active layer and doped with impurities; And And a storage capacitor formed of a storage electrode overlapping a portion of the second active layer with an insulating layer interposed therebetween, and having a storage electrode having at least one doping hole in the second active layer. The method of claim 1, And the insulating film is a gate insulating film. The method of claim 2, Wherein the impurity is any one of an n + material and a p + material. The method of claim 3, wherein The doping hole is a liquid crystal display device, characterized in that formed in a width of 1 to 3㎛. The method of claim 4, wherein And the storage electrode is formed on the same layer of the same metal as the gate electrode of the thin film transistor. Forming a polysilicon thin film on the substrate; Patterning the polysilicon thin film to form first and second active layers; Forming an insulating film on the first and second active layers; Forming a gate metal layer on the insulating film; Patterning the gate metal layer to form a gate electrode overlapping a portion of the first active layer and a storage electrode overlapping a portion of the second active layer and having at least one doping hole for impurity doping; Doping the impurity into the doping hole; Forming a pixel electrode with a source electrode, a drain electrode, and a pixel electrode; The method of claim 6, Forming the storage electrode The doping hole further comprises a step of forming a width of 1 to 3㎛. The method of claim 7, wherein Doping the impurity A method of manufacturing a liquid crystal display device comprising the step of doping any one of n + material or p + material. The method of claim 8, After doping the impurity Heating the second active layer to diffuse the impurities into the second active layer.

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