KR20080060562A - Method of forming a metal wire in a semiconductor device - Google Patents

Abstract

A method for forming a metal line of a semiconductor device is provided to minimize capacitance of a metal line by forming an etch-stop barrier layer on a second insulating layer and removing the etch-stop barrier layer while forming the metal line. A first insulating layer(101), an etch-stop barrier layer, and a second insulating layer(104) are formed above a semiconductor substrate(100). A part of the second insulating layer is etched by a first etching process. A trench for metal wiring(114) is formed by etching the etch-stop barrier layer and the first insulating layer by a second etching process. The trench is filled with conductive material.

Description

Method of forming a metal wire in a semiconductor device

1A to 1E are cross-sectional views illustrating a method of forming metal wires in a semiconductor device according to an embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

100 semiconductor substrate 101 first insulating film

102 drain contact plug 104 second insulating film

106: etching stop film 108: third insulating film

110: trench 112: barrier metal film

114: metal wiring 116: fourth insulating film

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming metal wirings in a semiconductor device, and more particularly, to a method for forming metal wirings in a semiconductor device for improving the reliability of metal wiring.

As devices become more integrated, design rules are reduced but the program speed is increased, and metal wiring is performed by damascene process using metal materials with low resistivity and low-k materials. How to form

In general, when the metal wiring is formed using the damascene process, the following problems occur.

First, as the pitch of the metal wiring decreases, the resistance value of the metal wiring increases rapidly, which adversely affects reliability and device characteristics such as RC delay. This requires a value that minimizes time delay.

Second, when the metal wiring is formed using tungsten (W), a nitride film for etch stop is required in the trench forming process for forming the metal wiring. As a result, an etch stop nitride film is formed on the drain contact plug and the etch stop film is not removed during the trench forming process, thereby increasing capacitance of the metal wiring.

Third, the contact plug is damaged by the etching process in the trench formation process for forming the metal wiring.

In the present invention, since the trench is formed by the etching process twice in the process of forming the metal wiring by the damascene process, damage to the lower contact plug may be minimized.

In the method of forming a metal wire of a semiconductor device according to an embodiment of the present disclosure, a first insulating film, an etch stop film, and a second insulating film are formed on the semiconductor substrate. A portion of the second insulating layer is etched by the first etching process. In the second etching process, the etch stop layer and the first insulating layer are etched to form a trench for metal wiring. Fill the trench with a conductive material.

In the above description, the first and second insulating layers are formed of an oxide and formed at the same height as each other. The etch stop layer forms a titanium nitride layer (TiN) with a thickness of 150 kPa to 200 kPa using a physical vapor deposition method (PVD). In the first etching process, the etch stop layer is etched to a thickness of 50 kPa to 100 kPa. The second etching process is performed by a blanket etching process. In the second etching process, the second insulating layer is removed, and the etch stop layer is removed by about 50 kPa to about 100 kPa.

According to one or more exemplary embodiments, a metal wire forming method of a semiconductor device may include a semiconductor substrate on which contact plugs are formed. A first insulating film, an etch stop film, and a second insulating film are formed on the semiconductor substrate. A portion of the second insulating film is etched by the etching process. The etch stop layer and the first insulating layer are etched using the patterned second insulating layer as a mask to form a metal wiring trench. The trench is filled with a conductive material to form metal wiring.

In the above, the contact plug is formed of a polysilicon film. The first and second insulating layers are formed of oxides, but are formed at the same height as each other. The etch stop film forms a titanium nitride film (TiN) with a thickness of 150 kPa to 200 kPa using a physical vapor deposition method (PVD). In the second insulating layer etching process, the etch stop layer is etched to a thickness of about 50 kPa to about 100 kPa. The etching process for forming the trench is performed by a blanket etching process. In the etching process for forming the trench, the second insulating film is removed, and the etch stop film is removed by about 50 kPa to about 100 kPa. Before filling the trench with a conductive material, a barrier metal film is formed on the semiconductor substrate including the trench in the form of a liner. The barrier metal film is formed by depositing titanium (Ti) and titanium nitride film (TiN) by sputtering.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1A through 1E are cross-sectional views of devices sequentially illustrated to explain a method for forming metal wires of a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 1A, a first insulating layer 101 is formed on a semiconductor substrate 100 on which a semiconductor device (not shown) such as a transistor or a flash memory cell is formed. Subsequently, a portion of the first insulating film 101 is removed to expose a portion of the junction region (not shown) formed on the semiconductor substrate 100, and then the contact plug (filled with a conductive material is filled with a region where the first insulating film 101 is removed). 102). The second insulating layer 104, the etch stop layer 106, and the third insulating layer 108 are sequentially formed on the semiconductor substrate 100 on which the contact plug 102 is formed. In this case, the second insulating film 104 and the third insulating film 108 are formed of an oxide, and are formed at the same height, and the etch stop film 106 is formed of titanium using physical vapor deposition (PVD). The nitride film TiN is formed to a thickness of 150 kPa to 200 kPa.

Referring to FIG. 1B, after forming a photoresist pattern (not shown) on the third insulating layer 108 through an exposure and development process, the third insulating layer 108 is etched using the photoresist pattern as a mask. In this case, during the etching process of the third insulating layer 108, the etching stops at the etch stop layer 106, and the etch stop layer 106 is etched to a thickness of about 50 μm to about 100 μm. Then, the photoresist pattern is removed.

Referring to FIG. 1C, the trench 110 is formed by etching the etch stop layer 106 and the second insulating layer 104 by a blanket etching process. In this case, during the etching process for forming the trench 110, the third insulating layer 108 is removed and the etch stop layer 106 is removed by about 50 kV to about 100 kPa. While the trench 110 is formed, the lower contact plug 102 is exposed.

Referring to FIG. 1D, a barrier metal layer 112 is formed in a liner shape on the semiconductor substrate 100 including the trench 110. In this case, the barrier metal layer 112 may be formed by depositing titanium (Ti) and titanium nitride layer (TiN) by a sputtering method.

Referring to FIG. 1E, a conductive material is formed on the semiconductor substrate 100 including the barrier metal layer (112 of FIG. 1D) to fill the trench 110. At this time, the conductive material is formed of tungsten (W).

Then, a chemical mechanical polishing (CMP) process is performed such that the conductive material remains only in the trench 110 to form the metal interconnect 114. At this time, during the polishing process for forming the metal wiring 114, the etch stop film 106 and the barrier metal film (112 of FIG. 1D) formed on the second insulating film 104 are also removed. The fourth insulating layer 116 is formed on the semiconductor substrate 100 including the second insulating layer 104 and the metal wiring 114. In this case, the fourth insulating film 116 is formed of an oxide.

As described above, when the third insulating film 108 is primarily etched to form the trench 110 and then the second insulating film 104 is etched secondly, the amount of the second insulating film 104 is etched. As a result, the third insulating layer 108 patterned on the etch stop layer 106 is etched so that the excessive etching of the drain contact plug 102 is not performed during the etching process of the second insulating layer 104. This may minimize the loss of the polysilicon film used as the material of the drain contact plug 102.

In addition, although the etch stop nitride film is previously formed on the drain contact plug and was not removed during the trench formation process, the metal interconnect 114 is formed by forming the etch stop film 106 on the second insulating film 104. During the process, the etch stop layer 106 may be removed, thereby minimizing the capacitance of the metal wire 114. As a result, by reducing the RC delay which is a problem in the process of forming the metal wiring of the memory device, it is possible to improve the operation speed of the device, reduce power consumption, and ensure device reliability.

In addition, it is possible to reduce the size of the device by improving the reliability of the metal wiring to improve the time dependent dielectric breakdown (TDDB) characteristics.

Although the technical spirit of the present invention has been described in detail according to the above-described preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

As described above, the effects of the present invention are as follows.

First, since the etching process is performed twice in the trench formation process for forming the metal wiring using tungsten (W) damascene, the loss of the polysilicon film used as the material of the drain contact plug can be minimized.

Second, the etch stop layer may be formed on the second insulating layer to remove the etch stop layer during the metal line forming process, thereby minimizing the capacitance of the metal line.

Third, by minimizing the capacitance of the metal wiring, the RC delay, which is a problem in the formation of the metal wiring of the memory device, can be reduced, thereby improving the operation speed of the device, reducing power consumption, and securing device reliability. Can be.

Fourth, it is possible to reduce the size of the device by improving the reliability of the metal wiring to improve the time dependent dielectric breakdown (TDDB) characteristics.

Claims (19)

Forming a first insulating film, an etch stop film, and a second insulating film on the semiconductor substrate; Etching a portion of the second insulating layer by a first etching process; Forming a trench for metal wiring by etching the etch stop layer and the first insulating layer by a second etching process; And And filling the trench with a conductive material. The method of claim 1, The first and the second insulating film is formed of an oxide, the metal wire forming method of the semiconductor device to the same height to each other. The method of claim 1, The etch stop layer is formed of a titanium nitride film (TiN) by using a physical vapor deposition method (Physical Vapor Deposition; PVD). The method of claim 1, The etching stop layer is a metal wiring forming method of a semiconductor device to form a thickness of 150 ~ 200Å. The method of claim 1, The metallization method of claim 1, wherein the etch stop layer is etched to a thickness of about 50 kPa to about 100 kPa during the first etching process. The method of claim 1, The second etching process is a metal wire forming method of the semiconductor device to be etched by a blanket (blanket) etching process. The method of claim 1, And removing the second insulating layer during the second etching process. The method of claim 1, The method of claim 2, wherein the etching stop layer is removed by about 50 kV to about 100 kPa during the second etching process. Providing a semiconductor substrate having a contact plug formed thereon; Forming a first insulating film, an etch stop film, and a second insulating film on the semiconductor substrate; Etching a portion of the second insulating film by an etching process; Etching the etch stop layer and the first insulating layer using the patterned second insulating layer as a mask to form a trench for metal wiring; And And forming a metal wiring by filling the trench with a conductive material. The method of claim 9, And the contact plug is formed of a polysilicon film. The method of claim 9, The first and the second insulating film is formed of an oxide, the metal wire forming method of the semiconductor device to the same height to each other. The method of claim 9, The etch stop layer is formed of a titanium nitride film (TiN) by using a physical vapor deposition method (PVD) metal wiring forming method of a semiconductor device. The method of claim 9, The etching stop layer is a metal wiring forming method of a semiconductor device to form a thickness of 150 ~ 200Å. The method of claim 9, The etching stop layer is etched to a thickness of about 50 ~ 100 Å in the second insulating layer etching process metal wiring forming method of a semiconductor device. The method of claim 9, The etching process for forming the trench is a metal wiring forming method of a semiconductor device is performed by a blanket (etching) etching process. The method of claim 9, And the second insulating layer is removed during the etching process for forming the trench. The method of claim 9, The etching stop layer is removed from the etching process for forming the trench about 50kW to 100kW metal wiring forming method of a semiconductor device. The method of claim 9, Before filling the trench with a conductive material, And forming a barrier metal layer in a liner shape on the semiconductor substrate including the trench. The method of claim 18, The barrier metal film is formed by depositing titanium (Ti) and titanium nitride film (TiN) by the sputtering method (Metal wiring formation method of a semiconductor device).

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