KR20080000241A - Liquid crystal display - Google Patents

Abstract

An LCD is provided to prevent flickering phenomenon occurring because of a difference in liquid crystal transmittance between a positive data voltage and a negative data voltage by providing a liquid crystal panel where first to fourth pixels are repetitively arranged with a basic unit of a 2x2 pixel matrix, and a timing controller providing a polarity signal such that a polarity change of the 2x2 pixel matrix is repeated every four frames. A liquid crystal panel(100) includes first to fourth pixels repetitively arranged with a basic unit of 2x2 pixel matrix. A timing controller(600) generates gate and data control signals for driving the liquid crystal panel, and includes a polarity signal generator generating a polarity signal for inverting a polarity signal of a data voltage with respect to a common voltage, and a polarity signal converting unit converting the polarity signal such that a polarity change of the 2x2 pixel matrix is repeated every four frames. A driving voltage generator(200) receives the control signal to generate a plurality of driving voltages. A gate driver(300) receives the driving voltage and applies the driving voltage to a gate line of the liquid crystal panel. A data driver(500) applies a data voltage to the data line of the liquid crystal panel.

Description

Liquid crystal display

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an internal block diagram of a timing controller according to an embodiment of the present invention.

3 is a diagram illustrating a pixel matrix applied to each frame according to an embodiment of the present invention.

4 is a diagram illustrating polarities of data voltages in each frame according to an embodiment of the present invention.

5 and 6 are waveform diagrams of a frame inverted polarity signal output through a polarity signal converter according to an exemplary embodiment of the present invention.

7 is a diagram illustrating polarities of data voltages applied to a liquid crystal panel according to a frame inversion polarity signal according to an exemplary embodiment of the present invention.

(Explanation of symbols for the main parts of the drawing)

100: liquid crystal panel 200: drive voltage generator

300: gate driver 400: gamma voltage generator

500: data driver 600: timing controller

610: polarity signal generator 620: polarity signal converter

700: first pixel matrix 800: second pixel matrix

701 and 801: first pixel 702 and 802: second pixel

703 and 803: third pixel 704 and 804: fourth pixel

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of preventing the flicker phenomenon.

In general, a liquid crystal display is a desired image signal by applying an intensity-controlled electric field to a liquid crystal having an anisotropic dielectric constant injected between two substrates to control the amount of light transmitted through the substrate. To obtain the display device.

The LCD includes a plurality of gate lines and a plurality of data lines formed to intersect the gate lines and transfer image data, and are formed in a region surrounded by the gate lines and the data lines and connected through a thin film transistor serving as a switch. It includes a pixel electrode in the form of a matrix.

The method of applying image data to each pixel in such an LCD is as follows.

First, when the gate on / off signals are sequentially applied to the gate lines, the thin film transistors connected to the gate lines are sequentially turned on and off, and at the same time, an image signal to be applied to the pixel row corresponding to the gate line, that is, a data voltage is applied. It is supplied to each data line. Then, the image signal supplied to the data line is applied to each pixel electrode through the turned on thin film transistor. At this time, the gate signal is sequentially applied to all the data lines for one frame to apply the pixel signal to all the pixel rows.

In this case, when data voltages having the same polarity are continuously applied to the pixel electrodes, ionic impurities in the liquid crystal are precipitated due to the characteristics of the liquid crystal, resulting in electrochemical changes at the pixel electrode and the counter electrode, resulting in a decrease in luminance or an afterimage. . Therefore, it is necessary to drive by inverting the polarity of the data voltage with respect to the common voltage. Accordingly, dot inversion driving for inverting the polarity of each pixel is used. For example, if a positive data voltage is applied to one pixel electrode, a negative data voltage should be applied in the next frame. However, the liquid crystal transmittance at the positive data voltage and the liquid crystal transmittance at the negative data voltage are so large that there is a problem that the flicker phenomenon is severe.

An object of the present invention is to provide a liquid crystal display device capable of preventing the flicker phenomenon.

The technical problems of the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

According to an exemplary embodiment of the present invention, a liquid crystal panel in which first to fourth pixels are repeatedly arranged in basic units of a 2 × 2 pixel matrix, and polarities of the 2 × 2 pixel matrix may be used. And a timing controller providing a polarity signal such that the change is repeated every four frames.

According to another aspect of the present invention, there is provided a liquid crystal display device including: a liquid crystal panel in which first to fourth pixels are repeatedly arranged in basic units of a 2 × 2 pixel matrix; And a polarity signal generator for generating a gate and a data control signal for driving the liquid crystal panel, and generating a polarity signal for inverting the polarity signal of the data voltage with respect to the common voltage, and a polarity change of the 2 × 2 pixel matrix. A timing controller including a polarity signal converter for converting the polarity signal to be repeated for each frame; a driving voltage generator configured to receive the control signal and to generate a plurality of driving voltages; And a data driver for applying a data voltage to a data line of the liquid crystal panel.

In accordance with still another aspect of the present invention, there is provided a liquid crystal display device including: a first pixel matrix in which first to fourth pixels form a 2 × 2 matrix, and third, fourth, first and first pixels. A second pixel matrix in which two pixels form a 2 × 2 matrix, and the first and second pixel matrices each include a liquid crystal panel arranged in a column direction and change in polarity of the first and second pixel matrices every four frames. And a timing controller for providing a polarity signal to be repeated.

In accordance with still another aspect of the present invention, there is provided a liquid crystal display device including: a first pixel matrix in which first to fourth pixels form a 2 × 2 matrix, and third, fourth, first and first pixels. A second pixel matrix in which two pixels form a 2 × 2 matrix, wherein the first and second pixel matrices generate a liquid crystal panel arranged in a column direction, a gate for driving the liquid crystal panel, and a data control signal, A polarity signal generator for generating a polarity signal for inverting the polarity signal of the data voltage with respect to the common voltage, and a polarity signal converter for converting the polarity signal such that the polarity change of the first and second pixel matrices is repeated every four frames. A timing controller configured to receive the control signal and generate a plurality of driving voltages, and receive the driving voltages of the liquid crystal panel. To the data line of the gate driving unit and the liquid crystal panel to be applied to the teuseon a data driver for applying a data voltage.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be embodied in various forms, and the present embodiments are merely provided to make the disclosure of the present invention complete and the general knowledge in the art to which the present invention belongs. It is provided to fully inform the person having the scope of the invention, the invention is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention;

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, the liquid crystal display according to the exemplary embodiment of the present invention includes a liquid crystal panel 100, a driving voltage generator 200, a gate driver 300, a gamma voltage generator 400, and a data driver. 500, a timing controller 600.

The liquid crystal panel 100 is connected to a plurality of display signal lines G1-Gn and D1 -Dm as viewed in an equivalent circuit, and includes a plurality of unit pixels arranged in a matrix form.

Here, the display signal lines G1-Gn and D1-Dm include a plurality of gate lines G1-Gn transferring gate signals and data lines D1-Dm transferring data signals. The gate lines G1-Gn extend in the row direction and are substantially parallel to each other, and the data lines D1-Dm extend in the column direction and are substantially parallel to each other.

Each unit pixel includes a switching element Q connected to the display signal lines G1-Gn, D1-Dm, a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. The sustain capacitor Cst may be omitted as necessary.

The switching element Q is provided on the TFT substrate, and the control terminal and the input terminal thereof are connected to the gate lines G1-Gn and the data lines D1-Dm, respectively, and the output terminal is a liquid crystal capacitor. (Clc) and sustain capacitor (Cst).

The liquid crystal capacitor Clc has a pixel electrode of a TFT substrate and a common electrode of a color filter substrate as two terminals, and the liquid crystal layer between the two electrodes functions as a dielectric. The pixel electrode is connected to the switching element Q, and the common electrode is formed on the front surface of the color filter substrate and receives a common voltage Vcom. Here, the common electrode may be provided in the TFT substrate, in which case both electrodes are made in a linear or bar shape.

The sustain capacitor Cst is formed by superimposing a separate signal line (not shown) and a pixel electrode provided on the TFT substrate, and a predetermined voltage such as the common voltage Vcom is applied to the separate signal line (independent wiring method). However, the sustain capacitor Cst may be formed such that the pixel electrode overlaps the front end gate line directly above the insulator (shear gate method).

On the other hand, in order to implement color display, each unit pixel should be able to display color, which is possible by providing a red, green, or blue color filter in a region corresponding to the pixel electrode. Here, the color filter can be formed in the corresponding region of the color filter substrate, and can also be formed above or below the pixel electrode of the TFT substrate.

A polarizer (not shown) for polarizing light is attached to an outer surface of at least one of the TFT substrate and the color filter substrate of the liquid crystal panel 100.

The driving voltage generator 200 generates a plurality of driving voltages. For example, the driving voltage generator 200 generates a gate on voltage Von, a gate off voltage Voff, and a common voltage Vcom.

The gate driver 300 is connected to the gate lines G1-Gn of the liquid crystal panel 100 to receive a gate signal formed by a combination of a gate on voltage Von and a gate off voltage Voff from the outside. Applied to Gn).

The gamma voltage generator 400 may generate two sets of gamma voltages related to transmittance of a unit pixel. In other words, one of the two sets is the positive data voltage and the other is the negative data voltage. The positive data voltage and the negative data voltage mean voltages whose polarities of the data voltages are opposite to the common voltage Vcom, and are alternately provided to the liquid crystal panel during inversion driving.

The data driver 500 is connected to the data lines D1-Dm of the liquid crystal panel 100 and generates a plurality of data voltages based on the plurality of gamma voltages provided from the gamma voltage generator 400. The data voltage is selected and applied to the unit pixel as a data signal, and is usually composed of a plurality of integrated circuits.

The timing controller 600 generates control signals for controlling operations of the gate driver 300 and the data driver 500, and provides the corresponding control signals to the gate driver 300 and the data driver 500. Here, the timing controller 60 generates a polarity signal such that the polarity signal generator 610 for generating a polarity signal inverting the polarity of the data voltage with respect to the common voltage and the polarity change of the 2x2 pixel matrix are repeated every four frames. A polarity signal converter (not shown) for converting is further included. The description thereof will be described in detail with reference to FIG. 2.

Hereinafter, the display operation of the liquid crystal display will be described in more detail.

The timing controller 600 controls an RGB image signal R, G, and B and an input control signal, for example, a vertical sync signal Vsync and a horizontal sync signal, from an external graphic controller (not shown). Hsync, main clock MCLK, and data enable signal DE are provided. The timing controller 600 generates a gate control signal CONT1, a data control signal CONT2, and the like based on the input control signal, and appropriately matches the image signals R, G, and B with the operating conditions of the liquid crystal panel 100. After processing, the gate control signal CONT1 is provided to the gate driver 300, and the data control signal CONT2 and the processed image signals R ', G', and B 'are provided to the data driver 500.

Here, the gate control signal CONT1 includes a vertical synchronization start signal STV indicating the start of output of the gate on pulse (gate on voltage section), a gate clock signal CPV controlling the output timing of the gate on pulse, and a gate on. An output enable signal OE or the like that defines the width of the pulse. Among these, the output enable signal OE and the gate clock signal CPV are provided to the driving voltage generator 200.

The data control signal CONT2 is a horizontal synchronization start signal STH indicating the start of input of the image data R ', G', and B 'and a load signal for applying a corresponding data voltage to the data lines D1-Dm. TP), the polarity signal (POL) and the data clock signal (inverting the polarity of the data voltage with respect to the common voltage (VCOM) (hereinafter referred to as 'polarity of the data voltage by reducing the polarity of the data voltage for the common voltage') HCLK) and the like.

The data driver 500 sequentially receives image data R ′, G ′, and B ′ corresponding to one row of unit pixels according to the data control signal CONT2 from the timing controller 600. By selecting data voltages corresponding to the image data R ', G', and B ', the image data R', G ', and B' are converted into the corresponding data voltages.

The gate driver 300 applies a gate-on voltage Von to the gate lines G1-Gn in response to the gate control signal CONT1 from the timing controller 600, and is connected to the gate lines G1-Gn. Turn on (Q).

While a gate-on voltage Von is applied to one gate line G1-Gn, and a row of switching elements Q connected thereto is turned on (this period is '1H' or '1 horizontal period'). And the same as one period of the horizontal sync signal Hsync, the data enable signal DE, and the gate clock CPV], and the data driver 500 transmits each data voltage to the corresponding data line D1-Dm. Supply. The data voltage supplied to the data lines D1-Dm is applied to the corresponding unit pixel through the turned-on switching element Q.

The liquid crystal molecules change their arrangement according to the electric field generated by the pixel electrode and the common electrode, and thus the polarization of light passing through the liquid crystal layer changes. This change in polarization is represented by a change in transmittance of light by a polarizer (not shown) attached to the TFT substrate and the color filter substrate.

In this manner, the gate-on voltages Von are sequentially applied to all the gate lines G1 -Gn during one frame to apply data voltages to all the unit pixels. When one frame ends, the next frame starts and the state of the polarity signal POL applied to the data driver 500 is controlled so that the polarity of the data voltage applied to each unit pixel is opposite to that of the previous frame ('frame' reversal'). In this case, the polarity of the data voltage flowing through one data line may be changed ('line inversion') or the polarity of the data voltage applied to one pixel row may be different according to the characteristics of the polarity signal POL within one frame ( 'Dot reversal').

2 is an internal block diagram of a timing controller according to an embodiment of the present invention.

Referring to FIG. 2, the timing controller 600 according to an embodiment of the present invention includes a polarity signal generator 610 and a polarity signal converter 620.

The polarity signal generator 610 generates a polarity signal POL that inverts the polarity of the data voltage with respect to the common voltage VCOM. In this case, the polarity signal POL may be changed in units of vertical lines. The polarity of the data voltage applied to each pixel for each frame may be controlled using the feature of the polarity signal POL.

The polarity signal converter 620 receives a polarity signal POL generated by the polarity signal generator 610 and converts a polarity of a data voltage applied to each pixel for each frame based on the polarity signal POL. REV_FI). The frame inversion signal REV_FI generated by the polarity signal converter 610 in the timing controller 600 is applied to the data driver 500. Then, the data driver 500 converts the polarity of the data voltage applied to each pixel every four frames according to the frame inversion signal REV_FI and applies it to the data line.

Table 1 shows the polarities of the data voltages applied to the pixel matrixes of each frame according to an embodiment of the present invention. FIG. 3 is a pixel matrix applied to each frame according to an embodiment of the present invention. Each frame according to an embodiment of the present invention represents the polarity of the data voltage.

As shown in Table 1, in the present invention, a 2x2 matrix composed of four pixels A, B, C, and D is set as a basic unit, and the polarity change of the 2x2 matrix is repeated every four frames. A is positive (+), B is negative (-), C is negative (-) and D is positive (+) in one frame, A is positive (+) and B is negative in two frames (-) And C are set to positive polarity (+) and D to negative polarity (-). Also, in 3 frames, A is negative (-), B is positive (+), C is positive (+) and D is negative (-), and in 4 frames, A is negative (-). , B are positive (+), C is negative (-) and D is set to positive (+).

TABLE 1

Pixel 1 frame 2 frames 3 frames 4 frames A + + - - B - - + + C - + + - D + - - +

Here, in the case where the frame is changed, only two pixels of the four pixels change in polarity. For example, when changing from one frame to two frames, the polarities of the two pixels C and D change.

In addition, when the polarity of the pixel is changed from the previous frame to the current frame, the polarity does not change when the pixel is changed from the current frame to the next frame. For example, when changing from one frame to two frames, the polarities of the two pixels A and B are maintained and the polarities of the two pixels C and D are changed. The polarity of the two pixels C and D is maintained and the polarity of the two pixels A and B is changed.

3 and 4, the liquid crystal panel 100 according to the exemplary embodiment of the present invention may include a first pixel matrix 700 in which the first to fourth pixels 701 to 704 form a 2 × 2 matrix, The third, fourth, first and second pixels 803, 804, 801, and 802 include a second pixel matrix 800 in a 2 × 2 matrix, and the first and second pixel matrices 700, 800 ) Are arranged in the column direction. The first and second pixel matrices 700 and 800 are repeatedly arranged.

The polarities of the first to fourth pixels 701 to 704 of the first pixel matrix 700 and the first to fourth pixels 801 to 804 of the second pixel matrix 800 are defined as shown in Table 1 below. It consists of polarity (+), negative polarity (-), negative polarity (-) and positive polarity (+). In addition, the polarity of each pixel constituting the first pixel matrix 700 and the second pixel matrix 800 for each frame is represented by the polarity set in Table 1 below.

5 and 6 are waveform diagrams of a frame inverted polarity signal output through a polarity signal converter according to an exemplary embodiment of the present invention.

Referring to FIG. 5, the frame inversion polarity signal REV_FI1 is synchronized at the rising edge of the load signal TP, and the data driver 500 adjusts the polarity of the data voltage according to the frame inversion polarity signal REV_FI1. The liquid crystal panel 100 is applied to the liquid crystal panel 100. In this case, as shown in FIG. 4, the frame inversion polarity signal REV_FI1 represents the polarity of the data voltage of one row 910 in one frame, and the frame inversion polarity signal REV_FI1 represents one-dot inversion driving.

Referring to FIG. 6, the frame inversion polarity signals REV_FI1 and REV_FI2 represent polarities of data voltages of one row and two rows 910 and 920 in one frame as shown in FIG. 4, where the frame inversion polarity signal ( REV_FI1 and REV_FI2 indicate two-dot inversion driving.

7 is a diagram illustrating polarities of data voltages applied to a liquid crystal panel according to a frame inversion polarity signal according to an exemplary embodiment of the present invention. Here, for convenience of description, a data voltage is output to each of the six data lines to one data driver 510 and 520 to be applied to the liquid crystal panel, and the data lines and the four gate lines G1, G2, G3, and G4 are provided. It demonstrates taking the liquid crystal panel formed by crossing as an example.

Referring to FIG. 7, although not shown, the frame inversion polarity signal REV_FI is input to each of the data drivers 510 and 520. In one-dot inversion driving, a data voltage is applied to the data lines D11 and D17 connected to the first data driver 510 and the second data driver 520 according to the frame inversion polarity signal REV_FI as shown in FIG. 5. . That is, according to the frame inversion polarity signal REV_FI, the first pixel electrodes PX11 and PX17 connected to the data lines D11 and D17 are positive (+) and the second pixel electrodes PX21 and PX27 are negative (-). ), A data voltage of negative polarity (-) is applied to the third pixel electrodes PX31 and PX37 and positive polarity (+) is applied to the fourth pixel electrodes PX41 and PX47.

In the two-dot inversion driving, the data inverting polarity signals REV_FI1 and REV_FI2 are applied to the data lines D11, D12, D17, and D18 respectively connected to the first data driver 510 and the second data driver 520, as shown in FIG. 6. The data voltage is applied. That is, the first and second pixel electrodes PX11, PX12, PX17, and PX18 connected to the data lines D11, D12, D17, and 18 according to the frame inversion polarity signals REV_FI1 and REV_FI2 respectively have positive polarities. Positive and negative data voltages, and the first and second pixel electrodes PX21, PX22, PX27, and PX28 in two columns have negative and negative data voltages, and three data lines. The first and second pixel electrodes PX31, PX32, PX37, and PX38 have data voltages of negative and positive polarities, and first and second pixel electrodes PX41, PX42, PX47, and PX48 in four columns. The data voltages of positive (+) and negative (-) are respectively applied to.

As described above, in the present invention, a dot signal conversion unit is provided inside the timing controller to generate a frame inversion polarity signal REV_FI, thereby inverting the polarity of the data voltage applied to each pixel electrode every four frames. By performing the dot inversion driving, it is possible to prevent the flicker phenomenon caused by the difference in the liquid crystal transmittance between the positive data voltage and the negative data voltage.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, the embodiments described above are to be understood in all respects as illustrative and not restrictive.

According to the driving apparatus and the liquid crystal display including the same according to the present invention as described above, it is possible to prevent the flicker phenomenon caused by the difference in the liquid crystal transmittance in the positive data voltage and the negative data voltage.

Claims (12)

A liquid crystal panel in which the first to fourth pixels are repeatedly arranged in basic units of a 2 × 2 pixel matrix; And And a timing controller configured to provide a polarity signal such that the polarity change of the 2x2 pixel matrix is repeated every four frames. The method of claim 1, The first to fourth pixels of the liquid crystal display of which the polarity of only two pixels of the four pixels is changed when the frame is changed. The method of claim 2, The first to fourth pixels have a polarity that is changed when the first frame is changed from the previous frame to the current frame. The method of claim 3, wherein In the first frame, the first to fourth pixels are positive polarity, negative polarity, negative polarity, and positive polarity. In the second frame, the first to fourth pixels are positive, negative, positive, and negative polarities. In the third frame, the first to fourth pixels are negative, positive, positive, and negative. In the fourth frame, the first to fourth pixels have a negative polarity, a positive polarity, a negative polarity, and a positive polarity. The method of claim 1, The timing controller A polarity signal generator for generating a gate and a data control signal for driving the liquid crystal panel and generating a polarity signal for inverting a polarity signal of a data voltage with respect to a common voltage; And And a polarity signal converter to convert the polarity signal so that the polarity change of the 2x2 pixel matrix is repeated every four frames. A liquid crystal panel in which the first to fourth pixels are repeatedly arranged in basic units of a 2 × 2 pixel matrix; And A polarity signal generator for generating a gate and a data control signal for driving the liquid crystal panel and generating a polarity signal for inverting the polarity signal of the data voltage with respect to a common voltage and a polarity change of the 2x2 pixel matrix is 4 frames. A timing controller including a polarity signal converter for converting the polarity signal to be repeated every time; A driving voltage generator configured to receive the control signal and generate a plurality of driving voltages; A gate driver which receives the driving voltage and applies it to a gate line of the liquid crystal panel; And And a data driver for applying a data voltage to the data line of the liquid crystal panel. A first pixel matrix in which the first to fourth pixels form a 2x2 matrix, and a second pixel matrix in which the third, fourth, first, and second pixels form a 2x2 matrix. The second pixel matrix may include a liquid crystal panel arranged in a column direction; And And a timing controller configured to provide a polarity signal such that the polarity changes of the first and second pixel matrices are repeated every four frames. The method of claim 7, wherein The first to fourth pixels of the liquid crystal display of which the polarity of only two pixels of the four pixels is changed when the frame is changed. The method of claim 8, The first to fourth pixels have a polarity that is changed when the first frame is changed from the previous frame to the current frame. The method of claim 9, In the first frame, the first to fourth pixels are positive polarity, negative polarity, negative polarity, and positive polarity. In the second frame, the first to fourth pixels are positive, negative, positive, and negative polarities. In the third frame, the first to fourth pixels are negative, positive, positive, and negative. In the fourth frame, the first to fourth pixels have a negative polarity, a positive polarity, a negative polarity, and a positive polarity. The method of claim 7, wherein The timing controller A polarity signal generator for generating a gate and a data control signal for driving the liquid crystal panel and generating a polarity signal for inverting a polarity signal of a data voltage with respect to a common voltage; And And a polarity signal converter configured to convert the polarity signal so that the polarity change of the first and second pixel matrices is repeated every four frames. A first pixel matrix in which the first to fourth pixels form a 2x2 matrix, and a second pixel matrix in which the third, fourth, first, and second pixels form a 2x2 matrix. The second pixel matrix may include a liquid crystal panel arranged in a column direction; A polarity signal generator for generating a gate and a data control signal for driving the liquid crystal panel and generating a polarity signal for inverting the polarity signal of the data voltage with respect to a common voltage and a polarity change of the first and second pixel matrixes A timing controller including a polarity signal converter for converting the polarity signal to be repeated every four frames; A driving voltage generator configured to receive the control signal and generate a plurality of driving voltages; A gate driver which receives the driving voltage and applies it to a gate line of the liquid crystal panel; And And a data driver for applying a data voltage to the data line of the liquid crystal panel.

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