KR20070072064A - Lcd panel and fabricating method thereof - Google Patents

Abstract

A liquid crystal panel and a manufacturing method thereof are provided to minimize a contact terminal contacting a needle in a lighting test and a gray pattern test by forming a switching device at a pad area and providing a contact pad through the grouping of a plurality of lines. A pixel area(3) displays an image and a pad area includes a plurality of pads driving the pixel area. A plurality of first gate pad electrodes, a plurality of second gate pad electrodes(60), and a plurality of third gate pad electrodes(100) are provided in the pad area. A third enable terminal(110) is connected to the first and second gate pad electrodes and is connected to an enable terminal applying a gate signal and the third gate pad electrodes. A plurality of first source electrodes(40) are provided on the first and second gate pad electrodes, a source electrode includes a plurality of second source electrodes(70), and a plurality of third source electrodes(120) are provided at the third gate pad electrodes. A plurality of pad terminals are connected to the source electrode, and a third switching device makes the pad terminals into one group. A data check pad(150) is connected to the third source electrodes of the third switching device.

Description

Liquid crystal panel and its manufacturing method {LCD Panel and fabricating method

1 is a block diagram showing a process of forming a conventional liquid crystal module.

2 is a view schematically showing a conventional liquid crystal panel.

3 is an enlarged view of region A ′ of FIG. 2;

4 shows a cross-sectional view taken along line IV-IV ′ of FIG. 3.

5 is a plan view of a liquid crystal panel according to the present invention;

FIG. 6 is an enlarged view of region B of FIG. 5;

FIG. 7 is a cross-sectional view taken along line VII-VII ′ of FIG. 6.

8 is another embodiment of a liquid crystal panel according to the present invention.

9A to 9C are views illustrating a manufacturing process of a liquid crystal panel according to the present invention.

10A to 10C illustrate a method of inspecting a liquid crystal panel according to the present invention.

<Description of Signs of Major Parts of Drawings>

  1: liquid crystal panel 3: pixel area

  5: pad region 10: first gate pad electrode

 20: first enable terminal 40: first source electrode

 50: gate pad 60: second gate pad electrode

 70: second source electrode 80: second enable terminal

 90: data pad 100: third gate pad electrode

110: third enable terminal 120: third source electrode

150: data check pad 180: common terminal

190: common wiring 210: gate pad line

220: data pad line 230: insulating layer

250: semiconductor layer 300: contact terminal

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal panel, and more particularly, to a liquid crystal panel capable of shortening a plurality of contact pads in a pad region of a liquid crystal panel and providing a switching element to minimize the number of terminals in contact.

With the recent rapid development of the information society, the display device technology has become more important with the development of the information society as a medium of human-machine or machine-to-human dialogue.

In particular, due to the recent rapid advances in the computer and media industries, the demand for light and thin flat panel displays is increasing. Dual LCD displays have low voltage, low power drive, resolution, color display, image quality, and so on. It is actively applied.

1 is a block diagram illustrating a process of forming a conventional liquid crystal module.

As illustrated in FIG. 1, an upper substrate provided with a color filter for implementing color and a black matrix for preventing color mixing are provided.

A plurality of gate wirings and data wirings are provided, and a lower substrate is formed by forming a thin film transistor in an area where the gate wiring and the data wiring cross each other. (S100)

Here, the upper substrate and the lower substrate are bonded to each other, and a liquid crystal layer is formed by interposing the liquid crystal between the two substrates to form a liquid crystal panel (S200).

Then, the lighting test is performed on the liquid crystal panel to check whether the product is defective or defective. (S300)

By the way, the lighting test (S300) to check the operation of the device by applying an AC voltage, it is impossible to determine the failure of the entire liquid crystal panel. In fact, the liquid crystal display device does not display an image only by operation of the device, but the entire liquid crystal panel is organically displayed to display an image.

Therefore, a gray pattern test for inspecting gray scale characteristics by applying a DC voltage to the entire liquid crystal panel is performed. (S400)

The grayscale may be referred to as dividing the amount of light felt by the human vision in stages. Therefore, the grayscale acts as a factor in determining the image quality perceived by a person.

The DC voltage is applied to the liquid crystal panel because it is possible to reverse the polarity. As the polar inversion is performed, it is possible to observe unevenness of the liquid crystal panel, characteristics of the liquid crystal cell, and characteristics of the thin film transistor which are not seen in the lighting test. That is, the overall characteristics of the entire display screen can be measured at a glance.

After the inspection is completed, a backlight is provided in the liquid crystal panel to form a liquid crystal module. (S500)

2 is a view schematically showing a conventional liquid crystal panel.

As shown in FIG. 2, the liquid crystal panel 501 includes a pixel area 503 for displaying an image and a pad area 505 for applying a signal to the pixel area 503.

The pixel region 503 includes an upper substrate having a color filter for implementing colors and a black matrix for preventing color mixing.

A plurality of gate wirings and data wirings are provided, and a lower substrate having a thin film transistor is provided in an area where the gate wiring and the data wiring cross each other.

On the other hand, the upper substrate and the lower substrate is bonded to provide a liquid crystal layer through the liquid crystal between the two substrates.

In this case, the lower substrate is larger than the upper substrate, and a pad region 505 for driving the liquid crystal panel 501 is provided, and a plurality of pads are provided in the pad region 505.

Here, the pad is provided for the lighting test and the gray pattern test to check the operation of the pixel region 503.

However, the lighting test or the gray pattern test requires the number of needles of the lighting test apparatus to be equal to the pad quantity of the pad. In addition, in order to increase the resolution of the screen, the unit pixels become finer, and accordingly, the number of gate / data wirings is increasing.

As a result, the number of the needles increases, which makes it difficult to contact the pads and the needles, thereby minimizing the number of needles by changing the structure of the pad area 505, reducing the unit cost of the lighting inspection device, and making poor contact with the needles. There is an attempt to improve.

In order to solve the above problems, a thin film transistor TR of the pad region 505 was provided and a lighting test was performed.

3 is an enlarged view of region A ′ of FIG. 2, and FIG. 4 is a sectional view taken along line IV-IV ′ of FIG. 3.

As illustrated in FIG. 3, a plurality of gate pad electrodes 510e, 510o, 560R, 560G, and 560B are formed in the pad region 505 of the liquid crystal panel 501 to form a thin film transistor TR.

Here, the gate pad electrodes 510e, 510o, 560R, 560G, and 560B are connected to the first gate pad electrodes 510e and 510o and the data pad 590 to connect to the gate pad 550. Electrodes 560R, 560G, and 560B are provided.

The first gate pad electrodes 510e and 510o are provided with a gate enable terminal 520 for applying an input signal to the gate pad 550.

Here, the first gate pad electrodes 510e and 510o are provided by dividing the first gate pad electrodes 510e and 510o into even and odd numbers in order to inspect the short between the gate wirings.

The first gate pad electrodes 510e and 510o are provided at both ends of the pad region 505 because the spaces are narrow so that it is difficult to form a wiring when the concentration is concentrated in a predetermined region.

The second gate pad electrode 560R, 560G, and 560B is provided with a data enable terminal 580 for applying an input signal to the data pad 590.

In this case, the second gate pad electrodes 560R, 560G, and 560B are divided into a plurality of data wires by examining a short between the data wires and considering the congestion of the wires.

As described above, gate pad electrodes 510e, 510o, 560R, 560G, and 560B are provided, and an insulating layer 730 is formed on the gate pad electrodes 510e, 510o, 560R, 560G, and 560B.

Here, the semiconductor layer 750 serving as a channel is provided on the insulating layer 730. The semiconductor layer 750 is provided in each region where a thin film transistor is to be formed.

U-shaped source electrodes 540 and 570 are provided on the semiconductor layer 750. The source electrodes 540e, 540o, 570R, 570G, and 570B may include the first source electrodes 540e and 540o and the second gate pad electrodes 560R and 560G, which are provided on the first gate pad electrodes 510e and 510o. First source electrodes 570R, 570G, and 570B provided on 560B.

Here, the first source electrodes 540e and 540o are connected to each other to provide gate pad terminals 550e and 550o. The gate pad terminals 550e and 550o respectively provide a gate even terminal 550e and a gate odd terminal 550o.

The second source terminals 570R, 570G, and 570B are similarly connected to each other to provide data pad terminals 590R, 590G, and 590B. The data pad terminals 590R, 590G, and 590B provide data R pad terminals 590R, data G pad terminals 590G, and data B pad terminals 590B, respectively.

Here, a thin film transistor is provided between the gate pad terminals 550e and 550o and the data pad terminals 590R, 590G, and 590B to be connected to each other.

The pad region 505 of the liquid crystal panel 501 is provided with a gate pad line 710 and a data pad line 720 extending from the gate line and the data line, respectively.

A common terminal 680 connected to the common wiring 690 provided on the front surface of the liquid crystal panel 501 is provided in the pad region 505.

As such, by forming a thin film transistor in the pad region 505, the number of terminals in contact for the lighting test and the gray pattern test can be reduced. As shown in FIG. 3, a contact terminal 800 contacting the needle is provided by applying a material having high electrical conductivity including silver to the contact pad V checked by V. FIG.

As shown in FIG. 4, the first gate pad electrodes 510e and 510o and the second gate pad electrodes 560R, 560G and 560B connected to the gate pad line 710 and the data pad line 720 are padded. The semiconductor layer 750 and the source electrode 540 on the gate pad electrodes 510e, 510o, 560R, 560G, and 560B are provided in the region 505 to minimize the number of contact terminals 800 in contact with the needle. 570 is formed to form a thin film transistor TR.

As described above, the thin film transistor TR is formed in the pad region 505 to reduce the number of terminals in contact for the lighting test and the gray pattern test.

In addition, the contact pad v is coated with a material having high electrical conductivity including silver to provide a contact terminal 800 and to contact the needle with the contact terminal 800.

However, in order to contact the needle with the contact terminal 800, a hole is provided in the contact pad v and silver is applied to the hole. The operation of applying the silver to the contact pad v is performed manually. Because of poor workability.

Therefore, the silver for applying the contact terminal 800 to the contact pad (v) is applied to the contact terminal 800 if there are many contact terminals 800 to be applied because the silver is applied by hand. There is a problem in that the loss of work time to apply silver and manpower loss occurs because it is a coating work performed by human hands.

An object of the present invention is to provide a liquid crystal panel and a manufacturing method which can simplify the defect inspection by minimizing the contact terminal between the contact terminal and the needle in order to analyze the defect of the liquid crystal panel.

According to an aspect of the present invention, there is provided a liquid crystal panel including: a pad area including a pixel area displaying an image and a plurality of pads driving the pixel area; A plurality of first gate pad electrodes, a plurality of second gate pad electrodes, and a third gate pad electrode provided in the pad area; An enable terminal connected to the first and second gate pad electrodes and configured to apply a gate signal, and a third enable terminal connected to the third gate pad electrode; A source electrode provided on the first and second gate pad electrodes, the source electrode including a plurality of first source electrodes and a plurality of second source electrodes, and a plurality of third source electrodes provided on the third gate pad electrode; A third switching device which connects the plurality of pad terminals and the pad terminals to be connected to the source electrode; And a data check pad connected to the third source electrode of the third switching device.

In order to achieve the above object, a liquid crystal panel manufacturing method according to the present invention comprises the steps of forming a pad area having a pixel area for displaying an image and a plurality of pads for driving the pixel area; First and second gate pad electrodes and a third gate pad electrode are formed in the pad area, and are connected to the first and second gate pad electrodes and are connected to an enable terminal for applying a gate signal and the third gate pad electrode. Forming a third enable terminal; Source electrodes provided on the first and second gate pad electrodes and a plurality of pad terminals connected to the source electrodes, and the pad terminals are connected to each other by connecting a plurality of third source electrodes provided on the third gate pad electrodes. Forming a third switching element and forming a data check pad.

In order to achieve the above object, a liquid crystal panel inspection method according to the present invention includes the steps of forming a pad area having a pixel area for displaying an image and a plurality of pads for driving the pixel area; First and second gate pad electrodes and a third gate pad electrode are formed in the pad area, an enable terminal connected to the gate pad electrode and applying a gate signal, and a third enable connected to the third gate pad electrode Forming a terminal; Source electrodes provided on the first and second gate pad electrodes and a plurality of pad terminals connected to the source electrodes, and the pad terminals are connected to each other by connecting a plurality of third source electrodes provided on the third gate pad electrodes. Forming a third switching element and forming a data check pad; Forming a through hole in the data check pad and a third enable terminal; Forming a contact terminal in the through hole; And driving the pixel region by bringing a needle into contact with the contact terminal.

Hereinafter, exemplary embodiments of a liquid crystal panel and a method of manufacturing the same according to the present invention will be described with reference to the accompanying drawings.

5 is a plan view of a liquid crystal panel according to the present invention.

As shown in FIG. 5, the liquid crystal panel 1 includes a pixel region 3 for displaying an image and a pad region 5 for applying a signal to the pixel region 3.

The pixel region 3 is provided with an upper substrate provided with a color filter for implementing color and a black matrix for preventing color mixing.

A plurality of gate wirings and data wirings are provided, and a lower substrate having switching elements is provided in an area where the gate wirings and the data wirings intersect.

Meanwhile, the upper substrate and the lower substrate are bonded to each other to form a liquid crystal layer through the liquid crystal between the two substrates.

In this case, the lower substrate is larger than the upper substrate, and a pad region 5 for driving the liquid crystal panel 1 is provided, and a plurality of pads are provided in the pad region 5.

Here, the pad also includes a pad provided for a lighting test for inspecting the operation of the pixel region 3 and a gray pattern test.

However, the lighting test or the gray pattern test requires the number of needles of the lighting test apparatus to be equal to the pad quantity of the pad. In addition, in order to increase the resolution of the screen, the unit pixels become finer, and accordingly, the number of gate / data wirings is increasing.

As a result, the number of the needles is large, which makes it difficult to contact the pads and the needles. Thus, the structure of the pad area 505 is changed to minimize the number of needle contacts, reduce the unit cost of the lighting inspection device, and contact the needles. Attempts have been made to improve the defect.

6 is an enlarged view of region B of FIG. 5, and FIG. 7 is a cross-sectional view taken along line VII-VII ′ of FIG. 6.

As shown in FIG. 6, the switching element S is provided in the pad region 5 of the liquid crystal panel 1 to reduce the number of contacts of the needle.

In the pad region 5, a plurality of gate pad electrodes 10e, 10o, 60R, 60G, and 60B and a third gate pad electrode 100 are formed to form a switching device S.

The gate pad electrodes 10e, 10o, 60R, 60G, and 60B may include the first gate pad electrodes 10e and 10o connected to the gate pad 50 and the second gate pad electrodes 60R connected to the data pad 90. 60G, 60B).

Further, a third gate pad electrode 100 may be further provided to integrate the data pad 90 later.

The first gate pad electrodes 10e and 10o are provided with a first enable terminal 20 for applying an input signal to the gate pad 50.

Here, the first gate pad electrodes 10e and 10o are provided by dividing the first gate pad electrodes 10e and 10o into even and odd numbers in order to inspect the short between the gate wirings. When the first gate pad electrodes 10e and 10o are concentrated in a predetermined area, it is difficult to form a plurality of wires due to the narrow space, and thus, the first gate pad electrodes 10e and 10o are provided at both ends of the pad area 5, respectively.

Meanwhile, a second enable terminal 80 for applying an input signal to the data pad 90 is provided in the second gate pad electrodes 60R, 60G, and 60B.

The second gate pad electrodes 60R, 60G, and 60B divide the data wirings into a plurality of data wirings in consideration of short circuits between the data wirings and considering congestion of the wirings.

A third enable terminal 110 connected to the third gate pad electrode 100 is provided, and the third enable terminal 100 includes a first enable terminal 20 and a second enable terminal 80. ).

As described above, the gate pad electrodes 10e, 10o, 60R, 60G, 60B and the third gate pad electrode 100 are provided in the pad region 5, and the gate pad electrodes 10e, 10o, 60R, 60G, 60B are provided. And an insulating layer 230 are formed on the third gate pad electrode 100.

The semiconductor layer 250 serving as a channel is provided on the insulating layer 230 on which the gate pad electrodes 10e, 10o, 60R, 60G, and 60B and the third gate pad electrode 100 are provided. The semiconductor layer 250 is provided to correspond to the gate / data pad lines 210 and 220, respectively.

U-shaped source electrodes 40, 70, and 120 are provided on the semiconductor layer 250. The source electrodes 40, 70, and 120 may be disposed on the first source electrodes 40e and 40o and the second gate pad electrodes 60R, 60G, and 60B provided on the first gate pad electrodes 10e and 10o. Second source electrodes 70R, 70G, and 70B are provided.

The third source electrode 120 is further provided to bind the second source electrodes 70R, 70G, and 70B together.

The first source electrodes 40e and 40o may be connected to each other to provide a gate pad 50. The gate pad 50 is provided with a gate even terminal 50e and a gate od terminal 50o, respectively.

The second source electrodes 70R, 70G, and 70B are similarly connected to each other to provide a data pad terminal 90. The data pad terminal 90 is provided with a data R pad terminal 90R, a data G pad terminal 90G, and a data B pad terminal 90B, respectively.

The data pad terminal 90 is connected to the third source electrode 120 provided on the third gate pad electrode 100 to provide a data check pad 150 that is bundled together.

As such, the first switching element GS having the first source electrodes 40e and 40o and the second switching element DS and the third source electrode 120 having the second source electrodes 70R, 70G, and 70B are formed. This provided third switching element 3S is formed.

In this case, a switching element is provided between the gate pad terminals 50e and 50o and the data check pad 150 to be connected to each other.

The pad region 5 of the liquid crystal panel 1 is provided with a gate pad line 210 and a data pad line 220 extending from the gate line and the data line in the pixel area 3, respectively.

Here, the common terminal 180 connected to the common wiring 190 provided on the front of the liquid crystal panel 1 is further formed.

The passivation film 260 is provided on the entire liquid crystal panel 1 to protect the plurality of switching elements GS, DS, and 3S formed on the liquid crystal panel 1.

As described above, when the plurality of switching elements S are formed in the pad region 5 and the lighting test and the gray pattern test are performed, the contact terminal V is connected to the third enable terminal 110 and the data check pad 150. ), The common terminal 180 can be inspected by contacting the three terminals.

Therefore, the number of terminals in contact for lighting inspection and gray pattern inspection can be reduced. Here, as shown in FIG. 6, a contact terminal 300 contacting the needle is provided by applying a material having high electrical conductivity including silver to the contact pad V checked by V. FIG.

As shown in FIG. 7, the first gate pad electrodes 10e and 10o and the second gate pad electrodes 60R, 60G and 60B connected to the gate pad line 210 and the data pad line 220 are padded. The semiconductor layer 250 and the source electrode on the gate pad electrodes 10e, 10o, 60R, 60G, 60B, and 100 are provided in the region 5 to minimize the number of contact terminals 300 contacting the needles. 40 and 60 are provided to form the switching element S.

As described above, when the switching element S is formed in the pad region 5 and the defect inspection is performed, the defect inspection can be performed by reducing the number of the contact terminals 300 to three terminals.

That is, the number of terminals in contact for the lighting test and the gray pattern test can be reduced. In addition, a contact terminal 300 may be prepared by applying a material having high electrical conductivity to the contact pad V, and contacting the needle with the contact terminal 300.

The contact pads V provided with the three contact terminals 300 are the third enable terminal 110, the data check pad 150, and the common terminal 180. In this case, the contact terminals 300 are formed on the contact pads V by using silver or the like on the contact pads V, and the number of the contact terminals 300 is reduced to form the contact terminals 300. There is an effect that can save time and manpower.

8 is another embodiment of a liquid crystal panel according to the present invention.

As illustrated in FIG. 8, the gate pad 50 further includes a gate integrated electrode 10J integrating the gate pad terminals 50e and 50o into one.

6 and 7, an insulating layer 230 and a semiconductor layer 250 are provided on the gate integrated electrode 10J, and an integrated source terminal 40J is formed on the semiconductor layer 250. It is prepared and connected to the gate pad terminals 50e and 50o.

The third enable terminal 110, the third gate pad electrode 100, and the data check pad 150 are formed to reduce the number of contacts of the data pad terminal 90.

As described above, the switching device GS2 is formed on the gate integration electrode 10J to bundle the gate pad terminals 50e and 50o, thereby facilitating the connection with the third enable terminal 110.

9A to 9C are views illustrating a manufacturing process of the liquid crystal panel according to the present invention.

As shown in FIG. 9A, the liquid crystal panel 1 includes the first gate pad electrode 10 and the second gate pad electrode 10 of the pad region 5 when the gate wiring of the pixel region 3 is formed of a gate metal. 60 and the third gate pad electrode 100 are formed.

The first enable terminal 20, the second enable terminal 80, and the third enable terminal 110 connected to the first, second, and third gate pad terminals 10, 60, and 100 are photolithography. Pattern by technique.

The first enable terminal 20, the second enable terminal 80, and the third enable terminal 110 are connected to each other by forming a wiring with a gate metal.

Then, an insulating layer (230 of FIG. 7) is formed on the pattern formed of the gate metal, and a semiconductor layer (250 of FIG. 7) is formed in a region where a switching element S to be formed later is formed.

As shown in FIG. 9B, the gate pad line 210, the data pad line 220, the first source electrode 40 and the first metal may be formed of a data metal in the pad region 5 where the semiconductor layer 250 is formed. The second source electrode 70, the gate pad 50, and the data pad 90 are formed.

Here, a third source electrode 120 is further formed on the third gate pad electrode 100, and a data check pad 150 connected to the third source electrode 120 is formed.

As such, the first switching element GS having the first source electrodes 40e and 40o and the second switching element DS and the third source electrode 120 having the second source electrodes 70R, 70G, and 70B are formed. This provided third switching element 3S is formed.

The first source electrode 40 and the second source electrode 70 are connected on the gate pad electrodes 10 and 60, respectively, and the gate pad terminals 50e and 50o and the data pad terminals 90R, 90G, and 90B are connected to each other. ) Was connected to form a switching element.

As shown in FIG. 9C, a pattern is formed of the data metal, and a common wiring 190 is formed to form a common terminal 180 connected to the common wiring 190. The common wiring 190 and the common terminal 180 may be formed of ITO, IZO, or the like, which are conductive materials.

Here, a pattern is formed through the data metal, ITO, and the like, and a passivation film 260 for protecting the plurality of switching elements S is coated.

As such, by providing the third gate pad electrode 100, the data pad terminals 90 may be bundled together through the third switching device 3S.

Therefore, when the signal is applied to the data check pad 150, the third enable terminal 110, and the common terminal 180 denoted by V, the liquid crystal panel 1 can be operated.

10A to 10C illustrate a method of inspecting a liquid crystal panel according to the present invention.

Here, the liquid crystal panel 1 is a liquid crystal panel 1 manufactured by referring to FIGS. 9A to 9C.

As shown in FIG. 10A, since the data check pad 150 and the third enable terminal are covered by the insulating layer 230 or the passivation layer 260, the insulating layer 230 and the passivation 260 may be removed. The contact hole 310 is formed in the data check pad 150, the third enable terminal 110, and the common terminal 180 to be removed.

As shown in FIG. 10B, the contact terminal 300 is formed by applying a metal material having a contact force such as silver and a high electrical conductivity to the contact hole 310.

As shown in FIG. 10C, a signal is applied by contacting the needle 350 to the common terminal 180, the third enable terminal 110, and the data check pad 150.

When a signal is applied to the third enable terminal 110, a channel is formed in the plurality of switching elements S, and a signal applied to the data check pad 150 is applied to the pixel region 3 of the liquid crystal panel 1. Is delivered).

As such, the signal transmitted to the pixel region 3 turns on the liquid crystal panel 1, thereby inspecting wiring characteristics such as pixel defects and liquid crystal cell characteristics.

Therefore, the switching element S is formed in the pad region 5 of the liquid crystal panel 1 to bundle a plurality of wires to provide the minimum contact pads 110, 150, and 180 so that the lighting test of the liquid crystal panel 1 is performed. When performing the pattern inspection it is possible to minimize the contact terminal 300 in contact with the needle 350 to reduce the work time and manpower loss for forming the contact terminal 300.

In the above, the present invention has been described with reference to the embodiment shown in the drawings and the liquid crystal panel and its manufacturing method, but this is only an example, those skilled in the art that various modifications and equivalents therefrom It will be appreciated that other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

In the liquid crystal panel according to the present invention, a switching element is formed in the pad area to bundle a plurality of wires to provide a minimum contact pad, thereby minimizing the contact terminals to be in contact with the needle when the lighting test and the gray pattern test of the liquid crystal panel are performed. There is an effect to reduce the work time and manpower loss to form a terminal.

In addition, the inspection method according to the present invention has the effect of reducing the outflow of the defect to improve the production yield.

Claims (16)

A pad area including a pixel area displaying an image and a plurality of pads driving the pixel area; A plurality of first gate pad electrodes, a plurality of second gate pad electrodes, and a third gate pad electrode provided in the pad area; An enable terminal connected to the first and second gate pad electrodes and configured to apply a gate signal, and a third enable terminal connected to the third gate pad electrode; A source electrode provided on the first and second gate pad electrodes, the source electrode including a plurality of first source electrodes and a plurality of second source electrodes, and a plurality of third source electrodes provided on the third gate pad electrode; A third switching device which connects the plurality of pad terminals and the pad terminals to be connected to the source electrode; And a data check pad connected to the third source electrode of the third switching device. The method of claim 1, An insulating layer is provided on the first and second gate pad electrodes and the third gate pad electrode, and further includes a semiconductor layer on the insulating layer. The method of claim 1, And a common terminal provided in the pad region and a common terminal connected to the common wiring. The method of claim 1, And the enable terminal includes a first enable terminal and a second enable terminal and is connected to the first enable terminal and the second enable terminal to the third enable terminal. The method of claim 1, And a passivation film for protecting the third switching element. Forming a pad area including a pixel area displaying an image and a plurality of pads driving the pixel area; First and second gate pad electrodes and a third gate pad electrode are formed in the pad area, and are connected to the first and second gate pad electrodes and are connected to an enable terminal for applying a gate signal and the third gate pad electrode. Forming a third enable terminal; Source electrodes provided on the first and second gate pad electrodes and a plurality of pad terminals connected to the source electrodes, and the pad terminals are connected to each other by connecting a plurality of third source electrodes provided on the third gate pad electrodes. Forming a third switching element and forming a data check pad. The method of claim 6, The source electrode is disposed on the first and second gate pad electrodes, and includes a plurality of first source electrodes and a plurality of second source electrodes. The method of claim 6, The insulating layer is provided on the first and second gate pad electrodes and the third gate pad electrode, and further comprising forming a semiconductor layer on the insulating layer. The method of claim 6, And a passivation layer formed on the data check pad, the common wiring and the common terminal, and a passivation film formed on the data check pad, the common wiring and the common terminal. The method of claim 6, Wherein the enable terminal includes a first enable terminal and a second enable terminal, and the first enable terminal and the second enable terminal are connected to the third enable terminal. . Forming a pad area including a pixel area displaying an image and a plurality of pads driving the pixel area; First and second gate pad electrodes and a third gate pad electrode are formed in the pad area, and are connected to the first and second gate pad electrodes and are connected to an enable terminal for applying a gate signal and the third gate pad electrode. Forming a third enable terminal; Source electrodes provided on the first and second gate pad electrodes and a plurality of pad terminals connected to the source electrodes, and the pad terminals are connected to each other by connecting a plurality of third source electrodes provided on the third gate pad electrodes. Forming a third switching element and forming a data check pad; Forming a through hole in the data check pad and a third enable terminal; Forming a contact terminal in the through hole; And driving the pixel region by bringing a needle into contact with the contact terminal. The method of claim 11, The insulating layer is provided on the first and second gate pad electrodes and the third gate pad electrode, and a semiconductor layer is formed on the insulating layer. The method of claim 11, And forming a common wiring and a common terminal after forming the data check pad and forming a passivation film. The method of claim 11, And the enable terminal has a first enable terminal and a second enable terminal and is connected to the third enable terminal. The method of claim 13, And a through hole in the common terminal to contact the needle. The method of claim 12, And a direct current voltage is applied to the contact terminal through the needle.

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