KR20070000707A - Method for forming capacitor of semiconductor device - Google Patents

Abstract

A method for forming a capacitor in a semiconductor device is provided to secure desired capacitance and leakage current characteristic by using a ZrO2/HfO2 dielectric layer including a ZrO2 thin film having large band gap energy and a dielectric constant and an HfO2 thin film having prominent interfacial affinity. A semiconductor substrate(1) having a storage node contact(4) is provided. A metal storage electrode(10) is connected with the storage node contact. An HfO2 thin film(12) is deposited on the metal storage electrode. A ZrO2 thin film(14) is deposited on the HfO2 thin film to form a dielectric layer(20) with a double layer of the HfO2 thin film and the ZrO2 thin film. A metal plate electrode(30) is formed on the dielectric layer.

Description

Method for forming capacitor of semiconductor device

1A to 1C are cross-sectional views illustrating processes for forming a capacitor of a semiconductor device according to the present invention.

2 is a view for explaining a capacitor dielectric film according to the present invention.

3 is a view for explaining the deposition process of the HfO2 thin film and ZrO2 thin film when forming a dielectric film according to the present invention.

Explanation of symbols on the main parts of the drawings

1 semiconductor substrate 2 interlayer insulating film

3: contact hole 4: storage node contact

10: storage electrode 12: HfO2 thin film

14: ZrO2 thin film 20: dielectric film

30 plate electrode 40 capacitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a capacitor of a semiconductor device, and more particularly, to a method for forming a capacitor of a semiconductor device capable of securing leakage current characteristics while securing a desired charging capacity.

Recently, as the integration of memory products is accelerated due to the development of semiconductor manufacturing technology, the unit cell area is greatly reduced, and the operating voltage is reduced. As a result, problems arise such that the refresh time of the device is shortened and soft errors occur. In order to prevent such a problem, a capacitor having a high charging capacity of 25 fF / cell and a low leakage current is used. Development is constantly required.

As is well known, the charge capacity of a capacitor is proportional to the electrode surface area and the dielectric constant of the dielectric, and inversely proportional to the dielectric film thickness corresponding to the distance between electrodes, more precisely, the equivalent SiO2 thickness (Tox) of the dielectric film. Therefore, in order to implement a capacitor having a large charge capacity required in a high density device, it is necessary to use a dielectric film having a high dielectric constant and lowering the equivalent oxide film thickness.

NO (Nitride-Oxide) capacitors using Si3N4 (ε = 7) thin film as a dielectric film have revealed a limitation in securing charge capacity due to high integration, and dielectric constant higher than Si3N4 (ε = 7) to secure sufficient charge capacity. Capacitors having a SIS (Polisilicon-Insulator-Polisilicon) structure in which Ta 2 O 5 (ε = 25), Al 2 O 3 (ε = 9), and HfO 2 (ε = 20) having a single dielectric are applied.

However, the Ta2O5 (ε = 25) film is not only susceptible to leakage current, but also has a problem in that the thickness of the equivalent oxide film cannot be lowered to 30 dB or less due to the oxide film generated during heat treatment. In addition, the Al2O3 (ε = 9) film does not differ from the Si3N4 (ε = 7) film, and thus there is a limit to securing a high charge capacity, and the HfO2 (ε = 20) film reduces the equivalent oxide thickness to 15 Å or less. There is a problem in that the durability of the capacitor is lowered because the leakage current increases and the breakdown voltage strength is greatly reduced, which is vulnerable to repetitive electric shock.

Meanwhile, polysilicon, which has been used as an electrode material in a SIS (Polisilicon-Insulator-Polisilicon) type capacitor, also has a limitation in securing high electrical conductivity required for highly integrated devices. It was intended to be used as an electrode material.

Accordingly, as a new capacitor that can be applied to a highly integrated DRAM process having a fine metal wiring of 100 nm or less, conventional capacitors employing a metal electrode and a double or triple dielectric film instead of a polysilicon electrode and a single dielectric film have been developed. For example, a metal-insulator-polioliicon (MIS) capacitor employing a double dielectric such as metal based electrode (TiN) and HfO2 / Al2O3, or a triple dielectric such as metal based electrode (TiN) and HfO2 / Al2O3 / HfO2. One MIM (Metal-Insulator-Metal) capacitor has been developed. By employing the metal electrode and the multiple dielectric film as described above, to improve the bonding characteristics between the dielectric film and the electrode and to reduce the thickness of the equivalent oxide film to implement a capacitor capable of ensuring a high charge capacity.

However, in the case of the conventional MIS or MIM structure capacitor, it is difficult to apply to the device having a metal wiring of 70nm or less. This is because multiple dielectric films of HfO2 / Al2O3 and HfO2 / Al2O3 / HfO2 of the MIS or MIM capacitor have an equivalent oxide thickness limit of about 11 Å, which makes it difficult to obtain a charge capacity of 25 fF / cell or more in a DRAM to which a metal wiring of 70 nm or less is applied. .

Recently, development of MIM capacitors having Ru / Ta2O5 / Ru or Ru / HfO2 / Ru structures using Ru metal as an electrode material has been developed, but in these cases, when the thickness of the equivalent oxide film is lowered to 11 Å or less, high leakage Because current is generated, it is difficult to apply to next-generation DRAM of 512M class or more having metal wiring of 70nm or less.

Accordingly, the present invention has been made to solve the above-mentioned problems, the MIM type of semiconductor device that can also secure the leakage current characteristics while ensuring the charge capacity required in the next generation DRAM products having a metal wiring of 70nm or less It is an object to provide a method of forming a capacitor.

In order to achieve the above object, the present invention comprises the steps of providing a semiconductor substrate formed with a storage node contact; Forming a metal storage electrode connected to the storage node contact; Depositing an HfO 2 thin film on the metal storage electrode; Depositing a ZrO2 thin film on the HfO2 thin film to form a dielectric film composed of a double film of an HfO2 thin film and a ZrO2 thin film; and forming a metal plate electrode on the dielectric film consisting of a double film of the HfO2 thin film and the ZrO2 thin film; It provides a method for forming a capacitor of a semiconductor device comprising.

Here, the storage electrode and the plate electrode is formed of any one metal-based material selected from the group consisting of TiN, Ru, TaN, W, WN, RuO2, Ir, IrO2 and Pt.

After forming the storage electrode, and before depositing the HfO2 thin film, N2, H2, N2 / H2, O2, O3 so as to densify the storage electrode and remove residual impurities in the electrode, which causes an increase in leakage current. Or low temperature annealing at 200 to 800 ° C. in an NH 3 atmosphere. In this case, the low temperature annealing is performed by any one method selected from the group consisting of a plasma, an electric furnace and a rapid thermal process (RTP).

Here, the low temperature annealing using the plasma, using a plasma having an RF power of 100 ~ 500W, in the 200 ~ 500 ℃ temperature range and 0.1 ~ 10torr pressure range, while flowing the selected gas by 5sccm ~ 5slm 1-5 Proceed for minutes.

Meanwhile, the low temperature annealing using the electric furnace is performed while flowing the selected gas at a temperature of 600 to 800 ° C. by 5 sccm to 5 slm, and the low temperature annealing using RTP is an atmospheric pressure having a temperature range of 500 to 800 ° C. (700 to 760 torr). Or in the reduced pressure (1 to 100 torr) chamber while flowing the selected gas by 5 sccm to 5 slm.

The HfO 2 thin film is deposited to a thickness of 5 to 50 GPa, and the ZrO 2 thin film is deposited to a thickness of 10 to 50 GPa.

The HfO2 thin film and the ZrO2 thin film are deposited at a temperature of 200 to 500 ° C. according to ALD (Atomic Layer Deposition: ALD) or PE-ALD (Plasma Enhanced Atomic Layer Deposition: PE-ALD) method.

The deposition of the HfO2 thin film using C16H36HfO4 as the source gas of Hf, or any one selected from the group consisting of other organometallic compounds containing Hf (TDEAHf, TEMAHf, etc.), the reaction gas O3, O2 and H2O vapor Use any one selected from the group consisting of At this time, the source gas of Hf flows 50-500 sccm, and the reaction gas flows 0.1-1 slm. On the other hand, the concentration of O3 in the reaction gas is 200 ± 20 g / m3.

The deposition of the ZrO2 thin film uses Zr [N (CH3) C2H5] 4 as the source gas of Zr, or any one selected from the group consisting of other organometallic compounds containing Zr, and as a reaction gas, O3, O2, Any one selected from the group consisting of plasma O 2, N 2 O, plasma N 2 O and H 2 O vapor is used. At this time, the reaction gas flows 0.1 to 1 slm, and the concentration of O 3 in the reaction gas is set to 200 ± 20 g / m 3.

According to the ALD or PE-ALD method, before the step of depositing the HfO2 thin film and the ZrO2 thin film, or before the step of depositing the ZrO2 thin film and forming the plate electrode, roughness of the dielectric film surface while removing carbon impurities and grains in the dielectric film Low temperature annealing is performed at 200 to 800 ° C. in an N 2, H 2, N 2 / H 2, O 2, O 3, or NH 3 atmosphere to reduce roughness and ultimately improve leakage current and breakdown voltage characteristics of the dielectric film.

In this case, the low temperature annealing is performed in any one method selected from the group consisting of plasma, electric furnace, and RTP method, under the same conditions as the low temperature annealing condition of the storage electrode.

After forming the plate electrode and before proceeding to the subsequent process, Al 2 O 3, HfO 2, Ta 2 O 5, ZrO 2 and TiO 2 and A protective film made of the same oxide film or a metal material such as TiN is formed to a thickness of 50 to 200 Å by the ALD method.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The present invention provides a charge capacity of 25 fF / cell or more, a leakage current of 0.5 fF / cell or less, and a breakdown voltage characteristic of 2.0 V (@ 1 pA / cell) or more required for a 70 nm or less DRAM capacitor. A MIM capacitor employing a double dielectric film in which an HfO2 thin film and a ZrO2 thin film is laminated is constructed.

In this case, the ZrO2 (Eg = 7.8eV, ε = 25) thin film is a material having a band gap energy (Eg) value larger than that of the conventional Ta2O5 (Eg = 4.5eV, ε = 25) dielectric film, and HfO2 (Eg = 5.7eV, ε = 20) As the thin film is a material with good interfacial affinity with a metal such as TiN or Ru, the double dielectric film of HfO2 / ZrO2 can improve the suppression of the leakage current generation of the capacitor. have. Thereby, the thickness of the equivalent oxide film of HfO2 / ZrO2 can be reduced to 11 kPa or less. Therefore, the MIM capacitor of the present invention employing a double dielectric film of HfO2 / ZrO2 can obtain a large-capacity charging capacity of 25 fF / cell or more even in a 70 nm or less DRAM having a small cell size.

As a result, the capacitor of the present invention employing the double dielectric film of HfO2 / ZrO2 can secure the applicable leakage current and breakdown voltage characteristics while securing the charging capacity required for the next generation DRAM products having a metal wiring of 70 nm or less. .

1A to 1C are cross-sectional views illustrating processes of forming a capacitor of a semiconductor device according to the present invention.

Referring to FIG. 1A, an interlayer insulating layer 2 is formed on an entire surface of a semiconductor substrate 1 on which lower patterns (not shown) including transistors and bit lines are formed. Thereafter, the interlayer insulating layer 2 is etched to form a contact hole 3 exposing a substrate bonding region or a landing plug poly (LPP), and then a conductive layer is embedded in the contact hole 3 to form a storage node contact ( 4) form. Subsequently, the storage electrode 10 is formed on the interlayer insulating layer 2 including the storage node contact 4 to be connected to the storage node contact 4.

Here, the storage electrode 10 is formed of any one metal material selected from the group consisting of TiN, Ru, TaN, W, WN, RuO 2, Ir, IrO 2, and Pt, and is formed to have a thickness of 200 to 500 Å. In addition, the storage electrode 10 may be formed of a concave structure or a simple plate structure in addition to the cylindrical structure as shown.

After the storage electrode 10 is formed, the storage electrode 10 may be densified and 200 to 200 in an N2, H2, N2 / H2, O2, O3, or NH3 atmosphere to remove residual impurities in the electrode, which causes an increase in leakage current. Cold annealing at 800 ° C. is performed.

In this case, the low temperature annealing is performed by any one method selected from the group consisting of plasma, electric furnace and RTP method. When annealing using a plasma, a plasma having an RF power of 100 to 500 W is used for 1 to 5 minutes while flowing a selected gas by 5 sccm to 5 slm at a temperature range of 200 to 500 ° C. and a pressure range of 0.1 to 10 torr using a plasma having a power of 100 to 500 W. do. On the other hand, when annealing using an electric furnace, a gas selected at 600 to 800 ° C is flowed by 5 sccm to 5 slm, and when annealing using RTP, an atmospheric pressure having a temperature range of 500 to 800 ° C (700 to 760torr) is used. Or in a reduced pressure (1 to 100 torr) chamber while flowing the selected gas by 5 sccm to 5 slm.

Referring to FIG. 1B, a HfO2 thin film 12 is deposited on the storage electrode 10, and then a ZrO2 thin film 14 is deposited on the HfO2 thin film 12 to deposit an HfO2 thin film 12 and a ZrO2 thin film. A dielectric film 20 composed of the double film 14 is formed.

Here, the HfO2 thin film 12 and the ZrO2 thin film 14 maintain a high charging capacity, lower the leakage current characteristic of the dielectric film to 0.5fF / cell or lower, and breakdown voltage characteristic of 2.0V (@ 1pA / cell) or higher. According to the ALD or PE-ALD method, the HfO2 thin film 12 is deposited to a thickness of 5 to 50 GPa and the ZrO2 thin film 14 is deposited to a thickness of 10 to 50 GPa at a temperature of 200 to 500 ° C. See Figure 2)

3 is a view for explaining the deposition process of the HfO2 thin film 12 and the ZrO2 thin film 14 according to the ALD or PE-ALD process, as shown in the deposition of the HfO2 thin film 12 and ZrO2 thin film 14 The deposition cycle in which " source gas flow, purge, reaction gas flow, purge " is sequentially carried out in such a manner that a thin film of a desired thickness is repeatedly performed until a thin film of a desired thickness is obtained.

At this time, the deposition of the HfO2 thin film using any one selected from the group consisting of C16H36HfO4 as the source gas of Hf or other organometallic compounds (TDEAHf, TEMAHf, etc.) containing Hf, the reaction gas O3, O2 and Use any one selected from the group consisting of H2O steam. At this time, the source gas of Hf flows 50-500 sccm, and the reaction gas flows 0.1-1 slm. On the other hand, the concentration of O3 in the reaction gas is 200 ± 20 g / m3.

On the other hand, the deposition of the ZrO2 thin film using Zr [N (CH3) C2H5] 4 as the source gas of Zr or any one selected from the group consisting of other organometallic compounds containing Zr as a precursor, and as a reaction gas Any one selected from the group consisting of O 3, O 2, plasma O 2, N 2 O, plasma N 2 O and H 2 O vapor is used. At this time, the reaction gas flows from 0.1 to 1 slm, and the concentration of O 3 in the reaction gas is set to 200 ± 20 g / m 3.

In addition, before depositing the HfO2 thin film and depositing the ZrO2 thin film according to the ALD or PE-ALD method, or before depositing the ZrO2 thin film and forming the plate electrode, the dielectric film surface is removed while removing carbon impurities and grains in the dielectric film. The low temperature annealing is performed at 200 to 800 ° C. in an N 2, H 2, N 2 / H 2, O 2, O 3, or NH 3 atmosphere to alleviate roughness of the dielectric film and ultimately improve leakage current and breakdown voltage characteristics of the dielectric film.

In this case, the low temperature annealing is performed by any one method selected from the group consisting of plasma, electric furnace and RTP method. The annealing of the plasma, the electric furnace and the RTP method is performed under the same conditions as the low temperature annealing condition of the storage electrode.

Referring to FIG. 1C, a plate electrode 30 made of a metal material such as TiN, TaN, W, WN, Ru, RuO 2, Ir, IrO 2, and Pt is formed on the dielectric film 20 of HfO 2 / ZrO 2, and Through this, the formation of the MIM capacitor 40 according to the present invention employing the dielectric film 20 having the double film structure of HfO 2 / ZrO 2 is completed.

Here, after the plate electrode 30 is formed, a protective film for securing structural stability of the capacitor 40 from hydrogen component, moisture, temperature, or electric shock in an environmental test in a subsequent integration process or a package process. For example, an oxide film such as Al 2 O 3, HfO 2, Ta 2 O 5, ZrO 2 and TiO 2 or a protective film made of a metal material such as TiN is preferably deposited to have a thickness of 50 to 200 μm by ALD.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

As described above, the present invention adopts a ZrO2 / HfO2 dielectric film composed of a double layer of a HfO2 thin film having excellent interfacial affinity with a metal and a ZrO2 thin film having a large band gap energy and dielectric constant as a dielectric film of a MIM type capacitor. As a result, an equivalent oxide film thickness (11 kΩ or less) and leakage current characteristics (0.5 fA / cell or less) can be obtained, compared to conventional MIM capacitors employing Ta2O5, HfO2, ZrO2, and the like as a single dielectric film. Breakdown voltage characteristics of 1 pA / cell) can be obtained. Therefore, the MIM capacitor of the present invention can obtain sufficient charge capacity of 25 fF / cell or more required for a high density memory product of 70 nm or less.

In addition, the present invention forms a double dielectric film in which a ZrO 2 film having a high dielectric constant and excellent heat resistance is laminated on an HfO 2 film, thereby solving the thermal stability problem and the leakage current generation problem of the HfO 2 film simultaneously. You can improve performance at the same time.

As a result, the MIM capacitor of the present invention can satisfy the charge capacity, leakage current, and breakdown voltage characteristics required for 70 nm or less highly integrated memory products, and remove the temperature constraints of subsequent processes requiring high temperatures. As a result, it can be easily applied as a capacitor of ULSI (Ultra Large Scale Integration) family.

Claims (15)

Providing a semiconductor substrate on which storage node contacts are formed; Forming a metal storage electrode connected to the storage node contact; Depositing an HfO 2 thin film on the metal storage electrode; Depositing a ZrO2 thin film on the HfO2 thin film to form a dielectric film including a double layer of an HfO2 thin film and a ZrO2 thin film; And And forming a metal plate electrode on the dielectric film formed of a double layer of the HfO2 thin film and the ZrO2 thin film. The method of claim 1, And the storage electrode and the plate electrode are formed of any one metal material selected from the group consisting of TiN, Ru, TaN, W, WN, RuO 2, Ir, IrO 2, and Pt. The method of claim 1, After forming the storage electrode and before depositing the HfO2 thin film, any one of the substrate products on which the storage electrode is formed is selected from the group consisting of N2, H2, N2 / H2, O2, O3, and NH3. Capacitor forming method of a semiconductor device further comprising the step of annealing at low temperature in a gas atmosphere. The method of claim 1, Wherein the HfO2 thin film is deposited to a thickness of 5 to 50 GPa, and the ZrO2 thin film is deposited to a thickness of 10 to 50 GPa. The method of claim 4, wherein The HfO2 thin film and ZrO2 thin film is a capacitor forming method of a semiconductor device, characterized in that the deposition at a temperature of 200 ~ 500 ℃ according to the ALD or PE-ALD method. The method of claim 5, The deposition of the HfO2 thin film using C16H36HfO4 as the source gas of Hf or any one selected from the group consisting of Hf-containing other organometallic compounds (TDEAHf, TEMAHf, etc.), and the reaction gas O3 (concentration: 200 ± 20g / m3), and any one selected from the group consisting of O2 and H2O vapor is used. The method of claim 6, The source gas of Hf flows 50-500 sccm, The capacitor formation method of the semiconductor element characterized by the above-mentioned. The method of claim 5, The deposition of the ZrO2 thin film uses Zr [N (CH3) C2H5] 4 as the source gas of Zr or any one selected from the group consisting of other organometallic compounds containing Zr, and O3 (concentration: 200 ± 20 g / m3), O2, plasma O2, N2O, plasma N2O and H2O vapor is a capacitor forming method of a semiconductor device, characterized in that any one selected from the group consisting of. The method of claim 6 or 8, And the reaction gas flows from 0.1 to 1 slm. The method of claim 5, According to the ALD or PE-ALD method, before depositing a HfO2 thin film and depositing a ZrO2 thin film, or before depositing a ZrO2 thin film and forming a plate electrode, the resultant substrate on which the dielectric film is deposited is N2, H2, N2. / H2, O2, O3 and NH3, the method of forming a capacitor, characterized in that it further comprises a low temperature annealing in a gas atmosphere selected from the group consisting of. The method according to claim 3 and 10, The low temperature annealing is performed by any one method selected from the group consisting of a plasma, an electric furnace and an RTP method. The method of claim 11, Low temperature annealing using the plasma, using a plasma having an RF power of 100 ~ 500W, in the 200 ~ 500 ℃ temperature range and 0.1 ~ 10torr pressure range, the selected gas flows by 5sccm ~ 5slm for 1-5 minutes A method of forming a capacitor of a semiconductor device, characterized in that. The method of claim 11, The low temperature annealing using the electric furnace is performed while flowing a gas selected at a temperature of 600 to 800 ° C. by 5 sccm to 5 slm. The method of claim 11, The low temperature annealing using the RTP is performed while flowing a selected gas in an atmospheric pressure (700 to 760 torr) or a reduced pressure (1 to 100 torr) chamber having a temperature range of 500 to 800 ° C by 5 sccm to 5 slm. Capacitor Formation Method. The method of claim 1, After forming the plate electrode and before proceeding to the subsequent process, any one of an oxide film or TiN selected from the group consisting of Al 2 O 3, HfO 2, Ta 2 O 5, ZrO 2 and TiO 2 is formed on the substrate product on which the plate electrode is formed. A method of forming a capacitor of a semiconductor device, characterized by further comprising the step of forming a protective film made of a metal film to a thickness of 50 ~ 200∼ by ALD method.

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