KR100680952B1 - Method for forming capacitor of semiconductor device - Google Patents

Abstract

The present invention discloses a method for forming a capacitor of a semiconductor device capable of securing leakage current characteristics while securing a desired charging capacity. A method of forming a capacitor of a semiconductor device according to the present invention includes: forming a storage electrode on a semiconductor substrate; Forming a dielectric layer on the storage electrode, the dielectric layer including a double layer of an HfO2 thin film and a La2O3 thin film; And forming a plate electrode on the dielectric film formed of a double layer of the HfO2 thin film and the La2O3 thin film.

Description

Method for forming capacitor of semiconductor device

1A to 1C are cross-sectional views illustrating a capacitor formation process according to the present invention.

2 is a view for explaining the deposition process of the HfO2 thin film and La2O3 thin film when forming a dielectric film according to the present invention.

Explanation of symbols on the main parts of the drawings

1 semiconductor substrate 2 interlayer insulating film

3: storage node contact 10: storage electrode

12: HfO2 thin film 14: La2O3 thin film

20 dielectric film 30 plate electrode

40: capacitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a capacitor of a semiconductor device, and more particularly, to a method for forming a capacitor of a semiconductor device capable of securing leakage current characteristics while securing a desired charging capacity.

Recently, as the integration of memory products is accelerated due to the development of semiconductor manufacturing technology, the unit cell area is greatly reduced, and the operating voltage is reduced. However, the charging capacity required for the operation of the memory device, despite the reduction in the cell area, a sufficient capacity of 25 fF / cell or more is continuously required to prevent the occurrence of soft errors and shortening of the refresh tine. have.

Therefore, in the case of a DRAM (Nitride-Oxide) capacitor using a Si3N4 film (ε = 4) deposited using a Di-Chloro-Silane (DCS) gas as a dielectric film, the electrode surface of a hemispherical structure having a large surface area is used. The three-dimensional storage electrode has been adopted, and its height is continuously increased to ensure sufficient capacity.

On the other hand, in recent years, the NO capacitor has shown its limitation in securing the charge capacity required for next generation DRAM products of 256M or more. Accordingly, in order to secure sufficient charge capacity, as a dielectric film, a capacitor adopting a high dielectric material such as a Ta2O5 film (ε = 25), an Al2O3 film (ε = 9), and an HfO2 film (ε = 20 to 25) in a single dielectric film structure is developed. This is actively going on.

However, the Ta2O5 film has a high dielectric constant but has a problem of weak current leakage, and the Al2O3 film is limited in securing charge capacity because the dielectric constant is not very different from that of the Si3N4 film, and the HfO2 film has a low breakdown field strength. Not only is it vulnerable, but it also increases the leakage current near the operating voltage (approximately 1.0 ± 0.2V) and increases the leakage current due to the high temperature thermal process of 500 ℃ or higher after thin film deposition. There is a problem that causes a drop.

Also, as is well known, the charge capacity is inversely proportional to the distance between the electrodes and is proportional to the electrode area and the dielectric constant of the dielectric film, the dielectric film thickness corresponding to the distance between the electrodes, more precisely, the equivalent oxide film thickness of the dielectric film (Tox: equivalent). It is necessary to reduce the SiO2 thickness). For example, next-generation DRAM products with more than 256M require an equivalent oxide thickness of 30Å or less to secure sufficient charge capacity.

However, since the NO capacitor employing the Si3N4 film uses the Si3N4 film having a low dielectric constant as the dielectric film, the equivalent oxide film thickness can no longer be lowered to 40 kW or less, and the Ta2O5 capacitor employing the Ta2O5 film is manufactured in the heat treatment process after the deposition of the Ta2O5 film. Due to the low dielectric oxide film (SiO 2) generated by the oxidation of the storage electrode, the equivalent oxide film thickness cannot actually be lowered to 30 kPa or less. Therefore, it is difficult to improve the charging capacity by reducing the dielectric film thickness at present.

As a result, the Si3N4 film, Ta2O5 film, Al2O3 film and HfO2 film can each be applied as a dielectric film that can secure leakage current characteristics while securing the charge capacity required for next-generation DRAM products of 256M or more. Difficult

Accordingly, the present invention has been made to solve the above-described problems, and provides a method of forming a capacitor of a semiconductor device capable of securing leakage current characteristics while also ensuring the charging capacity required for next generation DRAM products of 256M or more. There is a purpose.

Capacitor forming method of a semiconductor device according to the present invention for achieving the above object is a doped polysilicon, or TiN, TaN, W, WN, WSi, Ru, RuO2, Ir, IrO2 and Pt on a semiconductor substrate Forming a storage electrode from any one metal selected from the group consisting of: When the storage electrode is formed of polysilicon, annealing in an NH 3 atmosphere to nitride the surface of the storage electrode; Forming a dielectric layer on the storage electrode, the dielectric layer including a double layer of an HfO2 thin film and a La2O3 thin film; And forming a plate electrode on the dielectric film formed of a double layer of the HfO2 thin film and the La2O3 thin film.

Here, the storage electrode is formed to a thickness of 200 ~ 500∼.

When the storage electrode is formed of the dopant polysilicon, a cleaning process is performed using HF solution or NH 4 + HF mixture diluted with water to remove the natural oxide layer after the formation, and the HF solution diluted with water or After the cleaning process is performed using the NH 4 + HF mixture, washing with NH 4 OH mixture (NH 4 OH + H 2 O 2 + H 2 O) or H 2 SO 4 mixture (H 2 SO 4 + H 2 O 2) is performed to remove foreign substances.

In addition, the annealing is performed by plasma (RF power: 100 to 500 W) annealing for 1 to 5 minutes in a chamber in a NH 3 (25 to 250 sccm) gas atmosphere at a temperature of 200 to 500 ° C. and a pressure range of 0.1 to 10 Torr. Or annealing at 600 to 800 ° C. and NH 3 (25 to 250 sccm) atmosphere in a normal pressure of 700 to 760 Torr or a reduced pressure rapid thermal process (RTP) chamber at 1 to 100 Torr, or at the same atmosphere and at 600 to 800 ° C. Proceed to annealing in the furnace.

The HfO 2 and La 2 O 3 thin films are deposited to have a thickness of 5 to 30 kPa and 10 to 50 kPa, respectively, in a temperature range of 200 to 500 ° C. according to ALD or pulsed CVD process.

The deposition of the HfO2 thin film is carried out using C16H36HfO4 as the source gas of Hf or using an organometallic compound containing Hf as a precursor, using any one of O3, O2 and H2O as the reaction gas, and source gas of the Hf. Flows 50-500 sccm, and the reaction gas flows 0.1-1 slm.

The deposition of the La2O3 thin film uses La (CH3) 3 as a source gas of La or using an organometallic compound containing La (C2H5) and La as a precursor and using any one of O3, O2 and H2O as a reaction gas. The source gas of La flows 50-500 sccm, and the reaction gas flows 0.1-1 slm.

The plate electrode is formed of a metal material of any one of doped polysilicon, or any one of TiN, TaN, W, WN, WSi, Ru, RuO2, Ir, IrO2 and Pt, and when forming the metal electrode A silicon nitride film or a polysilicon film is formed thereon as a protective film or a buffer film at a thickness of 200 to 1000 mW.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The present invention employs a dual dielectric layer in which heterogeneous dielectric layers are stacked on a metal-based storage electrode such as TiN in order to reduce the thickness of the equivalent oxide film, which is the electrical thickness of the capacitor, to obtain a large-capacity charge capacity of 30 fF / cell or more. That is, the present invention forms the HfO2 thin film as the first dielectric film in order to control the breakdown voltage and leakage current of the capacitor to be at most 2.0V (@ 1 pA / cell), which can be applied in mass production, to 0.5fF / cell or less. After that, a La2O3 (CBO = 2.3 eV, ε = 30) thin film having a relatively high dielectric band offset (hereinafter referred to as CBO) and having a relatively high dielectric constant is formed thereon as a second dielectric film. The capacitor structure constitutes a capacitor dielectric film.

In this case, the capacitor of the present invention employing a double dielectric film of HfO2 / La2O3 can obtain sufficient charge capacity in connection with both the HfO2 thin film and the La2O3 thin film, and the thermal stability of the La2O3 thin film having excellent heat resistance is particularly excellent. Overcoming the weakness of the HfO2 thin film, which has a slight suppression of excessive leakage current generation, the breakdown voltage characteristics and leakage current characteristics can be obtained without problems of reliability even when the equivalent oxide film thickness is controlled to 15Å or less.

In addition, as the La2O3 thin film is adopted, the heat resistance of the dielectric film is improved compared to when only the HfO2 thin film is employed, and thus the product defects due to the deterioration of electrical properties that may occur in the high temperature heat treatment process after the formation of the capacitor are suppressed, and thus the present invention has an effect of increasing productivity. Expected incidentally.

In detail, Figures 1a to 1c is a cross-sectional view for explaining a capacitor forming method according to the present invention, as follows.

Referring to FIG. 1A, an interlayer thin film 2 is formed on an entire surface of a semiconductor substrate 1 on which predetermined lower patterns (not shown) including a transistor and a bit line are formed. Then, the interlayer insulating layer 2 is etched to form a contact hole exposing the substrate bonding region or the landing plug poly, and then a conductive film is embedded in the contact hole to form a contact plug, that is, a storage node contact 3. do. Subsequently, doped poly-Si or metal-based materials such as TiN, TaN, W, WN, WSi, Ru, RuO 2, Ir, IrO 2, and Pt may be formed on the interlayer insulating layer 2 to a thickness of 200 to 500 μm. After deposition, it is patterned to form a storage electrode 10 that is connected to the storage node contact 3.

Here, the storage electrode 10 is formed as a cylinder (cylinder) structure, as shown, but may be formed as a concave structure as well as a simple plate (plate) structure. In addition, when the storage electrode 10 is made of doped polysilicon, hemispherical grains (HSG) may be formed on the surface of the storage electrode 10 to secure a larger charging capacity.

Referring to FIG. 1B, Atomic Layer Deposition (ALD) or Pulsed Chemical Vapor Deposition (hereinafter referred to as ALD) on the interlayer insulating layer 2 including the storage electrode 10 is referred to as Pulsed CVD. According to the process, the HfO2 thin film 12 having a thickness of 5 to 30 과 and the La2O3 thin film 14 having a thickness of 10 to 50 Å are sequentially deposited in a temperature range of 200 to 500 ° C., respectively, of the HfO2 thin film 12 and the La2O3 thin film 14. A dielectric film 20 consisting of a double film is formed.

2 is a view for explaining the deposition process of the HfO2 thin film and La2O3 thin film according to the ALD or pulsed CVD process, as shown, the deposition of the HfO2 thin film and La2O3 thin film "source gas flow, purge, reaction gas flow, The deposition cycle in which "purge" proceeds in sequence is repeated until the desired thickness is obtained.

Here, when depositing the HfO2 thin film, the source gas of Hf uses C16H36HfO4 or other organometallic compounds containing Hf, for example, TDEAHf, TEMAHf, etc., as a precursor, and O3 or O2 having a concentration of 200 ± 20 g / ㎥ Use gas or use H2O. At this time, the Hf source gas flows about 50 to 500 sccm, and the reaction gas O3, O2 or H2O gas flows about 0.1 to 1 slm.

In the deposition of La2O3 thin film, La (CH3) 3 is used as the source gas of La, or other organometallic compounds containing La (C2H5) and La are used as precursors, and the reaction gas is O3 having a concentration of 200 ± 20 g / m3. Or O2 gas or H2O. Similarly, the La source gas flows about 50 to 500 sccm, and the reaction gas O3, O2 or H2O gas flows about 0.1 to 1 slm.

Meanwhile, when the doped polysilicon film is applied as the storage electrode 10 material, the surface of the storage electrode 10, that is, the surface of the polysilicon electrode is annealed by annealing in an NH 3 atmosphere before deposition of the HfO 2 thin film 12. It is preferable to form a diffusion barrier of SiNx on the surface of the polysilicon electrode. Here, the annealing is performed by plasma (RF power: 100 to 500 W) annealing for 1 to 5 minutes in a chamber in a NH 3 (25 to 250 sccm) gas atmosphere at a temperature of 200 to 500 ° C. and a pressure range of 0.1 to 10 Torr. do. In addition, the annealing may proceed to annealing at 600 to 800 ° C. and NH 3 (25 to 250 sccm) atmosphere in an atmospheric pressure of 700 to 760 Torr or a reduced pressure rapid thermal process (RTP) chamber at 1 to 100 Torr, or in the same atmosphere and 600 Proceeding to an annealing in the furnace at ˜800 ° C.

In addition, before performing annealing in the NH 3 atmosphere, by using a mixture of HF or NH 4 F + HF diluted with water (H 2 O) for hydrogen termination (hydrogen terminate) while removing the natural oxide film on the surface of the polysilicon electrode If the cleaning is performed and if it is necessary to remove the inorganic or organic particles and other foreign substances on the polysilicon electrode, after the HF cleaning, NH4OH mixed solution (NH4OH + H2O2 + H20) or H2SO4 mixed solution (H2SO4 + H2O2) is used. Further washing is performed.

Referring to FIG. 1C, a doped polysilicon or TiN, TaN, W, WN, WSi, Ru, RuO2, Ir, IrO2, Pt, or the like may be formed on a dielectric film 20 including a double layer of an HfO2 thin film 12 and a La2O3 thin film. The plate electrode 30 made of the same metal-based material is formed, and as a result, the formation of the capacitor 40 to which the double dielectric film of HfO 2 / La 2 O 3 according to the present invention is applied is completed.

Here, in the case of using a metal-based material as the plate electrode 30 material, in order to ensure structural stability from humidity, temperature, or electric shock, a silicon nitride film (SiN) having a thickness of 200 to 1000 kPa as a kind of buffer film or protective film thereon. ) Or poly-silicon film (poly-Si).

As described above, according to the present invention, by laminating a La2O3 thin film having excellent heat resistance on the HfO2 thin film to form a dielectric film in a double film structure, it is possible to secure the charging capacity required for DRAM products of 100 nm or less. Breakdown voltage characteristics and leakage current characteristics can be controlled at levels above 2.0V (@ 1pA / cell) and below 0.5fF / cell, which can be mass-produced, respectively, thereby improving the durability and electrical performance of the capacitor.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the following claims are not limited to the scope of the present invention without departing from the spirit and scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

Claims (16)

Forming a storage electrode from a doped polysilicon or any one metal selected from the group consisting of TiN, TaN, W, WN, WSi, Ru, RuO 2, Ir, IrO 2 and Pt on a semiconductor substrate; When the storage electrode is formed of polysilicon, annealing in an NH 3 atmosphere to nitride the surface of the storage electrode; Forming a dielectric layer on the storage electrode, the dielectric layer including a double layer of an HfO2 thin film and a La2O3 thin film; And And forming a plate electrode on the dielectric film formed of the double layer of the HfO2 thin film and the La2O3 thin film. The HfO2 thin film and La2O3 thin film are deposited by an ALD or pulsed CVD process. The deposition of the HfO2 thin film is performed using C16H36HfO4 as a source gas of Hf or using an organometallic compound containing Hf as a precursor and using any one selected from the group consisting of O3, O2 and H2O as a reaction gas. The deposition of the La2O3 thin film is selected from the group consisting of La (CH3) 3 as a source gas of La or using an organometallic compound containing La (C2H5) and La as a precursor and O3, O2 and H2O as reaction gases. Capacitor forming method of a semiconductor device, characterized in that performed using any one. 2. The method of claim 1, wherein the storage electrode is formed to a thickness of 200 to 500 GPa. The method of claim 1, wherein when the storage electrode is formed of the doped polysilicon, a cleaning process is performed after the formation of the storage electrode. The method of claim 3, wherein the cleaning process is performed using HF solution or NH 4 + HF mixture diluted with water to remove the native oxide film. The method of claim 3, wherein after washing with the HF solution or NH4 + HF mixture diluted with water, washing with NH4OH mixture (NH4OH + H2O2 + H2O) or H2SO4 mixture (H2SO4 + H2O2) is further performed to remove foreign substances. A method of forming a capacitor of a semiconductor device, characterized in that. delete The method of claim 1, wherein the annealing is performed by plasma (RF power: 100 to 500 W) for 1 to 5 minutes in a chamber in a NH 3 (25 to 250 sccm) gas atmosphere at a temperature of 200 to 500 ° C. and a pressure range of 0.1 to 10 Torr. ) Process for forming a capacitor of a semiconductor device, characterized in that to proceed to annealing. The method of claim 1, wherein the annealing is performed by annealing at 600 to 800 DEG C and NH3 (25 to 250 sccm) atmosphere in an atmospheric pressure of 700 to 760 Torr or a reduced pressure rapid thermal process (RTP) chamber of 1 to 100 Torr. A process for forming a capacitor of a semiconductor device, characterized by advancing in an atmosphere and an electric furnace at 600 to 800 ° C. delete 10. The method of claim 1 or 9, wherein the HfO2 film is deposited to a thickness of 5 to 30 GPa, and the La2O3 thin film is deposited to a thickness of 10 to 50 GPa. delete 12. The method of claim 11, wherein the source gas of Hf flows 50 to 500 sccm, and the reaction gas flows 0.1 to 1 slm. delete The method of claim 13, wherein the source gas of La flows 50 to 500 sccm, and the reaction gas flows 0.1 to 1 slm. The method of claim 1, wherein the plate electrode is formed of doped polysilicon or any one metal-based material selected from the group consisting of TiN, TaN, W, WN, WSi, Ru, RuO 2, Ir, IrO 2, and Pt. A method for forming a capacitor of a semiconductor device, characterized in that. The method of forming a capacitor of a semiconductor device according to claim 15, wherein when the plate electrode is formed of a metallic material, a silicon nitride film or a polysilicon film is formed thereon as a protective film or a buffer film with a thickness of 200 to 1000 GPa.

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