KR100772100B1 - Method for forming capacitor of semiconductor device - Google Patents

Abstract

The present invention discloses a method for forming a capacitor of a semiconductor device capable of improving leakage current and breakdown voltage characteristics while ensuring sufficient charge capacity. A method of forming a capacitor of a semiconductor device according to the present invention includes the steps of forming a metal storage electrode on a semiconductor substrate, forming a Ta _1-X Hf _X O dielectric layer on the storage electrode, and the Ta _1-X Forming a metal plate electrode on the Hf _X O dielectric layer.

Description

Method for forming capacitor of semiconductor device

1A to 1C are cross-sectional views illustrating processes for forming a capacitor of a semiconductor device according to the present invention.

2 is a view for explaining a Ta _1-X Hf _X O dielectric film deposition process according to the present invention.

Explanation of symbols on the main parts of the drawings

1 semiconductor substrate 2 interlayer insulating film

3: contact hole 4: storage node contact

10: storage electrode 20: Ta _1-X Hf _X O dielectric film

30 plate electrode 40 capacitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a capacitor of a semiconductor device, and more particularly, to a method for forming a capacitor of a semiconductor device capable of securing leakage current characteristics while securing a desired charging capacity.

Recently, as the integration of memory products is accelerated due to the development of semiconductor manufacturing technology, the unit cell area is greatly reduced, and the operating voltage is reduced. As a result, problems such as a short refresh time of the device and a soft error occur, and in order to prevent such a problem, a high charging capacity of 25 fF / cell or more and a low leakage current are generated. The development of capacitors is constantly required.

As is well known, the charge capacity of a capacitor is proportional to the electrode surface area and the dielectric constant of the dielectric, and inversely proportional to the dielectric film thickness corresponding to the distance between electrodes, more precisely, the equivalent SiO2 thickness (Tox) of the dielectric film. Therefore, in order to implement a capacitor having a large charge capacity required in a high density device, it is necessary to use a dielectric film having a high dielectric constant and lowering the equivalent oxide film thickness.

NO (Nitride-Oxide) capacitors using Si3N4 (ε = 7) thin film as a dielectric film have revealed a limitation in securing charge capacity due to high integration, and dielectric constant higher than Si3N4 (ε = 7) to secure sufficient charge capacity. Capacitor of SIS (Polisilicon-Insulator-Polisilicon) structure with Ta2O5 (ε = 25), Al2O3 (ε = 9), La2O3 (ε = 30) and HfO2 (ε = 20) with single dielectric have.

However, the Ta2O5 (ε = 25) film is not only susceptible to leakage current but also has a problem in that the thickness of the equivalent oxide film cannot be lowered to 30 dB or less due to the oxide film generated during heat treatment. In addition, the Al2O3 (ε = 9) film has a limit in securing a high charge capacity because the dielectric constant does not differ from the Si3N4 (ε = 7) film. In addition, the La2O3 and HfO2 films are advantageous in terms of securing charge capacity because the dielectric constants are about 30 and 20, respectively. Since it is fragile, there is a problem of lowering the durability of the capacitor. In particular, the HfO 2 film has a lower crystallization temperature than Al 2 O 3, so that a leakage current increases rapidly during the subsequent high temperature heat treatment of 600 ° C. or higher.

Meanwhile, polysilicon, which has been used as an electrode material in a SIS (Polisilicon-Insulator-Polisilicon) type capacitor, also has a limitation in securing high electrical conductivity required for highly integrated devices. It was intended to be used as an electrode material.

Accordingly, as a new capacitor that can be applied to a highly integrated DRAM process having a fine metal wiring of 100 nm or less, conventional capacitors employing a metal electrode and a double or triple dielectric film instead of a polysilicon electrode and a single dielectric film have been developed. For example, a metal-insulator-polioliicon (MIS) capacitor employing a double dielectric such as metal based electrode (TiN) and HfO2 / Al2O3, or a triple dielectric such as metal based electrode (TiN) and HfO2 / Al2O3 / HfO2. One MIM (Metal-Insulator-Metal) capacitor has been developed.

However, in the case of the conventional MIS or MIM structure capacitor, it is difficult to apply to the device having a metal wiring of 70nm or less. The reason is that the multi-layer dielectric films of HfO2 / Al2O3 and HfO2 / Al2O3 / HfO2 of the MIS or MIM capacitor have an equivalent oxide thickness limit of about 11 Å, making it difficult to obtain a charge capacity of 25 fF / cell or more in a DRAM to which a metal wiring of 70 nm or less is applied. Because.

Recently, development of MIM capacitors having Ru / Ta2O5 / Ru or Ru / HfO2 / Ru structures using Ru metal as an electrode material has been developed, but in these cases, when the thickness of the equivalent oxide film is lowered to 11 Å or less, high leakage Because current is generated, it is difficult to apply to next-generation DRAM of 512M class or more having metal wiring of 70nm or less. This is due to the leakage current limit and the durability deterioration problem, thermal instability problem and the like of the Ta2O5 film and the HfO2 film as described above.

Accordingly, the present invention has been made to solve the above-mentioned conventional problems, the formation of a capacitor of a semiconductor device that can also secure the leakage current characteristics while ensuring the charging capacity required in the next-generation DRAM products having a metal wiring of 70nm or less The purpose is to provide a method.

In order to achieve the above object, the present invention comprises the steps of providing a semiconductor substrate formed with a storage node contact; Forming a metal storage electrode connected to the storage node contact; Forming a Ta _{1 -X} Hf _X O dielectric layer on the metal storage electrode; It provides a method of forming a capacitor of a semiconductor device comprising the step of forming a metal plate electrode on the Ta _1-X Hf _X O dielectric film.

Here, the storage electrode and the plate electrode is formed of any one metal-based material selected from the group consisting of TiN, Ru, TaN, W, WN, RuO2, Ir, IrO2 and Pt.

After forming the storage electrode and before depositing the Ta _1-X Hf _X O dielectric layer, the surface of the electrode is roughened while the densities of the storage electrode are removed and residual impurities in the electrode which cause an increase in leakage current are removed. Low temperature annealing is performed at 200 to 800 ° C. in an atmosphere of N 2, H 2, N 2 / H 2, O 2, O 3, or NH 3 to reduce roughness and prevent electric field concentration. In this case, the low temperature annealing is performed by any one method selected from the group consisting of a plasma, an electric furnace and a rapid thermal process (RTP).

Here, the low temperature annealing using the plasma, using a plasma having an RF power of 100 ~ 500W, in the 200 ~ 500 ℃ temperature range and 0.1 ~ 10torr pressure range, while flowing the selected gas by 5sccm ~ 5slm 1-5 Proceed for minutes.

Meanwhile, the low temperature annealing using the electric furnace is performed while flowing the selected gas at a temperature of 600 to 800 ° C. by 5 sccm to 5 slm, and the low temperature annealing using RTP is an atmospheric pressure having a temperature range of 500 to 800 ° C. (700 to 760 torr). Or in the reduced pressure (1 to 100 torr) chamber while flowing the selected gas by 5 sccm to 5 slm.

The Ta _1-X Hf _X O dielectric film is deposited to a thickness of 50 to 150 kPa at a temperature of 200 to 500 ° C. according to ALD or PE-ALD method, wherein the X value is deposited to have a range of 0.05 to 0.5.

Any one selected from the group consisting of Ta (OC2H5) 5, Ta (N (CH3) 2) 5 and other organometallic compounds containing Ta as a source gas of the Ta component of the Ta _1-X Hf _X O dielectric layer is used As the reaction gas, any one selected from the group consisting of O 3, plasma O 2 and H 2 O vapor is used. At this time, the source gas of Ta flows 50 to 500 sccm, the reaction gas flows 0.1 to 1 slm, and the concentration is 200 ± 20 g / m 3 when the reaction gas is O 3.

The group consisting of O3, plasma O2 and H2O vapor as the reaction gas using C16H36HfO4 or other organometallic compound containing Hf consisting of TDEAHf or TEMAHf as the source gas of the Hf component of the Ta _1-X Hf _X O dielectric film. Use any one selected from At this time, the source gas of Hf flows 50-500 sccm, and the reaction gas flows 0.1-1 slm. In particular, when the reaction gas is O 3, the concentration is 200 ± 20 g / m 3.

Ta _1-X Hf _X O thin film deposition using the ALD method, Ta _X O _Y thin film deposition cycle and Hf source gas flow step, purge step of Ta source gas flow step, purge step, reaction gas flow step and purge step , Hf _X O _Y thin film deposition cycle of the reaction gas flow step and the purge step is carried out in a manner of repeating less than 5: 5 ratio, or, Ta source gas flow step, purge step, Hf source gas flow step, purge step The Ta _1-X Hf _X O thin film deposition cycle of the reaction gas flow step and the purge step is repeatedly performed while controlling the number of Ta source gas flows and the number of Hf source gas flows at a ratio of 5: 5 or less.

The deposition of Ta _1-X Hf _X O thin film using the PE-ALD method is performed by discharging plasma at least once in one cycle during the Ta _1-X Hf _X O thin film deposition cycle by the ALD method. to improve the quality).

After depositing the Ta _1-X Hf _X O dielectric film according to the ALD or PE-ALD method, carbon impurities and grains are removed in the dielectric film and the roughness of the dielectric film surface is reduced, thereby ultimately reducing leakage current and yield of the dielectric film. Low temperature annealing is performed at 200 to 800 ° C. in an N 2, H 2, N 2 / H 2, O 2, O 3 or NH 3 atmosphere to improve the voltage characteristics.

In this case, the low temperature annealing is performed in any one method selected from the group consisting of plasma, electric furnace, and RTP method, under the same conditions as the low temperature annealing condition of the storage electrode.

After forming the plate electrode, a protective film composed of an oxide film or a TiN film, such as Al2O3, HfO2, Ta2O5, ZrO2, and TiO2, in order to secure structural stability of the device from hydrogen component, moisture, temperature, and electric shock in a subsequent process. According to the ALD method to form a thickness of 50 ~ 200LD.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The present invention provides a charge capacity of 25 fF / cell or more, a leakage current of 0.5 fF / cell or less, and a breakdown voltage characteristic of 2.0 V (@ 1 pA / cell) or more required for a 70 nm or less DRAM capacitor. A MIM type capacitor employing a Ta _1-X Hf _X O dielectric film is constructed.

The Ta _1-X Hf _X O thin film employed in the present invention is a thin film containing hafnium (Hf) in the Ta ₂ O 5 thin film, and has a dielectric constant value in the range of 25 to 35 depending on the Hf content. Therefore, MIM capacitors with Ta _1-X Hf _X O dielectric films can achieve greater charge capacity than MIM capacitors with Ta2O5 (ε = 25) or HfO2 (ε = 20) single dielectric films. Leakage Current Density can also be lowered. Accordingly, the Ta _1-X Hf _X O dielectric film can reduce the equivalent oxide film thickness to 5-11 Å.

In addition, in the present invention, since the dielectric constant value of the Ta _1-X Hf _X O dielectric film can be adjusted within the range of 25 to 35 according to the Hf content, the dielectric properties can be controlled according to the type of storage electrode and the capacitor specification.

In addition, the Ta _1-X Hf _X O dielectric film of the present invention can improve the thermal stability by Hf-O bonding can improve the performance and reliability of the product.

As a result, the capacitor of the present invention employing the Ta _1-X Hf _X O dielectric film can secure the applicable leakage current and breakdown voltage characteristics while securing the charging capacity required for the next generation DRAM products having a metal wiring of 70 nm or less. Can be.

In detail, FIGS. 1A to 1C are cross-sectional views illustrating processes for forming a capacitor of a semiconductor device according to the present invention.

Referring to FIG. 1A, an interlayer insulating layer 2 is formed on an entire surface of a semiconductor substrate 1 on which lower patterns (not shown) including transistors and bit lines are formed. Then, the interlayer insulating layer 2 is etched to form a contact hole 3 exposing the substrate bonding region or the landing plug poly (LPP), and then a conductive layer is embedded in the contact hole to form the storage node contact 4. Form. Subsequently, the storage electrode 10 is formed on the interlayer insulating layer 2 including the storage node contact 4 to be connected to the storage node contact 4.

Here, the storage electrode 10 is formed of any one metal-based material selected from the group consisting of TiN, Ru, TaN, W, WN, RuO2, Ir, IrO2, and Pt, and is formed to a thickness of 100 ~ 500Å. In addition, the storage electrode 10 may be formed of a concave structure or a simple plate structure in addition to the cylindrical structure as shown.

After the storage electrode 10 is formed, the storage electrode 10 is densified and N2 is removed to reduce the roughness on the surface of the electrode while removing residual impurities in the electrode, which causes an increase in leakage current. Low temperature annealing at 200 to 800 ° C. is carried out in a H 2, N 2 / H 2, O 2, O 3 or NH 3 atmosphere.

In this case, the low temperature annealing is performed by any one method selected from the group consisting of plasma, electric furnace and RTP method. When annealing using a plasma, a plasma having an RF power of 100 to 500 W is used for 1 to 5 minutes while flowing a selected gas by 5 sccm to 5 slm at a temperature range of 200 to 500 ° C. and a pressure range of 0.1 to 10 torr using a plasma having a power of 100 to 500 W. do. On the other hand, when annealing using an electric furnace, a gas selected at 600 to 800 ° C is flowed by 5 sccm to 5 slm, and when annealing using RTP, an atmospheric pressure having a temperature range of 500 to 800 ° C (700 to 760torr) is used. Or in a reduced pressure (1 to 100 torr) chamber while flowing the selected gas by 5 sccm to 5 slm.

Referring to FIG. 1B, a Ta _1-X Hf _X O dielectric layer 20 is deposited on the storage electrode 10 at a thickness of 50 to 150 kPa at a temperature of 200 to 500 ° C. according to an ALD or PE-ALD method. At this time, the X value is deposited so as to have a range of 0.05 to 0.5.

2 is a view for explaining the deposition process of the Ta _1-X Hf _X O dielectric layer 20 according to the ALD or PE-ALD process, as shown, Ta _1-X Hf _X O dielectric layer using the ALD method The deposition of 20 is performed by the Ta _X O _Y thin film deposition cycle of the Ta source gas flow step, the purge step, the reaction gas flow step, and the purge step, and the Hf of the source gas flow step, the purge step, the reactant gas flow step, and the purge step. _{The X} O _Y thin film deposition cycle is repeatedly performed at a ratio of 5: 5 or less, or Ta of the Ta source gas flow step, the purge step, the Hf source gas flow step, the purge step, the reactant gas flow step, and the purge step is performed. _{The 1-X} Hf _X O thin film deposition cycle is repeatedly performed while controlling the number of Ta source gas flows and the number of Hf source gas flows at a ratio of 5: 5 or less.

Meanwhile, the deposition of the Ta _1-X Hf _X O dielectric film 20 using the PE-ALD method discharges the plasma at least once in one cycle during the Ta _1-X Hf _X O thin film deposition cycle by the ALD method. In order to improve film quality.

At this time, a group consisting of Ta (OC2H5) 5, Ta (N (CH3) 2) 5 and other organometallic compounds containing Ta as a source gas of Ta component during deposition of the Ta _1-X Hf _X O dielectric layer 20 Any one selected from and used as the reaction gas, any one selected from the group consisting of O 3, plasma O 2 and H 2 O vapor. At this time, the reaction gas flows 0.1 to 1 slm, and when the reaction gas is O 3, the concentration is 200 ± 20 g / m 3.

In addition, when depositing the Ta _1-X Hf _X O dielectric layer 20, C16H36HfO4 is used as the source gas of the Hf component, or another organometallic compound containing Hf such as TDEAHf or TEMAHf is used, and O3, Any one selected from the group consisting of plasma O 2 and H 2 O vapors is used. At this time, the source gas of Hf flows 50-500 sccm, and the reaction gas flows 0.1-1 slm. In particular, when the reaction gas is O 3, the concentration is 200 ± 20 g / m 3.

As described above, after depositing the Ta _1-X Hf _X O dielectric film 20 according to the ALD or PE-ALD method, the carbon impurities and grains in the dielectric film are removed, and the degree of roughness of the dielectric film surface is reduced. In order to improve leakage current and breakdown voltage characteristics of the dielectric film, low temperature annealing at 200 to 800 ° C. is performed in an N 2, H 2, N 2 / H 2, O 2, O 3, or NH 3 atmosphere.

In this case, the low temperature annealing is performed by any one method selected from the group consisting of plasma, electric furnace and RTP method. The annealing of the plasma, the electric furnace and the RTP method is performed under the same conditions as the low temperature annealing condition of the storage electrode.

Referring to FIG. 1C, a plate electrode 30 made of a metallic material such as TiN, TaN, W, WN, Ru, RuO 2, Ir, IrO 2, and Pt is formed on the Ta _{1 -X} Hf _X O dielectric layer 20. In this way, the formation of the capacitor 40 according to the present invention employing the Ta _1-X Hf _X O dielectric film 20 is completed.

Here, after the plate electrode 30 is formed, a protective film for securing structural stability of the capacitor 40 from hydrogen, moisture, temperature, or electric shock in an environmental test in a subsequent integration process or a package process. For example, it is preferable to deposit a protective film composed of an oxide film such as Al 2 O 3, HfO 2, Ta 2 O 5, ZrO 2, and TiO 2 or a TiN film with a thickness of 50 to 200 Å according to the ALD method.

As mentioned above, although the present invention has been illustrated and described with reference to specific embodiments, the present invention is not limited thereto, and the scope of the following claims is not limited to the scope of the present invention. It can be easily understood by those skilled in the art that can be modified and modified.

As described above, in the present invention, Ta2O5 can be obtained while the equivalent oxide film thickness of about 5 to 11 kW can be obtained by applying the Ta _1-X Hf _X O thin film containing hafnium (Hf) in the Ta2O5 thin film as the dielectric film of the MIM capacitor. Alternatively, when a single dielectric layer of HfO2 is used, a relatively larger charge capacity can be obtained.

In addition, the present invention by applying a Ta _1-X Hf _X O thin film containing hafnium (Hf) in the Ta2O5 thin film as the dielectric film of the MIM capacitor, a lower leakage than when configuring a MIM capacitor by applying Ta2O5 or HfO2 dielectric film Current characteristic and strong breakdown voltage characteristic values

In addition, since the Ta _1-X Hf _X O thin film can adjust the dielectric constant value within the range of 25 to 35 according to the Hf content, the Ta _1-X Hf _X O dielectric film is deposited according to the type of storage electrode and the capacitor specification. The process allows control of the dielectric characteristics, as well as the characteristics of leakage current density and breakdown voltage.

In addition, the Ta _1-X Hf _X O dielectric film has better thermal stability than the HfO2 dielectric film or Ta2O5 dielectric film, so that deterioration of electrical properties does not occur even when the high temperature heat treatment proceeds inevitably in the integration process after capacitor formation, Therefore, the present invention can simultaneously improve the durability and reliability of the capacitor in the next-generation semiconductor memory device to which a metal wiring process of 70 nm or less is applied.

Claims (17)

Providing a semiconductor substrate on which storage node contacts are formed; Forming a metal storage electrode connected to the storage node contact; Forming a Ta _{1 -X} Hf _X O dielectric layer on the metal storage electrode; And Forming a metal plate electrode on the Ta _{1 -X} Hf _X O dielectric layer; The Ta _1-X Hf _X O dielectric film is formed by ALD or PE-ALD method, the deposition of Ta _1-X Hf _X O thin film using the ALD method, Ta _X O _Y thin film deposition cycle of Ta source gas flow step, purge step, reactive gas flow step and purge step and Hf _X O _Y thin film deposition cycle of Hf source gas flow step, purge step, reactant gas flow step and purge step A method of forming a capacitor of a semiconductor device, characterized in that to proceed repeatedly in a 5: 5 ratio or less. The method of claim 1, And the storage electrode and the plate electrode are formed of any one metal material selected from the group consisting of TiN, Ru, TaN, W, WN, RuO 2, Ir, IrO 2, and Pt. The method of claim 1, After forming the storage electrode, and before forming the Ta _1-X Hf _X O dielectric layer, the substrate formed with the storage electrode is a group consisting of N2, H2, N2 / H2, O2, O3, and NH3. The method of forming a capacitor of a semiconductor device, characterized in that it further comprises the step of annealing at a low temperature in any gas atmosphere selected from. The method of claim 1, The Ta _1-X Hf _X O dielectric layer is formed so that the X value is in the range of 0.05 to 0.5. The method of claim 1, The Ta _1-X Hf _X O dielectric film is deposited to a thickness of 50 to 150 kHz at a temperature of 200 to 500 ℃ according to the ALD or PE-ALD method. The method of claim 5, Any one selected from the group consisting of Ta (OC2H5) 5, Ta (N (CH3) 2) 5 and other organometallic compounds containing Ta as a source gas of the Ta component of the Ta _1-X Hf _X O dielectric layer is used And using any one selected from the group consisting of O 3 (concentration: 200 ± 20 g / m 3), plasma O 2, and H 2 O vapor as the reaction gas. The method of claim 5, C16H36HfO4 is used as a source gas of the Hf component of the Ta _1-X Hf _X O dielectric layer, or another organometallic compound containing Hf consisting of TDEAHf or TEMAHf is used, and O3 (concentration: 200 ± 20 g / m3) is used as a reaction gas. ), A method for forming a capacitor of a semiconductor device, using any one selected from the group consisting of plasma O2 and H2O vapor. The method according to claim 6 or 7, And the source gas flows 50 to 500 sccm, and the reaction gas flows 0.1 to 1 slm. delete The method of claim 1, Deposition of the Ta _1-X Hf _X O thin film using the ALD method, Ta source gas flow step, a purge step, Hf source gas flow step, a purge step, the reaction gas flow step and the purge step of the Ta _1-X Hf _X O The thin film deposition cycle is carried out in such a manner that it is repeatedly performed while controlling the number of Ta source gas flow and the number of Hf source gas flow to a ratio of 5: 5 or less. The method of claim 1, Deposition of the Ta _1-X Hf _X O thin film using the PE-ALD method is performed by discharging the plasma at least once in one cycle during the Ta _1-X Hf _X O thin film deposition cycle by the ALD method. A method of forming a capacitor of a semiconductor device. The method of claim 5, After depositing the Ta _1-X Hf _X O dielectric layer according to the ALD or PE-ALD method, and before forming the metal plate electrode, the resultant substrate on which the dielectric layer is deposited is N2, H2, N2 / H2. And annealing at a low temperature in any one of a gas atmosphere selected from the group consisting of O 2, O 3, and NH 3. The method according to claim 3 or 12, wherein The low temperature annealing is performed by any one method selected from the group consisting of a plasma, an electric furnace and an RTP method. The method of claim 13, Low temperature annealing using the plasma, using a plasma having an RF power of 100 ~ 500W, in the 200 ~ 500 ℃ temperature range and 0.1 ~ 10torr pressure range, while flowing the selected gas by 5sccm ~ 5slm for 1-5 minutes A method of forming a capacitor of a semiconductor device, characterized in that the progress. The method of claim 13, The low temperature annealing using the electric furnace is performed while flowing the selected gas at a temperature of 600 to 800 ° C. by 5 sccm to 5 slm. The method of claim 13, The low temperature annealing using the RTP is performed while flowing the selected gas by 5 sccm to 5 slm in an atmospheric pressure (700 to 760 torr) or a reduced pressure (1 to 100 torr) chamber having a temperature range of 500 to 800 ° C. Capacitor formation method. The method of claim 1, After forming the plate electrode and before proceeding to the subsequent process, any one of an oxide film or a TiN film selected from the group consisting of Al2O3, HfO2, Ta2O5, ZrO2 and TiO2 is formed on the substrate product on which the plate electrode is formed. A method of forming a capacitor of a semiconductor device, characterized by further comprising the step of forming a protective film of 50 to 200 Å thickness in the ALD method.

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